Lines Matching refs:hwmgr
109 static int iceland_start_smc(struct pp_hwmgr *hwmgr) in iceland_start_smc() argument
111 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_start_smc()
117 static void iceland_reset_smc(struct pp_hwmgr *hwmgr) in iceland_reset_smc() argument
119 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_reset_smc()
125 static void iceland_stop_smc_clock(struct pp_hwmgr *hwmgr) in iceland_stop_smc_clock() argument
127 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_stop_smc_clock()
132 static void iceland_start_smc_clock(struct pp_hwmgr *hwmgr) in iceland_start_smc_clock() argument
134 PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in iceland_start_smc_clock()
139 static int iceland_smu_start_smc(struct pp_hwmgr *hwmgr) in iceland_smu_start_smc() argument
142 smu7_program_jump_on_start(hwmgr); in iceland_smu_start_smc()
145 iceland_start_smc_clock(hwmgr); in iceland_smu_start_smc()
148 iceland_start_smc(hwmgr); in iceland_smu_start_smc()
150 PHM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS, in iceland_smu_start_smc()
157 static int iceland_upload_smc_firmware_data(struct pp_hwmgr *hwmgr, in iceland_upload_smc_firmware_data() argument
166 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); in iceland_upload_smc_firmware_data()
167 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); in iceland_upload_smc_firmware_data()
171 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in iceland_upload_smc_firmware_data()
176 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); in iceland_upload_smc_firmware_data()
184 static int iceland_smu_upload_firmware_image(struct pp_hwmgr *hwmgr) in iceland_smu_upload_firmware_image() argument
189 if (hwmgr == NULL || hwmgr->device == NULL) in iceland_smu_upload_firmware_image()
193 cgs_get_firmware_info(hwmgr->device, in iceland_smu_upload_firmware_image()
205 hwmgr->smu_version = info.version; in iceland_smu_upload_firmware_image()
207 PHM_WAIT_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND, in iceland_smu_upload_firmware_image()
211 val = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, in iceland_smu_upload_firmware_image()
213 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in iceland_smu_upload_firmware_image()
217 iceland_stop_smc_clock(hwmgr); in iceland_smu_upload_firmware_image()
220 iceland_reset_smc(hwmgr); in iceland_smu_upload_firmware_image()
221 iceland_upload_smc_firmware_data(hwmgr, info.image_size, in iceland_smu_upload_firmware_image()
228 static int iceland_request_smu_load_specific_fw(struct pp_hwmgr *hwmgr, in iceland_request_smu_load_specific_fw() argument
234 static int iceland_start_smu(struct pp_hwmgr *hwmgr) in iceland_start_smu() argument
236 struct iceland_smumgr *priv = hwmgr->smu_backend; in iceland_start_smu()
239 if (!smu7_is_smc_ram_running(hwmgr)) { in iceland_start_smu()
240 result = iceland_smu_upload_firmware_image(hwmgr); in iceland_start_smu()
244 iceland_smu_start_smc(hwmgr); in iceland_start_smu()
250 smu7_read_smc_sram_dword(hwmgr, in iceland_start_smu()
255 result = smu7_request_smu_load_fw(hwmgr); in iceland_start_smu()
260 static int iceland_smu_init(struct pp_hwmgr *hwmgr) in iceland_smu_init() argument
269 hwmgr->smu_backend = iceland_priv; in iceland_smu_init()
271 if (smu7_init(hwmgr)) { in iceland_smu_init()
280 static void iceland_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr) in iceland_initialize_power_tune_defaults() argument
282 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_initialize_power_tune_defaults()
283 struct amdgpu_device *adev = hwmgr->adev; in iceland_initialize_power_tune_defaults()
306 static int iceland_populate_svi_load_line(struct pp_hwmgr *hwmgr) in iceland_populate_svi_load_line() argument
308 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_svi_load_line()
319 static int iceland_populate_tdc_limit(struct pp_hwmgr *hwmgr) in iceland_populate_tdc_limit() argument
322 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_tdc_limit()
325 tdc_limit = (uint16_t)(hwmgr->dyn_state.cac_dtp_table->usTDC * 256); in iceland_populate_tdc_limit()
335 static int iceland_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset) in iceland_populate_dw8() argument
337 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_dw8()
341 if (smu7_read_smc_sram_dword(hwmgr, in iceland_populate_dw8()
354 static int iceland_populate_temperature_scaler(struct pp_hwmgr *hwmgr) in iceland_populate_temperature_scaler() argument
359 static int iceland_populate_gnb_lpml(struct pp_hwmgr *hwmgr) in iceland_populate_gnb_lpml() argument
362 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_gnb_lpml()
371 static int iceland_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr) in iceland_populate_bapm_vddc_base_leakage_sidd() argument
373 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_bapm_vddc_base_leakage_sidd()
376 struct phm_cac_tdp_table *cac_table = hwmgr->dyn_state.cac_dtp_table; in iceland_populate_bapm_vddc_base_leakage_sidd()
389 static int iceland_populate_bapm_vddc_vid_sidd(struct pp_hwmgr *hwmgr) in iceland_populate_bapm_vddc_vid_sidd() argument
392 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_bapm_vddc_vid_sidd()
396 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.cac_leakage_table, in iceland_populate_bapm_vddc_vid_sidd()
398 PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count <= 8, in iceland_populate_bapm_vddc_vid_sidd()
400 …PP_ASSERT_WITH_CODE(hwmgr->dyn_state.cac_leakage_table->count == hwmgr->dyn_state.vddc_dependency_… in iceland_populate_bapm_vddc_vid_sidd()
403 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_EVV)) { in iceland_populate_bapm_vddc_vid_sidd()
404 for (i = 0; (uint32_t) i < hwmgr->dyn_state.cac_leakage_table->count; i++) { in iceland_populate_bapm_vddc_vid_sidd()
405 lo_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc1); in iceland_populate_bapm_vddc_vid_sidd()
406 hi_vid[i] = convert_to_vid(hwmgr->dyn_state.cac_leakage_table->entries[i].Vddc2); in iceland_populate_bapm_vddc_vid_sidd()
415 static int iceland_populate_vddc_vid(struct pp_hwmgr *hwmgr) in iceland_populate_vddc_vid() argument
418 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_vddc_vid()
420 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_vddc_vid()
435 static int iceland_populate_pm_fuses(struct pp_hwmgr *hwmgr) in iceland_populate_pm_fuses() argument
437 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_pm_fuses()
440 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_populate_pm_fuses()
442 if (smu7_read_smc_sram_dword(hwmgr, in iceland_populate_pm_fuses()
451 if (iceland_populate_bapm_vddc_vid_sidd(hwmgr)) in iceland_populate_pm_fuses()
457 if (iceland_populate_vddc_vid(hwmgr)) in iceland_populate_pm_fuses()
463 if (iceland_populate_svi_load_line(hwmgr)) in iceland_populate_pm_fuses()
468 if (iceland_populate_tdc_limit(hwmgr)) in iceland_populate_pm_fuses()
472 if (iceland_populate_dw8(hwmgr, pm_fuse_table_offset)) in iceland_populate_pm_fuses()
479 if (0 != iceland_populate_temperature_scaler(hwmgr)) in iceland_populate_pm_fuses()
485 if (iceland_populate_gnb_lpml(hwmgr)) in iceland_populate_pm_fuses()
491 if (iceland_populate_bapm_vddc_base_leakage_sidd(hwmgr)) in iceland_populate_pm_fuses()
496 if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset, in iceland_populate_pm_fuses()
506 static int iceland_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, in iceland_get_dependency_volt_by_clk() argument
530 static int iceland_get_std_voltage_value_sidd(struct pp_hwmgr *hwmgr, in iceland_get_std_voltage_value_sidd() argument
540 PP_ASSERT_WITH_CODE(NULL != hwmgr->dyn_state.vddc_dependency_on_sclk, in iceland_get_std_voltage_value_sidd()
544 if (NULL == hwmgr->dyn_state.cac_leakage_table) { in iceland_get_std_voltage_value_sidd()
554 for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) { in iceland_get_std_voltage_value_sidd()
555 if (tab->value == hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { in iceland_get_std_voltage_value_sidd()
557 if ((uint32_t)v_index < hwmgr->dyn_state.cac_leakage_table->count) { in iceland_get_std_voltage_value_sidd()
558 *lo = hwmgr->dyn_state.cac_leakage_table->entries[v_index].Vddc * VOLTAGE_SCALE; in iceland_get_std_voltage_value_sidd()
559 *hi = (uint16_t)(hwmgr->dyn_state.cac_leakage_table->entries[v_index].Leakage * VOLTAGE_SCALE); in iceland_get_std_voltage_value_sidd()
562 …*lo = hwmgr->dyn_state.cac_leakage_table->entries[hwmgr->dyn_state.cac_leakage_table->count - 1].V… in iceland_get_std_voltage_value_sidd()
563 …*hi = (uint16_t)(hwmgr->dyn_state.cac_leakage_table->entries[hwmgr->dyn_state.cac_leakage_table->c… in iceland_get_std_voltage_value_sidd()
574 …for (v_index = 0; (uint32_t)v_index < hwmgr->dyn_state.vddc_dependency_on_sclk->count; v_index++) { in iceland_get_std_voltage_value_sidd()
575 if (tab->value <= hwmgr->dyn_state.vddc_dependency_on_sclk->entries[v_index].v) { in iceland_get_std_voltage_value_sidd()
577 if ((uint32_t)v_index < hwmgr->dyn_state.cac_leakage_table->count) { in iceland_get_std_voltage_value_sidd()
578 *lo = hwmgr->dyn_state.cac_leakage_table->entries[v_index].Vddc * VOLTAGE_SCALE; in iceland_get_std_voltage_value_sidd()
579 *hi = (uint16_t)(hwmgr->dyn_state.cac_leakage_table->entries[v_index].Leakage) * VOLTAGE_SCALE; in iceland_get_std_voltage_value_sidd()
582 …*lo = hwmgr->dyn_state.cac_leakage_table->entries[hwmgr->dyn_state.cac_leakage_table->count - 1].V… in iceland_get_std_voltage_value_sidd()
583 …*hi = (uint16_t)(hwmgr->dyn_state.cac_leakage_table->entries[hwmgr->dyn_state.cac_leakage_table->c… in iceland_get_std_voltage_value_sidd()
596 static int iceland_populate_smc_voltage_table(struct pp_hwmgr *hwmgr, in iceland_populate_smc_voltage_table() argument
602 result = iceland_get_std_voltage_value_sidd(hwmgr, tab, in iceland_populate_smc_voltage_table()
617 static int iceland_populate_smc_vddc_table(struct pp_hwmgr *hwmgr, in iceland_populate_smc_vddc_table() argument
622 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_vddc_table()
626 result = iceland_populate_smc_voltage_table(hwmgr, in iceland_populate_smc_vddc_table()
643 static int iceland_populate_smc_vdd_ci_table(struct pp_hwmgr *hwmgr, in iceland_populate_smc_vdd_ci_table() argument
646 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_vdd_ci_table()
653 result = iceland_populate_smc_voltage_table(hwmgr, in iceland_populate_smc_vdd_ci_table()
668 static int iceland_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, in iceland_populate_smc_mvdd_table() argument
671 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_mvdd_table()
678 result = iceland_populate_smc_voltage_table(hwmgr, in iceland_populate_smc_mvdd_table()
694 static int iceland_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr, in iceland_populate_smc_voltage_tables() argument
699 result = iceland_populate_smc_vddc_table(hwmgr, table); in iceland_populate_smc_voltage_tables()
703 result = iceland_populate_smc_vdd_ci_table(hwmgr, table); in iceland_populate_smc_voltage_tables()
707 result = iceland_populate_smc_mvdd_table(hwmgr, table); in iceland_populate_smc_voltage_tables()
714 static int iceland_populate_ulv_level(struct pp_hwmgr *hwmgr, in iceland_populate_ulv_level() argument
719 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_ulv_level()
724 result = pp_tables_get_response_times(hwmgr, &voltage_response_time, &ulv_voltage); in iceland_populate_ulv_level()
734 if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) in iceland_populate_ulv_level()
738 …state->VddcOffset = (uint16_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltag… in iceland_populate_ulv_level()
741 if (ulv_voltage > hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v) in iceland_populate_ulv_level()
745 (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[0].v - ulv_voltage) in iceland_populate_ulv_level()
758 static int iceland_populate_ulv_state(struct pp_hwmgr *hwmgr, in iceland_populate_ulv_state() argument
761 return iceland_populate_ulv_level(hwmgr, ulv_level); in iceland_populate_ulv_state()
764 static int iceland_populate_smc_link_level(struct pp_hwmgr *hwmgr, SMU71_Discrete_DpmTable *table) in iceland_populate_smc_link_level() argument
766 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_link_level()
768 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_smc_link_level()
795 static int iceland_calculate_sclk_params(struct pp_hwmgr *hwmgr, in iceland_calculate_sclk_params() argument
798 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_calculate_sclk_params()
811 result = atomctrl_get_engine_pll_dividers_vi(hwmgr, engine_clock, ÷rs); in iceland_calculate_sclk_params()
817 reference_clock = atomctrl_get_reference_clock(hwmgr); in iceland_calculate_sclk_params()
838 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_calculate_sclk_params()
843 if (0 == atomctrl_get_engine_clock_spread_spectrum(hwmgr, vcoFreq, &ss_info)) { in iceland_calculate_sclk_params()
873 static int iceland_populate_phase_value_based_on_sclk(struct pp_hwmgr *hwmgr, in iceland_populate_phase_value_based_on_sclk() argument
891 static int iceland_populate_single_graphic_level(struct pp_hwmgr *hwmgr, in iceland_populate_single_graphic_level() argument
896 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_single_graphic_level()
898 result = iceland_calculate_sclk_params(hwmgr, engine_clock, graphic_level); in iceland_populate_single_graphic_level()
901 result = iceland_get_dependency_volt_by_clk(hwmgr, in iceland_populate_single_graphic_level()
902 hwmgr->dyn_state.vddc_dependency_on_sclk, engine_clock, in iceland_populate_single_graphic_level()
912 iceland_populate_phase_value_based_on_sclk(hwmgr, in iceland_populate_single_graphic_level()
913 hwmgr->dyn_state.vddc_phase_shed_limits_table, in iceland_populate_single_graphic_level()
932 hwmgr->display_config->min_core_set_clock_in_sr; in iceland_populate_single_graphic_level()
934 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_populate_single_graphic_level()
959 static int iceland_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) in iceland_populate_all_graphic_levels() argument
961 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_all_graphic_levels()
962 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_all_graphic_levels()
981 result = iceland_populate_single_graphic_level(hwmgr, in iceland_populate_all_graphic_levels()
1037 result = smu7_copy_bytes_to_smc(hwmgr, level_array_adress, in iceland_populate_all_graphic_levels()
1045 struct pp_hwmgr *hwmgr, in iceland_calculate_mclk_params() argument
1052 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_calculate_mclk_params()
1067 result = atomctrl_get_memory_pll_dividers_si(hwmgr, in iceland_calculate_mclk_params()
1095 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_calculate_mclk_params()
1115 uint32_t reference_clock = atomctrl_get_mpll_reference_clock(hwmgr); in iceland_calculate_mclk_params()
1127 if (0 == atomctrl_get_memory_clock_spread_spectrum(hwmgr, freq_nom, &ss_info)) { in iceland_calculate_mclk_params()
1210 static int iceland_populate_phase_value_based_on_mclk(struct pp_hwmgr *hwmgr, const struct phm_phas… in iceland_populate_phase_value_based_on_mclk() argument
1228 struct pp_hwmgr *hwmgr, in iceland_populate_single_memory_level() argument
1233 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_single_memory_level()
1240 if (hwmgr->dyn_state.vddc_dependency_on_mclk != NULL) { in iceland_populate_single_memory_level()
1241 result = iceland_get_dependency_volt_by_clk(hwmgr, in iceland_populate_single_memory_level()
1242 hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc); in iceland_populate_single_memory_level()
1249 } else if (NULL != hwmgr->dyn_state.vddci_dependency_on_mclk) { in iceland_populate_single_memory_level()
1250 result = iceland_get_dependency_volt_by_clk(hwmgr, in iceland_populate_single_memory_level()
1251 hwmgr->dyn_state.vddci_dependency_on_mclk, in iceland_populate_single_memory_level()
1261 iceland_populate_phase_value_based_on_mclk(hwmgr, hwmgr->dyn_state.vddc_phase_shed_limits_table, in iceland_populate_single_memory_level()
1282 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in iceland_populate_single_memory_level()
1283 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in iceland_populate_single_memory_level()
1308 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) in iceland_populate_single_memory_level()
1309 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level()
1311 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level()
1317 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level()
1320 result = iceland_calculate_mclk_params(hwmgr, in iceland_populate_single_memory_level()
1346 static int iceland_populate_all_memory_levels(struct pp_hwmgr *hwmgr) in iceland_populate_all_memory_levels() argument
1348 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_all_memory_levels()
1349 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_all_memory_levels()
1364 result = iceland_populate_single_memory_level(hwmgr, dpm_table->mclk_table.dpm_levels[i].value, in iceland_populate_all_memory_levels()
1388 result = smu7_copy_bytes_to_smc(hwmgr, in iceland_populate_all_memory_levels()
1395 static int iceland_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, in iceland_populate_mvdd_value() argument
1398 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_mvdd_value()
1404 for (i = 0; i < hwmgr->dyn_state.mvdd_dependency_on_mclk->count; i++) { in iceland_populate_mvdd_value()
1405 if (mclk <= hwmgr->dyn_state.mvdd_dependency_on_mclk->entries[i].clk) { in iceland_populate_mvdd_value()
1412 PP_ASSERT_WITH_CODE(i < hwmgr->dyn_state.mvdd_dependency_on_mclk->count, in iceland_populate_mvdd_value()
1422 static int iceland_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, in iceland_populate_smc_acpi_level() argument
1426 const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_acpi_level()
1447 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in iceland_populate_smc_acpi_level()
1450 result = atomctrl_get_engine_pll_dividers_vi(hwmgr, in iceland_populate_smc_acpi_level()
1504 if (0 == iceland_populate_mvdd_value(hwmgr, 0, &voltage_level)) in iceland_populate_smc_acpi_level()
1564 static int iceland_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, in iceland_populate_smc_uvd_level() argument
1570 static int iceland_populate_smc_vce_level(struct pp_hwmgr *hwmgr, in iceland_populate_smc_vce_level() argument
1576 static int iceland_populate_smc_acp_level(struct pp_hwmgr *hwmgr, in iceland_populate_smc_acp_level() argument
1583 struct pp_hwmgr *hwmgr, in iceland_populate_memory_timing_parameters() argument
1594 result = atomctrl_set_engine_dram_timings_rv770(hwmgr, in iceland_populate_memory_timing_parameters()
1600 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in iceland_populate_memory_timing_parameters()
1601 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in iceland_populate_memory_timing_parameters()
1602 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in iceland_populate_memory_timing_parameters()
1611 static int iceland_program_memory_timing_parameters(struct pp_hwmgr *hwmgr) in iceland_program_memory_timing_parameters() argument
1613 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_program_memory_timing_parameters()
1614 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_program_memory_timing_parameters()
1624 (hwmgr, data->dpm_table.sclk_table.dpm_levels[i].value, in iceland_program_memory_timing_parameters()
1636 hwmgr, in iceland_program_memory_timing_parameters()
1647 static int iceland_populate_smc_boot_level(struct pp_hwmgr *hwmgr, in iceland_populate_smc_boot_level() argument
1651 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_boot_level()
1652 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_smc_boot_level()
1688 static int iceland_populate_mc_reg_address(struct pp_hwmgr *hwmgr, in iceland_populate_mc_reg_address() argument
1691 const struct iceland_smumgr *smu_data = (struct iceland_smumgr *)hwmgr->smu_backend; in iceland_populate_mc_reg_address()
1728 static int iceland_convert_mc_reg_table_entry_to_smc(struct pp_hwmgr *hwmgr, in iceland_convert_mc_reg_table_entry_to_smc() argument
1733 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_convert_mc_reg_table_entry_to_smc()
1753 static int iceland_convert_mc_reg_table_to_smc(struct pp_hwmgr *hwmgr, in iceland_convert_mc_reg_table_to_smc() argument
1757 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_convert_mc_reg_table_to_smc()
1763 hwmgr, in iceland_convert_mc_reg_table_to_smc()
1775 static int iceland_update_and_upload_mc_reg_table(struct pp_hwmgr *hwmgr) in iceland_update_and_upload_mc_reg_table() argument
1777 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_update_and_upload_mc_reg_table()
1778 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_update_and_upload_mc_reg_table()
1788 result = iceland_convert_mc_reg_table_to_smc(hwmgr, &(smu_data->mc_regs)); in iceland_update_and_upload_mc_reg_table()
1796 return smu7_copy_bytes_to_smc(hwmgr, address, in iceland_update_and_upload_mc_reg_table()
1802 static int iceland_populate_initial_mc_reg_table(struct pp_hwmgr *hwmgr) in iceland_populate_initial_mc_reg_table() argument
1805 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_initial_mc_reg_table()
1808 result = iceland_populate_mc_reg_address(hwmgr, &(smu_data->mc_regs)); in iceland_populate_initial_mc_reg_table()
1812 result = iceland_convert_mc_reg_table_to_smc(hwmgr, &smu_data->mc_regs); in iceland_populate_initial_mc_reg_table()
1816 return smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.mc_reg_table_start, in iceland_populate_initial_mc_reg_table()
1820 static int iceland_populate_smc_initial_state(struct pp_hwmgr *hwmgr) in iceland_populate_smc_initial_state() argument
1822 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_initial_state()
1823 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_smc_initial_state()
1826 count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_sclk->count); in iceland_populate_smc_initial_state()
1829 if (hwmgr->dyn_state.vddc_dependency_on_sclk->entries[level].clk in iceland_populate_smc_initial_state()
1836 count = (uint8_t)(hwmgr->dyn_state.vddc_dependency_on_mclk->count); in iceland_populate_smc_initial_state()
1839 if (hwmgr->dyn_state.vddc_dependency_on_mclk->entries[level].clk in iceland_populate_smc_initial_state()
1849 static int iceland_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr) in iceland_populate_bapm_parameters_in_dpm_table() argument
1851 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_bapm_parameters_in_dpm_table()
1852 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_populate_bapm_parameters_in_dpm_table()
1855 struct phm_cac_tdp_table *cac_dtp_table = hwmgr->dyn_state.cac_dtp_table; in iceland_populate_bapm_parameters_in_dpm_table()
1856 struct phm_ppm_table *ppm = hwmgr->dyn_state.ppm_parameter_table; in iceland_populate_bapm_parameters_in_dpm_table()
1907 static int iceland_populate_smc_svi2_config(struct pp_hwmgr *hwmgr, in iceland_populate_smc_svi2_config() argument
1910 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_populate_smc_svi2_config()
1929 static int iceland_init_smc_table(struct pp_hwmgr *hwmgr) in iceland_init_smc_table() argument
1932 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_init_smc_table()
1933 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_init_smc_table()
1937 iceland_initialize_power_tune_defaults(hwmgr); in iceland_init_smc_table()
1941 iceland_populate_smc_voltage_tables(hwmgr, table); in iceland_init_smc_table()
1944 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_init_smc_table()
1949 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_init_smc_table()
1958 result = iceland_populate_ulv_state(hwmgr, &(smu_data->ulv_setting)); in iceland_init_smc_table()
1962 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in iceland_init_smc_table()
1966 result = iceland_populate_smc_link_level(hwmgr, table); in iceland_init_smc_table()
1970 result = iceland_populate_all_graphic_levels(hwmgr); in iceland_init_smc_table()
1974 result = iceland_populate_all_memory_levels(hwmgr); in iceland_init_smc_table()
1978 result = iceland_populate_smc_acpi_level(hwmgr, table); in iceland_init_smc_table()
1982 result = iceland_populate_smc_vce_level(hwmgr, table); in iceland_init_smc_table()
1986 result = iceland_populate_smc_acp_level(hwmgr, table); in iceland_init_smc_table()
1992 result = iceland_program_memory_timing_parameters(hwmgr); in iceland_init_smc_table()
1996 result = iceland_populate_smc_uvd_level(hwmgr, table); in iceland_init_smc_table()
2003 result = iceland_populate_smc_boot_level(hwmgr, table); in iceland_init_smc_table()
2007 result = iceland_populate_smc_initial_state(hwmgr); in iceland_init_smc_table()
2010 result = iceland_populate_bapm_parameters_in_dpm_table(hwmgr); in iceland_init_smc_table()
2034 result = iceland_populate_smc_svi2_config(hwmgr, table); in iceland_init_smc_table()
2057 result = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.dpm_table_start + in iceland_init_smc_table()
2067 result = smu7_copy_bytes_to_smc(hwmgr, in iceland_init_smc_table()
2074 result = iceland_populate_initial_mc_reg_table(hwmgr); in iceland_init_smc_table()
2078 result = iceland_populate_pm_fuses(hwmgr); in iceland_init_smc_table()
2085 static int iceland_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) in iceland_thermal_setup_fan_table() argument
2087 struct smu7_smumgr *smu7_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in iceland_thermal_setup_fan_table()
2096 …if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl… in iceland_thermal_setup_fan_table()
2099 if (hwmgr->thermal_controller.fanInfo.bNoFan) { in iceland_thermal_setup_fan_table()
2100 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in iceland_thermal_setup_fan_table()
2106 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl); in iceland_thermal_setup_fan_table()
2110 …duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_FDO_CTRL1, FMAX_DUTY100… in iceland_thermal_setup_fan_table()
2113 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl); in iceland_thermal_setup_fan_table()
2117 tmp64 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMin * duty100; in iceland_thermal_setup_fan_table()
2121 …t_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usTMed - hwmgr->thermal_controller… in iceland_thermal_setup_fan_table()
2122 …t_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usTHigh - hwmgr->thermal_controlle… in iceland_thermal_setup_fan_table()
2124 …pwm_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed - hwmgr->thermal_contro… in iceland_thermal_setup_fan_table()
2125 …pwm_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMHigh - hwmgr->thermal_contr… in iceland_thermal_setup_fan_table()
2130 …fan_table.TempMin = cpu_to_be16((50 + hwmgr->thermal_controller.advanceFanControlParameters.usTMin… in iceland_thermal_setup_fan_table()
2131 …fan_table.TempMed = cpu_to_be16((50 + hwmgr->thermal_controller.advanceFanControlParameters.usTMed… in iceland_thermal_setup_fan_table()
2132 …fan_table.TempMax = cpu_to_be16((50 + hwmgr->thermal_controller.advanceFanControlParameters.usTMax… in iceland_thermal_setup_fan_table()
2139 fan_table.HystDown = cpu_to_be16(hwmgr->thermal_controller.advanceFanControlParameters.ucTHyst); in iceland_thermal_setup_fan_table()
2147 reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in iceland_thermal_setup_fan_table()
2149 …fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCyc… in iceland_thermal_setup_fan_table()
2153 …fan_table.TempSrc = (uint8_t)PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_MULT… in iceland_thermal_setup_fan_table()
2157 …res = smu7_copy_bytes_to_smc(hwmgr, smu7_data->fan_table_start, (uint8_t *)&fan_table, (uint32_t)s… in iceland_thermal_setup_fan_table()
2163 static int iceland_program_mem_timing_parameters(struct pp_hwmgr *hwmgr) in iceland_program_mem_timing_parameters() argument
2165 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_program_mem_timing_parameters()
2169 return iceland_program_memory_timing_parameters(hwmgr); in iceland_program_mem_timing_parameters()
2174 static int iceland_update_sclk_threshold(struct pp_hwmgr *hwmgr) in iceland_update_sclk_threshold() argument
2176 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_update_sclk_threshold()
2177 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_update_sclk_threshold()
2182 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_update_sclk_threshold()
2191 hwmgr, in iceland_update_sclk_threshold()
2200 result = iceland_update_and_upload_mc_reg_table(hwmgr); in iceland_update_sclk_threshold()
2204 result = iceland_program_mem_timing_parameters(hwmgr); in iceland_update_sclk_threshold()
2278 static int iceland_process_firmware_header(struct pp_hwmgr *hwmgr) in iceland_process_firmware_header() argument
2280 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_process_firmware_header()
2281 struct smu7_smumgr *smu7_data = (struct smu7_smumgr *)(hwmgr->smu_backend); in iceland_process_firmware_header()
2287 result = smu7_read_smc_sram_dword(hwmgr, in iceland_process_firmware_header()
2298 result = smu7_read_smc_sram_dword(hwmgr, in iceland_process_firmware_header()
2311 result = smu7_read_smc_sram_dword(hwmgr, in iceland_process_firmware_header()
2320 result = smu7_read_smc_sram_dword(hwmgr, in iceland_process_firmware_header()
2331 result = smu7_read_smc_sram_dword(hwmgr, in iceland_process_firmware_header()
2343 result = smu7_read_smc_sram_dword(hwmgr, in iceland_process_firmware_header()
2349 hwmgr->microcode_version_info.SMC = tmp; in iceland_process_firmware_header()
2354 result = smu7_read_smc_sram_dword(hwmgr, in iceland_process_firmware_header()
2370 static uint8_t iceland_get_memory_modile_index(struct pp_hwmgr *hwmgr) in iceland_get_memory_modile_index() argument
2372 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); in iceland_get_memory_modile_index()
2510 static int iceland_set_mc_special_registers(struct pp_hwmgr *hwmgr, in iceland_set_mc_special_registers() argument
2515 struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); in iceland_set_mc_special_registers()
2524 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS); in iceland_set_mc_special_registers()
2536 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS); in iceland_set_mc_special_registers()
2565 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1); in iceland_set_mc_special_registers()
2603 static int iceland_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) in iceland_initialize_mc_reg_table() argument
2606 struct iceland_smumgr *smu_data = (struct iceland_smumgr *)(hwmgr->smu_backend); in iceland_initialize_mc_reg_table()
2609 uint8_t module_index = iceland_get_memory_modile_index(hwmgr); in iceland_initialize_mc_reg_table()
2617 …cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2618 …cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2619 …cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_… in iceland_initialize_mc_reg_table()
2620 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2621 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2622 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2623 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table()
2624 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table()
2625 …cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table()
2626 …cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, cgs_read_register(hwmgr->device, mmMC_… in iceland_initialize_mc_reg_table()
2627 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_… in iceland_initialize_mc_reg_table()
2628 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_P… in iceland_initialize_mc_reg_table()
2629 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS1_LP, cgs_read_register(hwmgr->device, mmMC_… in iceland_initialize_mc_reg_table()
2630 …cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in iceland_initialize_mc_reg_table()
2631 …cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in iceland_initialize_mc_reg_table()
2632 …cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in iceland_initialize_mc_reg_table()
2633 …cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ… in iceland_initialize_mc_reg_table()
2634 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2635 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_… in iceland_initialize_mc_reg_table()
2636 …cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_… in iceland_initialize_mc_reg_table()
2638 result = atomctrl_initialize_mc_reg_table(hwmgr, module_index, table); in iceland_initialize_mc_reg_table()
2645 result = iceland_set_mc_special_registers(hwmgr, ni_table); in iceland_initialize_mc_reg_table()
2656 static bool iceland_is_dpm_running(struct pp_hwmgr *hwmgr) in iceland_is_dpm_running() argument
2658 return (1 == PHM_READ_INDIRECT_FIELD(hwmgr->device, in iceland_is_dpm_running()