99 static int fiji_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr)  in fiji_start_smu_in_protection_mode()  argument
107 	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_protection_mode()
110 	result = smu7_upload_smu_firmware_image(hwmgr);  in fiji_start_smu_in_protection_mode()
115 	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_protection_mode()
118 	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_protection_mode()
122 	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_protection_mode()
130 	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_protection_mode()
134 	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_protection_mode()
137 	PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,  in fiji_start_smu_in_protection_mode()
140 	smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_Test, 0x20000, NULL);  in fiji_start_smu_in_protection_mode()
143 	PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND,  in fiji_start_smu_in_protection_mode()
147 	if (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_protection_mode()
154 	PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,  in fiji_start_smu_in_protection_mode()
160 static int fiji_start_smu_in_non_protection_mode(struct pp_hwmgr *hwmgr)  in fiji_start_smu_in_non_protection_mode()  argument
165 	PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL(hwmgr, SMC_IND,  in fiji_start_smu_in_non_protection_mode()
169 	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_non_protection_mode()
173 	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_non_protection_mode()
176 	result = smu7_upload_smu_firmware_image(hwmgr);  in fiji_start_smu_in_non_protection_mode()
181 	smu7_program_jump_on_start(hwmgr);  in fiji_start_smu_in_non_protection_mode()
184 	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_non_protection_mode()
188 	PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_start_smu_in_non_protection_mode()
192 	PHM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND,  in fiji_start_smu_in_non_protection_mode()
198 static int fiji_start_avfs_btc(struct pp_hwmgr *hwmgr)  in fiji_start_avfs_btc()  argument
201 	struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);  in fiji_start_avfs_btc()
204 		if (0 != smum_send_msg_to_smc_with_parameter(hwmgr,  in fiji_start_avfs_btc()
213 	cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000);  in fiji_start_avfs_btc()
215 	cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff);  in fiji_start_avfs_btc()
217 	cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0);  in fiji_start_avfs_btc()
222 static int fiji_setup_graphics_level_structure(struct pp_hwmgr *hwmgr)  in fiji_setup_graphics_level_structure()  argument
229 	PP_ASSERT_WITH_CODE(0 == smu7_read_smc_sram_dword(hwmgr,  in fiji_setup_graphics_level_structure()
244 	PP_ASSERT_WITH_CODE(0 == smu7_copy_bytes_to_smc(hwmgr, vr_config_addr,  in fiji_setup_graphics_level_structure()
252 	PP_ASSERT_WITH_CODE(0 == smu7_copy_bytes_to_smc(hwmgr, level_addr,  in fiji_setup_graphics_level_structure()
260 static int fiji_avfs_event_mgr(struct pp_hwmgr *hwmgr)  in fiji_avfs_event_mgr()  argument
262 	if (!hwmgr->avfs_supported)  in fiji_avfs_event_mgr()
265 	PP_ASSERT_WITH_CODE(0 == fiji_setup_graphics_level_structure(hwmgr),  in fiji_avfs_event_mgr()
269 	PP_ASSERT_WITH_CODE(0 == smu7_setup_pwr_virus(hwmgr),  in fiji_avfs_event_mgr()
273 	PP_ASSERT_WITH_CODE(0 == fiji_start_avfs_btc(hwmgr),  in fiji_avfs_event_mgr()
281 static int fiji_start_smu(struct pp_hwmgr *hwmgr)  in fiji_start_smu()  argument
284 	struct fiji_smumgr *priv = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_start_smu()
287 	if (!smu7_is_smc_ram_running(hwmgr) && hwmgr->not_vf) {  in fiji_start_smu()
289 		if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,  in fiji_start_smu()
292 			result = fiji_start_smu_in_non_protection_mode(hwmgr);  in fiji_start_smu()
296 			result = fiji_start_smu_in_protection_mode(hwmgr);  in fiji_start_smu()
300 		if (fiji_avfs_event_mgr(hwmgr))  in fiji_start_smu()
301 			hwmgr->avfs_supported = false;  in fiji_start_smu()
307 	smu7_read_smc_sram_dword(hwmgr,  in fiji_start_smu()
312 	result = smu7_request_smu_load_fw(hwmgr);  in fiji_start_smu()
317 static bool fiji_is_hw_avfs_present(struct pp_hwmgr *hwmgr)  in fiji_is_hw_avfs_present()  argument
322 	if (!hwmgr->not_vf)  in fiji_is_hw_avfs_present()
325 	if (!atomctrl_read_efuse(hwmgr, AVFS_EN_LSB, AVFS_EN_MSB,  in fiji_is_hw_avfs_present()
333 static int fiji_smu_init(struct pp_hwmgr *hwmgr)  in fiji_smu_init()  argument
342 	hwmgr->smu_backend = fiji_priv;  in fiji_smu_init()
344 	if (smu7_init(hwmgr)) {  in fiji_smu_init()
352 static int fiji_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr,  in fiji_get_dependency_volt_by_clk()  argument
358 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_get_dependency_volt_by_clk()
467 static void fiji_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr)  in fiji_initialize_power_tune_defaults()  argument
469 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_initialize_power_tune_defaults()
471 			(struct  phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_initialize_power_tune_defaults()
484 static int fiji_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr)  in fiji_populate_bapm_parameters_in_dpm_table()  argument
487 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_bapm_parameters_in_dpm_table()
493 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_bapm_parameters_in_dpm_table()
496 			&hwmgr->thermal_controller.advanceFanControlParameters;  in fiji_populate_bapm_parameters_in_dpm_table()
568 static int fiji_populate_svi_load_line(struct pp_hwmgr *hwmgr)  in fiji_populate_svi_load_line()  argument
570 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_svi_load_line()
582 static int fiji_populate_tdc_limit(struct pp_hwmgr *hwmgr)  in fiji_populate_tdc_limit()  argument
585 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_tdc_limit()
587 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_tdc_limit()
603 static int fiji_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset)  in fiji_populate_dw8()  argument
605 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_dw8()
609 	if (smu7_read_smc_sram_dword(hwmgr,  in fiji_populate_dw8()
627 static int fiji_populate_temperature_scaler(struct pp_hwmgr *hwmgr)  in fiji_populate_temperature_scaler()  argument
630 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_temperature_scaler()
639 static int fiji_populate_fuzzy_fan(struct pp_hwmgr *hwmgr)  in fiji_populate_fuzzy_fan()  argument
641 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_fuzzy_fan()
643 	if ((hwmgr->thermal_controller.advanceFanControlParameters.  in fiji_populate_fuzzy_fan()
645 			0 == hwmgr->thermal_controller.advanceFanControlParameters.  in fiji_populate_fuzzy_fan()
647 		hwmgr->thermal_controller.advanceFanControlParameters.  in fiji_populate_fuzzy_fan()
648 		usFanOutputSensitivity = hwmgr->thermal_controller.  in fiji_populate_fuzzy_fan()
652 			PP_HOST_TO_SMC_US(hwmgr->thermal_controller.  in fiji_populate_fuzzy_fan()
657 static int fiji_populate_gnb_lpml(struct pp_hwmgr *hwmgr)  in fiji_populate_gnb_lpml()  argument
660 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_gnb_lpml()
669 static int fiji_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr)  in fiji_populate_bapm_vddc_base_leakage_sidd()  argument
671 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_bapm_vddc_base_leakage_sidd()
673 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_bapm_vddc_base_leakage_sidd()
689 static int fiji_populate_pm_fuses(struct pp_hwmgr *hwmgr)  in fiji_populate_pm_fuses()  argument
692 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_pm_fuses()
694 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_populate_pm_fuses()
696 		if (smu7_read_smc_sram_dword(hwmgr,  in fiji_populate_pm_fuses()
705 		if (fiji_populate_svi_load_line(hwmgr))  in fiji_populate_pm_fuses()
710 		if (fiji_populate_tdc_limit(hwmgr))  in fiji_populate_pm_fuses()
714 		if (fiji_populate_dw8(hwmgr, pm_fuse_table_offset))  in fiji_populate_pm_fuses()
721 		if (0 != fiji_populate_temperature_scaler(hwmgr))  in fiji_populate_pm_fuses()
727 		if (fiji_populate_fuzzy_fan(hwmgr))  in fiji_populate_pm_fuses()
733 		if (fiji_populate_gnb_lpml(hwmgr))  in fiji_populate_pm_fuses()
739 		if (fiji_populate_bapm_vddc_base_leakage_sidd(hwmgr))  in fiji_populate_pm_fuses()
744 		if (smu7_copy_bytes_to_smc(hwmgr, pm_fuse_table_offset,  in fiji_populate_pm_fuses()
754 static int fiji_populate_cac_table(struct pp_hwmgr *hwmgr,  in fiji_populate_cac_table()  argument
759 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_cac_table()
761 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_cac_table()
782 static int fiji_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr,  in fiji_populate_smc_voltage_tables()  argument
787 	result = fiji_populate_cac_table(hwmgr, table);  in fiji_populate_smc_voltage_tables()
795 static int fiji_populate_ulv_level(struct pp_hwmgr *hwmgr,  in fiji_populate_ulv_level()  argument
801 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_ulv_level()
820 static int fiji_populate_ulv_state(struct pp_hwmgr *hwmgr,  in fiji_populate_ulv_state()  argument
823 	return fiji_populate_ulv_level(hwmgr, &table->Ulv);  in fiji_populate_ulv_state()
826 static int fiji_populate_smc_link_level(struct pp_hwmgr *hwmgr,  in fiji_populate_smc_link_level()  argument
829 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_smc_link_level()
831 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_smc_link_level()
855 static int fiji_calculate_sclk_params(struct pp_hwmgr *hwmgr,  in fiji_calculate_sclk_params()  argument
858 	const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_calculate_sclk_params()
871 	result = atomctrl_get_engine_pll_dividers_vi(hwmgr, clock,  &dividers);  in fiji_calculate_sclk_params()
878 	ref_clock = atomctrl_get_reference_clock(hwmgr);  in fiji_calculate_sclk_params()
898 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_calculate_sclk_params()
903 		if (!atomctrl_get_engine_clock_spread_spectrum(hwmgr,  in fiji_calculate_sclk_params()
936 static int fiji_populate_single_graphic_level(struct pp_hwmgr *hwmgr,  in fiji_populate_single_graphic_level()  argument
942 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_single_graphic_level()
944 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_single_graphic_level()
947 	result = fiji_calculate_sclk_params(hwmgr, clock, level);  in fiji_populate_single_graphic_level()
949 	if (hwmgr->od_enabled)  in fiji_populate_single_graphic_level()
955 	result = fiji_get_dependency_volt_by_clk(hwmgr,  in fiji_populate_single_graphic_level()
974 	data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr;  in fiji_populate_single_graphic_level()
976 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep))  in fiji_populate_single_graphic_level()
978 								hwmgr->display_config->min_core_set_clock_in_sr);  in fiji_populate_single_graphic_level()
999 static int fiji_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)  in fiji_populate_all_graphic_levels()  argument
1001 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_all_graphic_levels()
1002 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_all_graphic_levels()
1006 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_all_graphic_levels()
1023 		result = fiji_populate_single_graphic_level(hwmgr,  in fiji_populate_all_graphic_levels()
1086 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,  in fiji_populate_all_graphic_levels()
1142 static int fiji_calculate_mclk_params(struct pp_hwmgr *hwmgr,  in fiji_calculate_mclk_params()  argument
1148 	result = atomctrl_get_memory_pll_dividers_vi(hwmgr, clock, &mem_param);  in fiji_calculate_mclk_params()
1161 static int fiji_populate_single_memory_level(struct pp_hwmgr *hwmgr,  in fiji_populate_single_memory_level()  argument
1164 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_single_memory_level()
1166 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_single_memory_level()
1171 	if (hwmgr->od_enabled)  in fiji_populate_single_memory_level()
1177 		result = fiji_get_dependency_volt_by_clk(hwmgr,  in fiji_populate_single_memory_level()
1199 	data->display_timing.num_existing_displays = hwmgr->display_config->num_display;  in fiji_populate_single_memory_level()
1200 	data->display_timing.vrefresh = hwmgr->display_config->vrefresh;  in fiji_populate_single_memory_level()
1205 		(PHM_READ_FIELD(hwmgr->device, DPG_PIPE_STUTTER_CONTROL,  in fiji_populate_single_memory_level()
1209 	result = fiji_calculate_mclk_params(hwmgr, clock, mem_level);  in fiji_populate_single_memory_level()
1219 static int fiji_populate_all_memory_levels(struct pp_hwmgr *hwmgr)  in fiji_populate_all_memory_levels()  argument
1221 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_all_memory_levels()
1222 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_all_memory_levels()
1238 		result = fiji_populate_single_memory_level(hwmgr,  in fiji_populate_all_memory_levels()
1265 	result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels,  in fiji_populate_all_memory_levels()
1271 static int fiji_populate_mvdd_value(struct pp_hwmgr *hwmgr,  in fiji_populate_mvdd_value()  argument
1274 	const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_mvdd_value()
1276 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_mvdd_value()
1296 static int fiji_populate_smc_acpi_level(struct pp_hwmgr *hwmgr,  in fiji_populate_smc_acpi_level()  argument
1300 	const struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_smc_acpi_level()
1302 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_smc_acpi_level()
1317 		result = fiji_get_dependency_volt_by_clk(hwmgr,  in fiji_populate_smc_acpi_level()
1333 	result = atomctrl_get_engine_pll_dividers_vi(hwmgr,  in fiji_populate_smc_acpi_level()
1375 		result = fiji_get_dependency_volt_by_clk(hwmgr,  in fiji_populate_smc_acpi_level()
1394 		if (!fiji_populate_mvdd_value(hwmgr,  in fiji_populate_smc_acpi_level()
1418 static int fiji_populate_smc_vce_level(struct pp_hwmgr *hwmgr,  in fiji_populate_smc_vce_level()  argument
1425 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_smc_vce_level()
1443 		result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,  in fiji_populate_smc_vce_level()
1457 static int fiji_populate_smc_acp_level(struct pp_hwmgr *hwmgr,  in fiji_populate_smc_acp_level()  argument
1464 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_smc_acp_level()
1480 		result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,  in fiji_populate_smc_acp_level()
1493 static int fiji_populate_memory_timing_parameters(struct pp_hwmgr *hwmgr,  in fiji_populate_memory_timing_parameters()  argument
1503 	result = atomctrl_set_engine_dram_timings_rv770(hwmgr,  in fiji_populate_memory_timing_parameters()
1508 	dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);  in fiji_populate_memory_timing_parameters()
1509 	dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);  in fiji_populate_memory_timing_parameters()
1510 	burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME);  in fiji_populate_memory_timing_parameters()
1524 static int fiji_program_memory_timing_parameters(struct pp_hwmgr *hwmgr)  in fiji_program_memory_timing_parameters()  argument
1526 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_program_memory_timing_parameters()
1527 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_program_memory_timing_parameters()
1534 			result = fiji_populate_memory_timing_parameters(hwmgr,  in fiji_program_memory_timing_parameters()
1545 				hwmgr,  in fiji_program_memory_timing_parameters()
1553 static int fiji_populate_smc_uvd_level(struct pp_hwmgr *hwmgr,  in fiji_populate_smc_uvd_level()  argument
1560 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_smc_uvd_level()
1578 		result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,  in fiji_populate_smc_uvd_level()
1585 		result = atomctrl_get_dfs_pll_dividers_vi(hwmgr,  in fiji_populate_smc_uvd_level()
1600 static int fiji_populate_smc_boot_level(struct pp_hwmgr *hwmgr,  in fiji_populate_smc_boot_level()  argument
1603 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_smc_boot_level()
1631 static int fiji_populate_smc_initailial_state(struct pp_hwmgr *hwmgr)  in fiji_populate_smc_initailial_state()  argument
1633 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_smc_initailial_state()
1634 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_smc_initailial_state()
1636 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_smc_initailial_state()
1660 static int fiji_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr)  in fiji_populate_clock_stretcher_data_table()  argument
1665 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_populate_clock_stretcher_data_table()
1669 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_populate_clock_stretcher_data_table()
1678 	efuse = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_populate_clock_stretcher_data_table()
1680 	efuse2 = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_populate_clock_stretcher_data_table()
1715 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE,  in fiji_populate_clock_stretcher_data_table()
1717 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE,  in fiji_populate_clock_stretcher_data_table()
1719 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE,  in fiji_populate_clock_stretcher_data_table()
1721 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, PWR_CKS_ENABLE,  in fiji_populate_clock_stretcher_data_table()
1730 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_populate_clock_stretcher_data_table()
1737 	value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_populate_clock_stretcher_data_table()
1769 	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_populate_clock_stretcher_data_table()
1810 	value = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL);  in fiji_populate_clock_stretcher_data_table()
1812 	cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixPWR_CKS_CNTL, value);  in fiji_populate_clock_stretcher_data_table()
1817 static int fiji_populate_vr_config(struct pp_hwmgr *hwmgr,  in fiji_populate_vr_config()  argument
1820 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_populate_vr_config()
1861 static int fiji_init_arb_table_index(struct pp_hwmgr *hwmgr)  in fiji_init_arb_table_index()  argument
1863 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_init_arb_table_index()
1875 	result = smu7_read_smc_sram_dword(hwmgr,  in fiji_init_arb_table_index()
1884 	return smu7_write_smc_sram_dword(hwmgr,  in fiji_init_arb_table_index()
1888 static int fiji_setup_dpm_led_config(struct pp_hwmgr *hwmgr)  in fiji_setup_dpm_led_config()  argument
1894 	result = atomctrl_get_voltage_table_v3(hwmgr,  in fiji_setup_dpm_led_config()
1911 		smum_send_msg_to_smc_with_parameter(hwmgr,  in fiji_setup_dpm_led_config()
1918 static int fiji_init_smc_table(struct pp_hwmgr *hwmgr)  in fiji_init_smc_table()  argument
1921 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_init_smc_table()
1922 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_init_smc_table()
1924 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_init_smc_table()
1929 	fiji_initialize_power_tune_defaults(hwmgr);  in fiji_init_smc_table()
1932 		fiji_populate_smc_voltage_tables(hwmgr, table);  in fiji_init_smc_table()
1936 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
1940 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
1948 		result = fiji_populate_ulv_state(hwmgr, table);  in fiji_init_smc_table()
1951 		cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,  in fiji_init_smc_table()
1955 	result = fiji_populate_smc_link_level(hwmgr, table);  in fiji_init_smc_table()
1959 	result = fiji_populate_all_graphic_levels(hwmgr);  in fiji_init_smc_table()
1963 	result = fiji_populate_all_memory_levels(hwmgr);  in fiji_init_smc_table()
1967 	result = fiji_populate_smc_acpi_level(hwmgr, table);  in fiji_init_smc_table()
1971 	result = fiji_populate_smc_vce_level(hwmgr, table);  in fiji_init_smc_table()
1975 	result = fiji_populate_smc_acp_level(hwmgr, table);  in fiji_init_smc_table()
1983 	result = fiji_program_memory_timing_parameters(hwmgr);  in fiji_init_smc_table()
1987 	result = fiji_populate_smc_uvd_level(hwmgr, table);  in fiji_init_smc_table()
1991 	result = fiji_populate_smc_boot_level(hwmgr, table);  in fiji_init_smc_table()
1995 	result = fiji_populate_smc_initailial_state(hwmgr);  in fiji_init_smc_table()
1999 	result = fiji_populate_bapm_parameters_in_dpm_table(hwmgr);  in fiji_init_smc_table()
2003 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2005 		result = fiji_populate_clock_stretcher_data_table(hwmgr);  in fiji_init_smc_table()
2031 	result = fiji_populate_vr_config(hwmgr, table);  in fiji_init_smc_table()
2038 	if (atomctrl_get_pp_assign_pin(hwmgr, VDDC_VRHOT_GPIO_PINID, &gpio_pin)) {  in fiji_init_smc_table()
2040 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2044 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2048 	if (atomctrl_get_pp_assign_pin(hwmgr, PP_AC_DC_SWITCH_GPIO_PINID,  in fiji_init_smc_table()
2051 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2055 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2060 	if (atomctrl_get_pp_assign_pin(hwmgr, THERMAL_INT_OUTPUT_GPIO_PINID,  in fiji_init_smc_table()
2062 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2072 		table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &  in fiji_init_smc_table()
2077 		if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2079 			phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2083 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_init_smc_table()
2104 	result = smu7_copy_bytes_to_smc(hwmgr,  in fiji_init_smc_table()
2113 	result = fiji_init_arb_table_index(hwmgr);  in fiji_init_smc_table()
2117 	result = fiji_populate_pm_fuses(hwmgr);  in fiji_init_smc_table()
2121 	result = fiji_setup_dpm_led_config(hwmgr);  in fiji_init_smc_table()
2128 static int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)  in fiji_thermal_setup_fan_table()  argument
2130 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_thermal_setup_fan_table()
2140 	if (hwmgr->thermal_controller.fanInfo.bNoFan) {  in fiji_thermal_setup_fan_table()
2141 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_thermal_setup_fan_table()
2147 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_thermal_setup_fan_table()
2152 	duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,  in fiji_thermal_setup_fan_table()
2156 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_thermal_setup_fan_table()
2161 	tmp64 = hwmgr->thermal_controller.advanceFanControlParameters.  in fiji_thermal_setup_fan_table()
2166 	t_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usTMed -  in fiji_thermal_setup_fan_table()
2167 			hwmgr->thermal_controller.advanceFanControlParameters.usTMin;  in fiji_thermal_setup_fan_table()
2168 	t_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usTHigh -  in fiji_thermal_setup_fan_table()
2169 			hwmgr->thermal_controller.advanceFanControlParameters.usTMed;  in fiji_thermal_setup_fan_table()
2171 	pwm_diff1 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed -  in fiji_thermal_setup_fan_table()
2172 			hwmgr->thermal_controller.advanceFanControlParameters.usPWMMin;  in fiji_thermal_setup_fan_table()
2173 	pwm_diff2 = hwmgr->thermal_controller.advanceFanControlParameters.usPWMHigh -  in fiji_thermal_setup_fan_table()
2174 			hwmgr->thermal_controller.advanceFanControlParameters.usPWMMed;  in fiji_thermal_setup_fan_table()
2179 	fan_table.TempMin = cpu_to_be16((50 + hwmgr->  in fiji_thermal_setup_fan_table()
2181 	fan_table.TempMed = cpu_to_be16((50 + hwmgr->  in fiji_thermal_setup_fan_table()
2183 	fan_table.TempMax = cpu_to_be16((50 + hwmgr->  in fiji_thermal_setup_fan_table()
2191 	fan_table.HystDown = cpu_to_be16(hwmgr->  in fiji_thermal_setup_fan_table()
2200 	reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);  in fiji_thermal_setup_fan_table()
2202 	fan_table.RefreshPeriod = cpu_to_be32((hwmgr->  in fiji_thermal_setup_fan_table()
2209 			hwmgr->device, CGS_IND_REG__SMC,  in fiji_thermal_setup_fan_table()
2212 	res = smu7_copy_bytes_to_smc(hwmgr, smu_data->smu7_data.fan_table_start,  in fiji_thermal_setup_fan_table()
2216 	if (!res && hwmgr->thermal_controller.  in fiji_thermal_setup_fan_table()
2218 		res = smum_send_msg_to_smc_with_parameter(hwmgr,  in fiji_thermal_setup_fan_table()
2220 				hwmgr->thermal_controller.  in fiji_thermal_setup_fan_table()
2224 	if (!res && hwmgr->thermal_controller.  in fiji_thermal_setup_fan_table()
2226 		res = smum_send_msg_to_smc_with_parameter(hwmgr,  in fiji_thermal_setup_fan_table()
2228 				hwmgr->thermal_controller.  in fiji_thermal_setup_fan_table()
2233 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in fiji_thermal_setup_fan_table()
2240 static int fiji_thermal_avfs_enable(struct pp_hwmgr *hwmgr)  in fiji_thermal_avfs_enable()  argument
2242 	if (!hwmgr->avfs_supported)  in fiji_thermal_avfs_enable()
2245 	smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs, NULL);  in fiji_thermal_avfs_enable()
2250 static int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)  in fiji_program_mem_timing_parameters()  argument
2252 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_program_mem_timing_parameters()
2256 		return fiji_program_memory_timing_parameters(hwmgr);  in fiji_program_mem_timing_parameters()
2261 static int fiji_update_sclk_threshold(struct pp_hwmgr *hwmgr)  in fiji_update_sclk_threshold()  argument
2263 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_update_sclk_threshold()
2264 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_update_sclk_threshold()
2269 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_update_sclk_threshold()
2278 				hwmgr,  in fiji_update_sclk_threshold()
2286 	result = fiji_program_mem_timing_parameters(hwmgr);  in fiji_update_sclk_threshold()
2365 static int fiji_update_uvd_smc_table(struct pp_hwmgr *hwmgr)  in fiji_update_uvd_smc_table()  argument
2367 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_update_uvd_smc_table()
2370 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_update_uvd_smc_table()
2380 	mm_boot_level_value = cgs_read_ind_register(hwmgr->device,  in fiji_update_uvd_smc_table()
2384 	cgs_write_ind_register(hwmgr->device,  in fiji_update_uvd_smc_table()
2387 	if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_update_uvd_smc_table()
2389 		phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_update_uvd_smc_table()
2391 		smum_send_msg_to_smc_with_parameter(hwmgr,  in fiji_update_uvd_smc_table()
2398 static int fiji_update_vce_smc_table(struct pp_hwmgr *hwmgr)  in fiji_update_vce_smc_table()  argument
2400 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_update_vce_smc_table()
2403 			(struct phm_ppt_v1_information *)(hwmgr->pptable);  in fiji_update_vce_smc_table()
2405 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,  in fiji_update_vce_smc_table()
2416 	mm_boot_level_value = cgs_read_ind_register(hwmgr->device,  in fiji_update_vce_smc_table()
2420 	cgs_write_ind_register(hwmgr->device,  in fiji_update_vce_smc_table()
2423 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_StablePState))  in fiji_update_vce_smc_table()
2424 		smum_send_msg_to_smc_with_parameter(hwmgr,  in fiji_update_vce_smc_table()
2431 static int fiji_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)  in fiji_update_smc_table()  argument
2435 		fiji_update_uvd_smc_table(hwmgr);  in fiji_update_smc_table()
2438 		fiji_update_vce_smc_table(hwmgr);  in fiji_update_smc_table()
2446 static int fiji_process_firmware_header(struct pp_hwmgr *hwmgr)  in fiji_process_firmware_header()  argument
2448 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_process_firmware_header()
2449 	struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(hwmgr->smu_backend);  in fiji_process_firmware_header()
2454 	result = smu7_read_smc_sram_dword(hwmgr,  in fiji_process_firmware_header()
2464 	result = smu7_read_smc_sram_dword(hwmgr,  in fiji_process_firmware_header()
2476 	result = smu7_read_smc_sram_dword(hwmgr,  in fiji_process_firmware_header()
2484 	result = smu7_read_smc_sram_dword(hwmgr,  in fiji_process_firmware_header()
2494 	result = smu7_read_smc_sram_dword(hwmgr,  in fiji_process_firmware_header()
2504 	result = smu7_read_smc_sram_dword(hwmgr,  in fiji_process_firmware_header()
2510 		hwmgr->microcode_version_info.SMC = tmp;  in fiji_process_firmware_header()
2517 static int fiji_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)  in fiji_initialize_mc_reg_table()  argument
2523 	cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP,  in fiji_initialize_mc_reg_table()
2524 			cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));  in fiji_initialize_mc_reg_table()
2525 	cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP,  in fiji_initialize_mc_reg_table()
2526 			cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));  in fiji_initialize_mc_reg_table()
2527 	cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP,  in fiji_initialize_mc_reg_table()
2528 			cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));  in fiji_initialize_mc_reg_table()
2529 	cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP,  in fiji_initialize_mc_reg_table()
2530 			cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));  in fiji_initialize_mc_reg_table()
2531 	cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP,  in fiji_initialize_mc_reg_table()
2532 			cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));  in fiji_initialize_mc_reg_table()
2533 	cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP,  in fiji_initialize_mc_reg_table()
2534 			cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));  in fiji_initialize_mc_reg_table()
2535 	cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP,  in fiji_initialize_mc_reg_table()
2536 			cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));  in fiji_initialize_mc_reg_table()
2541 static bool fiji_is_dpm_running(struct pp_hwmgr *hwmgr)  in fiji_is_dpm_running()  argument
2543 	return (1 == PHM_READ_INDIRECT_FIELD(hwmgr->device,  in fiji_is_dpm_running()
2548 static int fiji_update_dpm_settings(struct pp_hwmgr *hwmgr,  in fiji_update_dpm_settings()  argument
2551 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);  in fiji_update_dpm_settings()
2553 			(hwmgr->smu_backend);  in fiji_update_dpm_settings()
2574 			smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL);  in fiji_update_dpm_settings()
2583 				tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));  in fiji_update_dpm_settings()
2585 				cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));  in fiji_update_dpm_settings()
2597 				tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));  in fiji_update_dpm_settings()
2600 				cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));  in fiji_update_dpm_settings()
2604 			smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL);  in fiji_update_dpm_settings()
2609 			smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL);  in fiji_update_dpm_settings()
2618 				tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));  in fiji_update_dpm_settings()
2620 				cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));  in fiji_update_dpm_settings()
2632 				tmp = PP_HOST_TO_SMC_UL(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset));  in fiji_update_dpm_settings()
2635 				cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, offset, PP_HOST_TO_SMC_UL(tmp));  in fiji_update_dpm_settings()
2639 			smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL);  in fiji_update_dpm_settings()