powerplay/inc/hwmgr.h

201 	int (*smu_init)(struct pp_hwmgr  *hwmgr);
202 	int (*smu_fini)(struct pp_hwmgr  *hwmgr);
203 	int (*start_smu)(struct pp_hwmgr  *hwmgr);
204 	int (*check_fw_load_finish)(struct pp_hwmgr  *hwmgr,
206 	int (*request_smu_load_fw)(struct pp_hwmgr  *hwmgr);
207 	int (*request_smu_load_specific_fw)(struct pp_hwmgr  *hwmgr,
209 	uint32_t (*get_argument)(struct pp_hwmgr  *hwmgr);
210 	int (*send_msg_to_smc)(struct pp_hwmgr  *hwmgr, uint16_t msg);
211 	int (*send_msg_to_smc_with_parameter)(struct pp_hwmgr  *hwmgr,
213 	int (*download_pptable_settings)(struct pp_hwmgr  *hwmgr,
215 	int (*upload_pptable_settings)(struct pp_hwmgr  *hwmgr);
216 	int (*update_smc_table)(struct pp_hwmgr *hwmgr, uint32_t type);
217 	int (*process_firmware_header)(struct pp_hwmgr *hwmgr);
218 	int (*update_sclk_threshold)(struct pp_hwmgr *hwmgr);
219 	int (*thermal_setup_fan_table)(struct pp_hwmgr *hwmgr);
220 	int (*thermal_avfs_enable)(struct pp_hwmgr *hwmgr);
221 	int (*init_smc_table)(struct pp_hwmgr *hwmgr);
222 	int (*populate_all_graphic_levels)(struct pp_hwmgr *hwmgr);
223 	int (*populate_all_memory_levels)(struct pp_hwmgr *hwmgr);
224 	int (*initialize_mc_reg_table)(struct pp_hwmgr *hwmgr);
227 	bool (*is_dpm_running)(struct pp_hwmgr *hwmgr);
228 	bool (*is_hw_avfs_present)(struct pp_hwmgr  *hwmgr);
229 	int (*update_dpm_settings)(struct pp_hwmgr *hwmgr, void *profile_setting);
230 …int (*smc_table_manager)(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw); /*rw…
231 	int (*stop_smc)(struct pp_hwmgr *hwmgr);
240 	int (*apply_state_adjust_rules)(struct pp_hwmgr *hwmgr,
244 	int (*apply_clocks_adjust_rules)(struct pp_hwmgr *hwmgr);
254 	int (*patch_boot_state)(struct pp_hwmgr *hwmgr,
257 	int (*get_pp_table_entry)(struct pp_hwmgr *hwmgr,
259 	int (*get_num_of_pp_table_entries)(struct pp_hwmgr *hwmgr);
260 	int (*powerdown_uvd)(struct pp_hwmgr *hwmgr);
261 	void (*powergate_vce)(struct pp_hwmgr *hwmgr, bool bgate);
262 	void (*powergate_uvd)(struct pp_hwmgr *hwmgr, bool bgate);
263 	void (*powergate_acp)(struct pp_hwmgr *hwmgr, bool bgate);
264 	uint32_t (*get_mclk)(struct pp_hwmgr *hwmgr, bool low);
265 	uint32_t (*get_sclk)(struct pp_hwmgr *hwmgr, bool low);
266 	int (*power_state_set)(struct pp_hwmgr *hwmgr,
268 	int (*notify_smc_display_config_after_ps_adjustment)(struct pp_hwmgr *hwmgr);
269 	int (*pre_display_config_changed)(struct pp_hwmgr *hwmgr);
270 	int (*display_config_changed)(struct pp_hwmgr *hwmgr);
271 	int (*disable_clock_power_gating)(struct pp_hwmgr *hwmgr);
272 	int (*update_clock_gatings)(struct pp_hwmgr *hwmgr,
274 	int (*set_max_fan_rpm_output)(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_pwm);
275 	int (*set_max_fan_pwm_output)(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_pwm);
276 	int (*stop_thermal_controller)(struct pp_hwmgr *hwmgr);
277 	int (*get_fan_speed_info)(struct pp_hwmgr *hwmgr, struct phm_fan_speed_info *fan_speed_info);
278 	void (*set_fan_control_mode)(struct pp_hwmgr *hwmgr, uint32_t mode);
279 	uint32_t (*get_fan_control_mode)(struct pp_hwmgr *hwmgr);
280 	int (*set_fan_speed_pwm)(struct pp_hwmgr *hwmgr, uint32_t speed);
281 	int (*get_fan_speed_pwm)(struct pp_hwmgr *hwmgr, uint32_t *speed);
282 	int (*set_fan_speed_rpm)(struct pp_hwmgr *hwmgr, uint32_t speed);
283 	int (*get_fan_speed_rpm)(struct pp_hwmgr *hwmgr, uint32_t *speed);
284 	int (*reset_fan_speed_to_default)(struct pp_hwmgr *hwmgr);
285 	int (*uninitialize_thermal_controller)(struct pp_hwmgr *hwmgr);
286 	int (*register_irq_handlers)(struct pp_hwmgr *hwmgr);
287 	bool (*check_smc_update_required_for_display_configuration)(struct pp_hwmgr *hwmgr);
288 	int (*check_states_equal)(struct pp_hwmgr *hwmgr,
292 	int (*set_cpu_power_state)(struct pp_hwmgr *hwmgr);
293 	int (*store_cc6_data)(struct pp_hwmgr *hwmgr, uint32_t separation_time,
296 	int (*get_dal_power_level)(struct pp_hwmgr *hwmgr,
300 	int (*get_current_shallow_sleep_clocks)(struct pp_hwmgr *hwmgr,
302 …int (*get_clock_by_type)(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks…
303 	int (*get_clock_by_type_with_latency)(struct pp_hwmgr *hwmgr,
306 	int (*get_clock_by_type_with_voltage)(struct pp_hwmgr *hwmgr,
309 	int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
310 	int (*display_clock_voltage_request)(struct pp_hwmgr *hwmgr,
312 	int (*get_max_high_clocks)(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks);
313 	int (*power_off_asic)(struct pp_hwmgr *hwmgr);
314 	int (*force_clock_level)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask);
315 	int (*emit_clock_levels)(struct pp_hwmgr *hwmgr,
317 	int (*print_clock_levels)(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf);
318 	int (*powergate_gfx)(struct pp_hwmgr *hwmgr, bool enable);
319 	int (*get_sclk_od)(struct pp_hwmgr *hwmgr);
320 	int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value);
321 	int (*get_mclk_od)(struct pp_hwmgr *hwmgr);
322 	int (*set_mclk_od)(struct pp_hwmgr *hwmgr, uint32_t value);
323 	int (*read_sensor)(struct pp_hwmgr *hwmgr, int idx, void *value, int *size);
324 	int (*avfs_control)(struct pp_hwmgr *hwmgr, bool enable);
325 	int (*disable_smc_firmware_ctf)(struct pp_hwmgr *hwmgr);
326 	int (*set_active_display_count)(struct pp_hwmgr *hwmgr, uint32_t count);
327 	int (*set_min_deep_sleep_dcefclk)(struct pp_hwmgr *hwmgr, uint32_t clock);
328 	int (*start_thermal_controller)(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range);
329 	int (*notify_cac_buffer_info)(struct pp_hwmgr *hwmgr,
335 	int (*get_thermal_temperature_range)(struct pp_hwmgr *hwmgr,
337 	int (*get_power_profile_mode)(struct pp_hwmgr *hwmgr, char *buf);
338 	int (*set_power_profile_mode)(struct pp_hwmgr *hwmgr, long *input, uint32_t size);
339 	int (*odn_edit_dpm_table)(struct pp_hwmgr *hwmgr,
342 	int (*set_fine_grain_clk_vol)(struct pp_hwmgr *hwmgr,
345 	int (*set_power_limit)(struct pp_hwmgr *hwmgr, uint32_t n);
346 	int (*powergate_mmhub)(struct pp_hwmgr *hwmgr);
347 	int (*smus_notify_pwe)(struct pp_hwmgr *hwmgr);
348 	int (*powergate_sdma)(struct pp_hwmgr *hwmgr, bool bgate);
349 	int (*enable_mgpu_fan_boost)(struct pp_hwmgr *hwmgr);
350 	int (*set_hard_min_dcefclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
351 	int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
352 	int (*set_hard_min_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
353 	int (*set_soft_max_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
354 	int (*get_bamaco_support)(struct pp_hwmgr *hwmgr);
355 	int (*get_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
356 	int (*set_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
357 	int (*get_ppfeature_status)(struct pp_hwmgr *hwmgr, char *buf);
358 	int (*set_ppfeature_status)(struct pp_hwmgr *hwmgr, uint64_t ppfeature_masks);
359 	int (*set_mp1_state)(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state);
360 	int (*asic_reset)(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode);
361 	int (*smu_i2c_bus_access)(struct pp_hwmgr *hwmgr, bool acquire);
362 	int (*set_df_cstate)(struct pp_hwmgr *hwmgr, enum pp_df_cstate state);
363 	int (*set_xgmi_pstate)(struct pp_hwmgr *hwmgr, uint32_t pstate);
364 	int (*disable_power_features_for_compute_performance)(struct pp_hwmgr *hwmgr,
366 	ssize_t (*get_gpu_metrics)(struct pp_hwmgr *hwmgr, void **table);
367 	int (*gfx_state_change)(struct pp_hwmgr *hwmgr, uint32_t state);
375 						struct pp_hwmgr *hwmgr,
816 int hwmgr_early_init(struct pp_hwmgr *hwmgr);
817 int hwmgr_sw_init(struct pp_hwmgr *hwmgr);
818 int hwmgr_sw_fini(struct pp_hwmgr *hwmgr);
819 int hwmgr_hw_init(struct pp_hwmgr *hwmgr);
820 int hwmgr_hw_fini(struct pp_hwmgr *hwmgr);
821 int hwmgr_suspend(struct pp_hwmgr *hwmgr);
822 int hwmgr_resume(struct pp_hwmgr *hwmgr);
824 int hwmgr_handle_task(struct pp_hwmgr *hwmgr,
831 int smu7_init_function_pointers(struct pp_hwmgr *hwmgr);
832 int smu8_init_function_pointers(struct pp_hwmgr *hwmgr);
833 int vega12_hwmgr_init(struct pp_hwmgr *hwmgr);
834 int vega20_hwmgr_init(struct pp_hwmgr *hwmgr);