57 static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,
59 static int vega12_get_clock_ranges(struct pp_hwmgr *hwmgr,
64 static void vega12_set_default_registry_data(struct pp_hwmgr *hwmgr)  in vega12_set_default_registry_data()  argument
67 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_set_default_registry_data()
135 	data->registry_data.pcie_dpm_key_disabled = !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);  in vega12_set_default_registry_data()
138 static int vega12_set_features_platform_caps(struct pp_hwmgr *hwmgr)  in vega12_set_features_platform_caps()  argument
141 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_set_features_platform_caps()
142 	struct amdgpu_device *adev = hwmgr->adev;  in vega12_set_features_platform_caps()
145 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
148 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
151 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
155 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
157 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
162 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
165 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
169 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
172 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
174 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
178 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
180 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
185 			phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
188 			phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
190 			phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
197 			&& hwmgr->thermal_controller.advanceFanControlParameters.usTMax)  in vega12_set_features_platform_caps()
198 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
201 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
203 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
205 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
209 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
212 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
216 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
221 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
223 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
225 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
227 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
229 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
231 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
233 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
235 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
237 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
239 	phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
243 		phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DiDtSupport);  in vega12_set_features_platform_caps()
245 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SQRamping);  in vega12_set_features_platform_caps()
247 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DBRamping);  in vega12_set_features_platform_caps()
249 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_TDRamping);  in vega12_set_features_platform_caps()
251 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_TCPRamping);  in vega12_set_features_platform_caps()
253 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DBRRamping);  in vega12_set_features_platform_caps()
255 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DiDtEDCEnable);  in vega12_set_features_platform_caps()
257 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_GCEDC);  in vega12_set_features_platform_caps()
259 			phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PSM);  in vega12_set_features_platform_caps()
262 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
266 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
268 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
273 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
275 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
277 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
282 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
285 			phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
290 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,  in vega12_set_features_platform_caps()
296 static int vega12_init_dpm_defaults(struct pp_hwmgr *hwmgr)  in vega12_init_dpm_defaults()  argument
298 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_init_dpm_defaults()
299 	struct amdgpu_device *adev = hwmgr->adev;  in vega12_init_dpm_defaults()
367 	ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32);  in vega12_init_dpm_defaults()
370 	ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32);  in vega12_init_dpm_defaults()
379 static int vega12_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr)  in vega12_set_private_data_based_on_pptable()  argument
384 static int vega12_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)  in vega12_hwmgr_backend_fini()  argument
386 	kfree(hwmgr->backend);  in vega12_hwmgr_backend_fini()
387 	hwmgr->backend = NULL;  in vega12_hwmgr_backend_fini()
392 static int vega12_hwmgr_backend_init(struct pp_hwmgr *hwmgr)  in vega12_hwmgr_backend_init()  argument
396 	struct amdgpu_device *adev = hwmgr->adev;  in vega12_hwmgr_backend_init()
402 	hwmgr->backend = data;  in vega12_hwmgr_backend_init()
404 	vega12_set_default_registry_data(hwmgr);  in vega12_hwmgr_backend_init()
417 	vega12_set_features_platform_caps(hwmgr);  in vega12_hwmgr_backend_init()
419 	result = vega12_init_dpm_defaults(hwmgr);  in vega12_hwmgr_backend_init()
426 	vega12_set_private_data_based_on_pptable(hwmgr);  in vega12_hwmgr_backend_init()
430 	hwmgr->platform_descriptor.hardwareActivityPerformanceLevels =  in vega12_hwmgr_backend_init()
432 	hwmgr->platform_descriptor.hardwarePerformanceLevels = 2;  in vega12_hwmgr_backend_init()
433 	hwmgr->platform_descriptor.minimumClocksReductionPercentage = 50;  in vega12_hwmgr_backend_init()
435 	hwmgr->platform_descriptor.vbiosInterruptId = 0x20000400; /* IRQ_SOURCE1_SW_INT */  in vega12_hwmgr_backend_init()
437 	hwmgr->platform_descriptor.clockStep.engineClock = 500;  in vega12_hwmgr_backend_init()
438 	hwmgr->platform_descriptor.clockStep.memoryClock = 500;  in vega12_hwmgr_backend_init()
443 			hwmgr->thermal_controller.advanceFanControlParameters.usMaxFanRPM;  in vega12_hwmgr_backend_init()
445 			hwmgr->thermal_controller.advanceFanControlParameters.ucTargetTemperature;  in vega12_hwmgr_backend_init()
447 			hwmgr->thermal_controller.advanceFanControlParameters.ulMinFanSCLKAcousticLimit;  in vega12_hwmgr_backend_init()
449 			hwmgr->thermal_controller.advanceFanControlParameters.usFanPWMMinLimit *  in vega12_hwmgr_backend_init()
450 			hwmgr->thermal_controller.fanInfo.ulMaxRPM / 100;  in vega12_hwmgr_backend_init()
452 	if (hwmgr->feature_mask & PP_GFXOFF_MASK)  in vega12_hwmgr_backend_init()
460 static int vega12_init_sclk_threshold(struct pp_hwmgr *hwmgr)  in vega12_init_sclk_threshold()  argument
463 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_init_sclk_threshold()
470 static int vega12_setup_asic_task(struct pp_hwmgr *hwmgr)  in vega12_setup_asic_task()  argument
472 	PP_ASSERT_WITH_CODE(!vega12_init_sclk_threshold(hwmgr),  in vega12_setup_asic_task()
494 static int vega12_override_pcie_parameters(struct pp_hwmgr *hwmgr)  in vega12_override_pcie_parameters()  argument
496 	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);  in vega12_override_pcie_parameters()
498 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_override_pcie_parameters()
539 			ret = smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_override_pcie_parameters()
556 			ret = smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_override_pcie_parameters()
566 		ret = vega12_enable_smc_features(hwmgr,  in vega12_override_pcie_parameters()
578 static int vega12_get_number_of_dpm_level(struct pp_hwmgr *hwmgr,  in vega12_get_number_of_dpm_level()  argument
583 	ret = smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_get_number_of_dpm_level()
594 static int vega12_get_dpm_frequency_by_index(struct pp_hwmgr *hwmgr,  in vega12_get_dpm_frequency_by_index()  argument
601 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_get_dpm_frequency_by_index()
610 static int vega12_setup_single_dpm_table(struct pp_hwmgr *hwmgr,  in vega12_setup_single_dpm_table()  argument
616 	ret = vega12_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels);  in vega12_setup_single_dpm_table()
624 		ret = vega12_get_dpm_frequency_by_index(hwmgr, clk_id, i, &clk);  in vega12_setup_single_dpm_table()
643 static int vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)  in vega12_setup_default_dpm_tables()  argument
647 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_setup_default_dpm_tables()
656 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_SOCCLK);  in vega12_setup_default_dpm_tables()
669 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_GFXCLK);  in vega12_setup_default_dpm_tables()
682 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_UCLK);  in vega12_setup_default_dpm_tables()
695 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_ECLK);  in vega12_setup_default_dpm_tables()
708 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_VCLK);  in vega12_setup_default_dpm_tables()
721 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_DCLK);  in vega12_setup_default_dpm_tables()
734 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_DCEFCLK);  in vega12_setup_default_dpm_tables()
747 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_PIXCLK);  in vega12_setup_default_dpm_tables()
758 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_DISPCLK);  in vega12_setup_default_dpm_tables()
769 		ret = vega12_setup_single_dpm_table(hwmgr, dpm_table, PPCLK_PHYCLK);  in vega12_setup_default_dpm_tables()
785 static int vega12_save_default_power_profile(struct pp_hwmgr *hwmgr)
787 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
791 	hwmgr->default_gfx_power_profile.type = AMD_PP_GFX_PROFILE;
792 	hwmgr->default_compute_power_profile.type = AMD_PP_COMPUTE_PROFILE;
804 	hwmgr->default_compute_power_profile.min_sclk =
807 	hwmgr->gfx_power_profile = hwmgr->default_gfx_power_profile;
808 	hwmgr->compute_power_profile = hwmgr->default_compute_power_profile;
820 static int vega12_init_smc_table(struct pp_hwmgr *hwmgr)  in vega12_init_smc_table()  argument
824 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_init_smc_table()
828 		(struct phm_ppt_v3_information *)hwmgr->pptable;  in vega12_init_smc_table()
830 	result = pp_atomfwctrl_get_vbios_bootup_values(hwmgr, &boot_up_values);  in vega12_init_smc_table()
843 		smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_init_smc_table()
851 	result = smum_smc_table_manager(hwmgr,  in vega12_init_smc_table()
859 static int vega12_run_acg_btc(struct pp_hwmgr *hwmgr)  in vega12_run_acg_btc()  argument
864 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc, &result) == 0,  in vega12_run_acg_btc()
874 static int vega12_set_allowed_featuresmask(struct pp_hwmgr *hwmgr)  in vega12_set_allowed_featuresmask()  argument
877 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_set_allowed_featuresmask()
888 …smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_SetAllowedFeaturesMaskHigh, allowed_features_…  in vega12_set_allowed_featuresmask()
894 …smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_SetAllowedFeaturesMaskLow, allowed_features_l…  in vega12_set_allowed_featuresmask()
902 static void vega12_init_powergate_state(struct pp_hwmgr *hwmgr)  in vega12_init_powergate_state()  argument
905 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_init_powergate_state()
917 static int vega12_enable_all_smu_features(struct pp_hwmgr *hwmgr)  in vega12_enable_all_smu_features()  argument
920 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_enable_all_smu_features()
926 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAllSmuFeatures, NULL) == 0,  in vega12_enable_all_smu_features()
930 	if (vega12_get_enabled_smc_features(hwmgr, &features_enabled) == 0) {  in vega12_enable_all_smu_features()
938 	vega12_init_powergate_state(hwmgr);  in vega12_enable_all_smu_features()
943 static int vega12_disable_all_smu_features(struct pp_hwmgr *hwmgr)  in vega12_disable_all_smu_features()  argument
946 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_disable_all_smu_features()
952 		smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableAllSmuFeatures, NULL) == 0,  in vega12_disable_all_smu_features()
956 	if (vega12_get_enabled_smc_features(hwmgr, &features_enabled) == 0) {  in vega12_disable_all_smu_features()
968 		struct pp_hwmgr *hwmgr)  in vega12_odn_initialize_default_settings()  argument
973 static int vega12_set_overdrive_target_percentage(struct pp_hwmgr *hwmgr,  in vega12_set_overdrive_target_percentage()  argument
976 	return smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_set_overdrive_target_percentage()
981 static int vega12_power_control_set_level(struct pp_hwmgr *hwmgr)  in vega12_power_control_set_level()  argument
987 				hwmgr->platform_descriptor.TDPAdjustmentPolarity ?  in vega12_power_control_set_level()
988 				hwmgr->platform_descriptor.TDPAdjustment :  in vega12_power_control_set_level()
989 				(-1 * hwmgr->platform_descriptor.TDPAdjustment);  in vega12_power_control_set_level()
990 		result = vega12_set_overdrive_target_percentage(hwmgr,  in vega12_power_control_set_level()
996 static int vega12_get_all_clock_ranges_helper(struct pp_hwmgr *hwmgr,  in vega12_get_all_clock_ranges_helper()  argument
1001 		smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetMaxDpmFreq, (clkid << 16),  in vega12_get_all_clock_ranges_helper()
1008 		smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetMinDpmFreq, (clkid << 16),  in vega12_get_all_clock_ranges_helper()
1015 		smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetDcModeMaxDpmFreq, (clkid << 16),  in vega12_get_all_clock_ranges_helper()
1023 static int vega12_get_all_clock_ranges(struct pp_hwmgr *hwmgr)  in vega12_get_all_clock_ranges()  argument
1026 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_all_clock_ranges()
1030 		PP_ASSERT_WITH_CODE(!vega12_get_all_clock_ranges_helper(hwmgr,  in vega12_get_all_clock_ranges()
1038 static void vega12_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr)  in vega12_populate_umdpstate_clocks()  argument
1040 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_populate_umdpstate_clocks()
1046 		hwmgr->pstate_sclk = gfx_dpm_table->dpm_levels[VEGA12_UMD_PSTATE_GFXCLK_LEVEL].value;  in vega12_populate_umdpstate_clocks()
1047 		hwmgr->pstate_mclk = mem_dpm_table->dpm_levels[VEGA12_UMD_PSTATE_MCLK_LEVEL].value;  in vega12_populate_umdpstate_clocks()
1049 		hwmgr->pstate_sclk = gfx_dpm_table->dpm_levels[0].value;  in vega12_populate_umdpstate_clocks()
1050 		hwmgr->pstate_mclk = mem_dpm_table->dpm_levels[0].value;  in vega12_populate_umdpstate_clocks()
1053 	hwmgr->pstate_sclk_peak = gfx_dpm_table->dpm_levels[gfx_dpm_table->count].value;  in vega12_populate_umdpstate_clocks()
1054 	hwmgr->pstate_mclk_peak = mem_dpm_table->dpm_levels[mem_dpm_table->count].value;  in vega12_populate_umdpstate_clocks()
1057 static int vega12_enable_dpm_tasks(struct pp_hwmgr *hwmgr)  in vega12_enable_dpm_tasks()  argument
1061 	smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_enable_dpm_tasks()
1064 	result = vega12_set_allowed_featuresmask(hwmgr);  in vega12_enable_dpm_tasks()
1069 	tmp_result = vega12_init_smc_table(hwmgr);  in vega12_enable_dpm_tasks()
1074 	tmp_result = vega12_run_acg_btc(hwmgr);  in vega12_enable_dpm_tasks()
1079 	result = vega12_enable_all_smu_features(hwmgr);  in vega12_enable_dpm_tasks()
1084 	result = vega12_override_pcie_parameters(hwmgr);  in vega12_enable_dpm_tasks()
1089 	tmp_result = vega12_power_control_set_level(hwmgr);  in vega12_enable_dpm_tasks()
1094 	result = vega12_get_all_clock_ranges(hwmgr);  in vega12_enable_dpm_tasks()
1099 	result = vega12_odn_initialize_default_settings(hwmgr);  in vega12_enable_dpm_tasks()
1104 	result = vega12_setup_default_dpm_tables(hwmgr);  in vega12_enable_dpm_tasks()
1109 	vega12_populate_umdpstate_clocks(hwmgr);  in vega12_enable_dpm_tasks()
1114 static int vega12_patch_boot_state(struct pp_hwmgr *hwmgr,  in vega12_patch_boot_state()  argument
1159 static int vega12_upload_dpm_min_level(struct pp_hwmgr *hwmgr)  in vega12_upload_dpm_min_level()  argument
1161 	struct vega12_hwmgr *data = hwmgr->backend;  in vega12_upload_dpm_min_level()
1168 					hwmgr, PPSMC_MSG_SetSoftMinByFreq,  in vega12_upload_dpm_min_level()
1178 					hwmgr, PPSMC_MSG_SetSoftMinByFreq,  in vega12_upload_dpm_min_level()
1186 					hwmgr, PPSMC_MSG_SetHardMinByFreq,  in vega12_upload_dpm_min_level()
1197 					hwmgr, PPSMC_MSG_SetSoftMinByFreq,  in vega12_upload_dpm_min_level()
1206 					hwmgr, PPSMC_MSG_SetSoftMinByFreq,  in vega12_upload_dpm_min_level()
1217 					hwmgr, PPSMC_MSG_SetSoftMinByFreq,  in vega12_upload_dpm_min_level()
1228 					hwmgr, PPSMC_MSG_SetSoftMinByFreq,  in vega12_upload_dpm_min_level()
1239 					hwmgr, PPSMC_MSG_SetHardMinByFreq,  in vega12_upload_dpm_min_level()
1250 static int vega12_upload_dpm_max_level(struct pp_hwmgr *hwmgr)  in vega12_upload_dpm_max_level()  argument
1252 	struct vega12_hwmgr *data = hwmgr->backend;  in vega12_upload_dpm_max_level()
1260 					hwmgr, PPSMC_MSG_SetSoftMaxByFreq,  in vega12_upload_dpm_max_level()
1271 					hwmgr, PPSMC_MSG_SetSoftMaxByFreq,  in vega12_upload_dpm_max_level()
1282 					hwmgr, PPSMC_MSG_SetSoftMaxByFreq,  in vega12_upload_dpm_max_level()
1290 					hwmgr, PPSMC_MSG_SetSoftMaxByFreq,  in vega12_upload_dpm_max_level()
1301 					hwmgr, PPSMC_MSG_SetSoftMaxByFreq,  in vega12_upload_dpm_max_level()
1312 					hwmgr, PPSMC_MSG_SetSoftMaxByFreq,  in vega12_upload_dpm_max_level()
1322 int vega12_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable)  in vega12_enable_disable_vce_dpm()  argument
1325 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_enable_disable_vce_dpm()
1328 		PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(hwmgr,  in vega12_enable_disable_vce_dpm()
1339 static uint32_t vega12_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low)  in vega12_dpm_get_sclk()  argument
1342 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_dpm_get_sclk()
1350 			vega12_get_clock_ranges(hwmgr, &gfx_clk, PPCLK_GFXCLK, false) == 0,  in vega12_dpm_get_sclk()
1355 			vega12_get_clock_ranges(hwmgr, &gfx_clk, PPCLK_GFXCLK, true) == 0,  in vega12_dpm_get_sclk()
1362 static uint32_t vega12_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low)  in vega12_dpm_get_mclk()  argument
1365 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_dpm_get_mclk()
1373 			vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, false) == 0,  in vega12_dpm_get_mclk()
1378 			vega12_get_clock_ranges(hwmgr, &mem_clk, PPCLK_UCLK, true) == 0,  in vega12_dpm_get_mclk()
1385 static int vega12_get_metrics_table(struct pp_hwmgr *hwmgr,  in vega12_get_metrics_table()  argument
1390 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_metrics_table()
1396 		ret = smum_smc_table_manager(hwmgr,  in vega12_get_metrics_table()
1413 static int vega12_get_gpu_power(struct pp_hwmgr *hwmgr, uint32_t *query)  in vega12_get_gpu_power()  argument
1418 	ret = vega12_get_metrics_table(hwmgr, &metrics_table, false);  in vega12_get_gpu_power()
1427 static int vega12_get_current_gfx_clk_freq(struct pp_hwmgr *hwmgr, uint32_t *gfx_freq)  in vega12_get_current_gfx_clk_freq()  argument
1433 	PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_get_current_gfx_clk_freq()
1444 static int vega12_get_current_mclk_freq(struct pp_hwmgr *hwmgr, uint32_t *mclk_freq)  in vega12_get_current_mclk_freq()  argument
1451 			smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetDpmClockFreq, (PPCLK_UCLK << 16),  in vega12_get_current_mclk_freq()
1462 		struct pp_hwmgr *hwmgr,  in vega12_get_current_activity_percent()  argument
1469 	ret = vega12_get_metrics_table(hwmgr, &metrics_table, false);  in vega12_get_current_activity_percent()
1488 static int vega12_read_sensor(struct pp_hwmgr *hwmgr, int idx,  in vega12_read_sensor()  argument
1491 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_read_sensor()
1497 		ret = vega12_get_current_gfx_clk_freq(hwmgr, (uint32_t *)value);  in vega12_read_sensor()
1502 		ret = vega12_get_current_mclk_freq(hwmgr, (uint32_t *)value);  in vega12_read_sensor()
1508 		ret = vega12_get_current_activity_percent(hwmgr, idx, (uint32_t *)value);  in vega12_read_sensor()
1513 		*((uint32_t *)value) = vega12_thermal_get_temperature(hwmgr);  in vega12_read_sensor()
1517 		ret = vega12_get_metrics_table(hwmgr, &metrics_table, false);  in vega12_read_sensor()
1526 		ret = vega12_get_metrics_table(hwmgr, &metrics_table, false);  in vega12_read_sensor()
1543 		ret = vega12_get_gpu_power(hwmgr, (uint32_t *)value);  in vega12_read_sensor()
1548 		ret = vega12_get_enabled_smc_features(hwmgr, (uint64_t *)value);  in vega12_read_sensor()
1559 static int vega12_notify_smc_display_change(struct pp_hwmgr *hwmgr,  in vega12_notify_smc_display_change()  argument
1562 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_notify_smc_display_change()
1565 		return smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_notify_smc_display_change()
1573 static int vega12_display_clock_voltage_request(struct pp_hwmgr *hwmgr,  in vega12_display_clock_voltage_request()  argument
1577 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_display_clock_voltage_request()
1605 			result = smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_display_clock_voltage_request()
1616 		struct pp_hwmgr *hwmgr)  in vega12_notify_smc_display_config_after_ps_adjustment()  argument
1619 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_notify_smc_display_config_after_ps_adjustment()
1623 	if ((hwmgr->display_config->num_display > 1) &&  in vega12_notify_smc_display_config_after_ps_adjustment()
1624 	     !hwmgr->display_config->multi_monitor_in_sync &&  in vega12_notify_smc_display_config_after_ps_adjustment()
1625 	     !hwmgr->display_config->nb_pstate_switch_disable)  in vega12_notify_smc_display_config_after_ps_adjustment()
1626 		vega12_notify_smc_display_change(hwmgr, false);  in vega12_notify_smc_display_config_after_ps_adjustment()
1628 		vega12_notify_smc_display_change(hwmgr, true);  in vega12_notify_smc_display_config_after_ps_adjustment()
1630 	min_clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk;  in vega12_notify_smc_display_config_after_ps_adjustment()
1631 	min_clocks.dcefClockInSR = hwmgr->display_config->min_dcef_deep_sleep_set_clk;  in vega12_notify_smc_display_config_after_ps_adjustment()
1632 	min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock;  in vega12_notify_smc_display_config_after_ps_adjustment()
1637 		if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) {  in vega12_notify_smc_display_config_after_ps_adjustment()
1641 					hwmgr, PPSMC_MSG_SetMinDeepSleepDcefclk,  in vega12_notify_smc_display_config_after_ps_adjustment()
1654 static int vega12_force_dpm_highest(struct pp_hwmgr *hwmgr)  in vega12_force_dpm_highest()  argument
1657 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_force_dpm_highest()
1673 	PP_ASSERT_WITH_CODE(!vega12_upload_dpm_min_level(hwmgr),  in vega12_force_dpm_highest()
1677 	PP_ASSERT_WITH_CODE(!vega12_upload_dpm_max_level(hwmgr),  in vega12_force_dpm_highest()
1684 static int vega12_force_dpm_lowest(struct pp_hwmgr *hwmgr)  in vega12_force_dpm_lowest()  argument
1687 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_force_dpm_lowest()
1702 	PP_ASSERT_WITH_CODE(!vega12_upload_dpm_min_level(hwmgr),  in vega12_force_dpm_lowest()
1706 	PP_ASSERT_WITH_CODE(!vega12_upload_dpm_max_level(hwmgr),  in vega12_force_dpm_lowest()
1714 static int vega12_unforce_dpm_levels(struct pp_hwmgr *hwmgr)  in vega12_unforce_dpm_levels()  argument
1716 	PP_ASSERT_WITH_CODE(!vega12_upload_dpm_min_level(hwmgr),  in vega12_unforce_dpm_levels()
1720 	PP_ASSERT_WITH_CODE(!vega12_upload_dpm_max_level(hwmgr),  in vega12_unforce_dpm_levels()
1727 static int vega12_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level,  in vega12_get_profiling_clk_mask()  argument
1730 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_profiling_clk_mask()
1760 static void vega12_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode)  in vega12_set_fan_control_mode()  argument
1767 			vega12_fan_ctrl_stop_smc_fan_control(hwmgr);  in vega12_set_fan_control_mode()
1771 			vega12_fan_ctrl_start_smc_fan_control(hwmgr);  in vega12_set_fan_control_mode()
1778 static int vega12_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,  in vega12_dpm_force_dpm_level()  argument
1788 		ret = vega12_force_dpm_highest(hwmgr);  in vega12_dpm_force_dpm_level()
1791 		ret = vega12_force_dpm_lowest(hwmgr);  in vega12_dpm_force_dpm_level()
1794 		ret = vega12_unforce_dpm_levels(hwmgr);  in vega12_dpm_force_dpm_level()
1800 		ret = vega12_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask);  in vega12_dpm_force_dpm_level()
1803 		vega12_force_clock_level(hwmgr, PP_SCLK, 1 << sclk_mask);  in vega12_dpm_force_dpm_level()
1804 		vega12_force_clock_level(hwmgr, PP_MCLK, 1 << mclk_mask);  in vega12_dpm_force_dpm_level()
1815 static uint32_t vega12_get_fan_control_mode(struct pp_hwmgr *hwmgr)  in vega12_get_fan_control_mode()  argument
1817 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_fan_control_mode()
1825 static int vega12_get_dal_power_level(struct pp_hwmgr *hwmgr,  in vega12_get_dal_power_level()  argument
1830 			(struct phm_ppt_v2_information *)hwmgr->pptable;  in vega12_get_dal_power_level()
1840 static int vega12_get_clock_ranges(struct pp_hwmgr *hwmgr,  in vega12_get_clock_ranges()  argument
1845 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_clock_ranges()
1855 static int vega12_get_sclks(struct pp_hwmgr *hwmgr,  in vega12_get_sclks()  argument
1858 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_sclks()
1882 static uint32_t vega12_get_mem_latency(struct pp_hwmgr *hwmgr,  in vega12_get_mem_latency()  argument
1888 static int vega12_get_memclocks(struct pp_hwmgr *hwmgr,  in vega12_get_memclocks()  argument
1891 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_memclocks()
1907 			vega12_get_mem_latency(hwmgr, dpm_table->dpm_levels[i].value);  in vega12_get_memclocks()
1915 static int vega12_get_dcefclocks(struct pp_hwmgr *hwmgr,  in vega12_get_dcefclocks()  argument
1918 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_dcefclocks()
1943 static int vega12_get_socclocks(struct pp_hwmgr *hwmgr,  in vega12_get_socclocks()  argument
1946 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_socclocks()
1972 static int vega12_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,  in vega12_get_clock_by_type_with_latency()  argument
1980 		ret = vega12_get_sclks(hwmgr, clocks);  in vega12_get_clock_by_type_with_latency()
1983 		ret = vega12_get_memclocks(hwmgr, clocks);  in vega12_get_clock_by_type_with_latency()
1986 		ret = vega12_get_dcefclocks(hwmgr, clocks);  in vega12_get_clock_by_type_with_latency()
1989 		ret = vega12_get_socclocks(hwmgr, clocks);  in vega12_get_clock_by_type_with_latency()
1998 static int vega12_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr,  in vega12_get_clock_by_type_with_voltage()  argument
2007 static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,  in vega12_set_watermarks_for_clocks_ranges()  argument
2010 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_set_watermarks_for_clocks_ranges()
2025 static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,  in vega12_force_clock_level()  argument
2028 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_force_clock_level()
2042 		ret = vega12_upload_dpm_min_level(hwmgr);  in vega12_force_clock_level()
2047 		ret = vega12_upload_dpm_max_level(hwmgr);  in vega12_force_clock_level()
2062 		ret = vega12_upload_dpm_min_level(hwmgr);  in vega12_force_clock_level()
2067 		ret = vega12_upload_dpm_max_level(hwmgr);  in vega12_force_clock_level()
2090 		ret = vega12_upload_dpm_min_level(hwmgr);  in vega12_force_clock_level()
2095 		ret = vega12_upload_dpm_max_level(hwmgr);  in vega12_force_clock_level()
2115 		ret = vega12_upload_dpm_min_level(hwmgr);  in vega12_force_clock_level()
2134 static int vega12_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)  in vega12_get_ppfeature_status()  argument
2177 	ret = vega12_get_enabled_smc_features(hwmgr, &features_enabled);  in vega12_get_ppfeature_status()
2197 static int vega12_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfeature_masks)  in vega12_set_ppfeature_status()  argument
2207 	ret = vega12_get_enabled_smc_features(hwmgr, &features_enabled);  in vega12_set_ppfeature_status()
2220 		ret = vega12_enable_smc_features(hwmgr, false, features_to_disable);  in vega12_set_ppfeature_status()
2226 		ret = vega12_enable_smc_features(hwmgr, true, features_to_enable);  in vega12_set_ppfeature_status()
2234 static int vega12_get_current_pcie_link_width_level(struct pp_hwmgr *hwmgr)  in vega12_get_current_pcie_link_width_level()  argument
2236 	struct amdgpu_device *adev = hwmgr->adev;  in vega12_get_current_pcie_link_width_level()
2243 static int vega12_get_current_pcie_link_width(struct pp_hwmgr *hwmgr)  in vega12_get_current_pcie_link_width()  argument
2247 	width_level = vega12_get_current_pcie_link_width_level(hwmgr);  in vega12_get_current_pcie_link_width()
2254 static int vega12_get_current_pcie_link_speed_level(struct pp_hwmgr *hwmgr)  in vega12_get_current_pcie_link_speed_level()  argument
2256 	struct amdgpu_device *adev = hwmgr->adev;  in vega12_get_current_pcie_link_speed_level()
2263 static int vega12_get_current_pcie_link_speed(struct pp_hwmgr *hwmgr)  in vega12_get_current_pcie_link_speed()  argument
2267 	speed_level = vega12_get_current_pcie_link_speed_level(hwmgr);  in vega12_get_current_pcie_link_speed()
2274 static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,  in vega12_print_clock_levels()  argument
2283 				vega12_get_current_gfx_clk_freq(hwmgr, &now) == 0,  in vega12_print_clock_levels()
2288 				vega12_get_sclks(hwmgr, &clocks) == 0,  in vega12_print_clock_levels()
2299 				vega12_get_current_mclk_freq(hwmgr, &now) == 0,  in vega12_print_clock_levels()
2304 				vega12_get_memclocks(hwmgr, &clocks) == 0,  in vega12_print_clock_levels()
2315 				smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_print_clock_levels()
2322 				vega12_get_socclocks(hwmgr, &clocks) == 0,  in vega12_print_clock_levels()
2333 				smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_print_clock_levels()
2340 				vega12_get_dcefclocks(hwmgr, &clocks) == 0,  in vega12_print_clock_levels()
2358 static int vega12_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr)  in vega12_apply_clocks_adjust_rules()  argument
2360 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_apply_clocks_adjust_rules()
2366 	disable_mclk_switching = ((1 < hwmgr->display_config->num_display) &&  in vega12_apply_clocks_adjust_rules()
2367 				!hwmgr->display_config->multi_monitor_in_sync) ||  in vega12_apply_clocks_adjust_rules()
2369 	latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency;  in vega12_apply_clocks_adjust_rules()
2384 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) {  in vega12_apply_clocks_adjust_rules()
2389 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {  in vega12_apply_clocks_adjust_rules()
2408 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) {  in vega12_apply_clocks_adjust_rules()
2413 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {  in vega12_apply_clocks_adjust_rules()
2420 	if (dpm_table->dpm_state.hard_min_level < (hwmgr->display_config->min_mem_set_clock / 100))  in vega12_apply_clocks_adjust_rules()
2421 		dpm_table->dpm_state.hard_min_level = hwmgr->display_config->min_mem_set_clock / 100;  in vega12_apply_clocks_adjust_rules()
2428 				if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) {  in vega12_apply_clocks_adjust_rules()
2436 	if (hwmgr->display_config->nb_pstate_switch_disable)  in vega12_apply_clocks_adjust_rules()
2452 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {  in vega12_apply_clocks_adjust_rules()
2471 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {  in vega12_apply_clocks_adjust_rules()
2490 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {  in vega12_apply_clocks_adjust_rules()
2509 		if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {  in vega12_apply_clocks_adjust_rules()
2518 static int vega12_set_uclk_to_highest_dpm_level(struct pp_hwmgr *hwmgr,  in vega12_set_uclk_to_highest_dpm_level()  argument
2521 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_set_uclk_to_highest_dpm_level()
2533 		PP_ASSERT_WITH_CODE(!(ret = smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_set_uclk_to_highest_dpm_level()
2544 static int vega12_pre_display_configuration_changed_task(struct pp_hwmgr *hwmgr)  in vega12_pre_display_configuration_changed_task()  argument
2546 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_pre_display_configuration_changed_task()
2549 	smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_pre_display_configuration_changed_task()
2553 	ret = vega12_set_uclk_to_highest_dpm_level(hwmgr,  in vega12_pre_display_configuration_changed_task()
2559 static int vega12_display_configuration_changed_task(struct pp_hwmgr *hwmgr)  in vega12_display_configuration_changed_task()  argument
2561 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_display_configuration_changed_task()
2567 		result = smum_smc_table_manager(hwmgr,  in vega12_display_configuration_changed_task()
2576 		smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_display_configuration_changed_task()
2577 			PPSMC_MSG_NumOfDisplays, hwmgr->display_config->num_display,  in vega12_display_configuration_changed_task()
2583 static int vega12_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)  in vega12_enable_disable_uvd_dpm()  argument
2586 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_enable_disable_uvd_dpm()
2589 		PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(hwmgr,  in vega12_enable_disable_uvd_dpm()
2600 static void vega12_power_gate_vce(struct pp_hwmgr *hwmgr, bool bgate)  in vega12_power_gate_vce()  argument
2602 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_power_gate_vce()
2608 	vega12_enable_disable_vce_dpm(hwmgr, !bgate);  in vega12_power_gate_vce()
2611 static void vega12_power_gate_uvd(struct pp_hwmgr *hwmgr, bool bgate)  in vega12_power_gate_uvd()  argument
2613 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_power_gate_uvd()
2619 	vega12_enable_disable_uvd_dpm(hwmgr, !bgate);  in vega12_power_gate_uvd()
2623 vega12_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)  in vega12_check_smc_update_required_for_display_configuration()  argument
2625 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_check_smc_update_required_for_display_configuration()
2628 	if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)  in vega12_check_smc_update_required_for_display_configuration()
2632 		if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr)  in vega12_check_smc_update_required_for_display_configuration()
2639 static int vega12_disable_dpm_tasks(struct pp_hwmgr *hwmgr)  in vega12_disable_dpm_tasks()  argument
2643 	tmp_result = vega12_disable_all_smu_features(hwmgr);  in vega12_disable_dpm_tasks()
2650 static int vega12_power_off_asic(struct pp_hwmgr *hwmgr)  in vega12_power_off_asic()  argument
2652 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);  in vega12_power_off_asic()
2655 	result = vega12_disable_dpm_tasks(hwmgr);  in vega12_power_off_asic()
2665 static void vega12_find_min_clock_index(struct pp_hwmgr *hwmgr,
2669 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
2692 static int vega12_set_power_profile_state(struct pp_hwmgr *hwmgr,
2698 static int vega12_get_sclk_od(struct pp_hwmgr *hwmgr)
2700 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
2714 static int vega12_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value)
2719 static int vega12_get_mclk_od(struct pp_hwmgr *hwmgr)
2721 	struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
2735 static int vega12_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value)
2741 static int vega12_notify_cac_buffer_info(struct pp_hwmgr *hwmgr,  in vega12_notify_cac_buffer_info()  argument
2748 	smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_notify_cac_buffer_info()
2752 	smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_notify_cac_buffer_info()
2756 	smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_notify_cac_buffer_info()
2761 	smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_notify_cac_buffer_info()
2766 	smum_send_msg_to_smc_with_parameter(hwmgr,  in vega12_notify_cac_buffer_info()
2773 static int vega12_get_thermal_temperature_range(struct pp_hwmgr *hwmgr,  in vega12_get_thermal_temperature_range()  argument
2777 		(struct phm_ppt_v3_information *)hwmgr->pptable;  in vega12_get_thermal_temperature_range()
2779 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_thermal_temperature_range()
2802 static int vega12_enable_gfx_off(struct pp_hwmgr *hwmgr)  in vega12_enable_gfx_off()  argument
2805 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_enable_gfx_off()
2809 		ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_AllowGfxOff, NULL);  in vega12_enable_gfx_off()
2814 static int vega12_disable_gfx_off(struct pp_hwmgr *hwmgr)  in vega12_disable_gfx_off()  argument
2817 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_disable_gfx_off()
2821 		ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisallowGfxOff, NULL);  in vega12_disable_gfx_off()
2826 static int vega12_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable)  in vega12_gfx_off_control()  argument
2829 		return vega12_enable_gfx_off(hwmgr);  in vega12_gfx_off_control()
2831 		return vega12_disable_gfx_off(hwmgr);  in vega12_gfx_off_control()
2834 static int vega12_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *sta…  in vega12_get_performance_level()  argument
2841 static int vega12_set_mp1_state(struct pp_hwmgr *hwmgr,  in vega12_set_mp1_state()  argument
2858 	PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg, NULL)) == 0,  in vega12_set_mp1_state()
2877 static ssize_t vega12_get_gpu_metrics(struct pp_hwmgr *hwmgr,  in vega12_get_gpu_metrics()  argument
2881 			(struct vega12_hwmgr *)(hwmgr->backend);  in vega12_get_gpu_metrics()
2888 	ret = vega12_get_metrics_table(hwmgr, &metrics, true);  in vega12_get_gpu_metrics()
2915 	vega12_fan_ctrl_get_fan_speed_rpm(hwmgr, &fan_speed_rpm);  in vega12_get_gpu_metrics()
2919 			vega12_get_current_pcie_link_width(hwmgr);  in vega12_get_gpu_metrics()
2921 			vega12_get_current_pcie_link_speed(hwmgr);  in vega12_get_gpu_metrics()
2988 int vega12_hwmgr_init(struct pp_hwmgr *hwmgr)  in vega12_hwmgr_init()  argument
2990 	hwmgr->hwmgr_func = &vega12_hwmgr_funcs;  in vega12_hwmgr_init()
2991 	hwmgr->pptable_func = &vega12_pptable_funcs;  in vega12_hwmgr_init()