Lines Matching refs:engineClock
911 if (hwmgr->platform_descriptor.overdriveLimit.engineClock == 0) in smu7_setup_dpm_tables_v1()
912 hwmgr->platform_descriptor.overdriveLimit.engineClock = dep_sclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1()
3016 hwmgr->platform_descriptor.clockStep.engineClock = 500; in smu7_hwmgr_backend_init()
3356 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in smu7_apply_state_adjust_rules()
3379 minimum_clocks.engineClock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()
3411 if (sclk < minimum_clocks.engineClock) in smu7_apply_state_adjust_rules()
3412 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()
3413 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()
5049 hwmgr->platform_descriptor.overdriveLimit.engineClock/100); in smu7_print_clock_levels()
5471 hwmgr->platform_descriptor.overdriveLimit.engineClock < clk) { in smu7_check_clk_voltage_valid()
5474 hwmgr->platform_descriptor.overdriveLimit.engineClock/100); in smu7_check_clk_voltage_valid()