Lines Matching +full:auto +full:- +full:sleep +full:- +full:disabled
33 #include <linux/hwmon-sysfs.h>
108 * - battery
110 * - balanced
112 * - performance
144 return -EPERM; in amdgpu_get_power_dpm_state()
145 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_power_dpm_state()
146 return -EPERM; in amdgpu_get_power_dpm_state()
148 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_power_dpm_state()
150 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_power_dpm_state()
156 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_power_dpm_state()
157 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_power_dpm_state()
175 return -EPERM; in amdgpu_set_power_dpm_state()
176 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_power_dpm_state()
177 return -EPERM; in amdgpu_set_power_dpm_state()
186 return -EINVAL; in amdgpu_set_power_dpm_state()
188 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_power_dpm_state()
190 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_power_dpm_state()
196 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_power_dpm_state()
197 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_power_dpm_state()
210 * - auto
212 * - low
214 * - high
216 * - manual
218 * - profile_standard
220 * - profile_min_sclk
222 * - profile_min_mclk
224 * - profile_peak
226 * auto
228 * When auto is selected, the driver will attempt to dynamically select
252 * disabled and the clocks are set for different profiling cases. This
272 return -EPERM; in amdgpu_get_power_dpm_force_performance_level()
273 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_power_dpm_force_performance_level()
274 return -EPERM; in amdgpu_get_power_dpm_force_performance_level()
276 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_power_dpm_force_performance_level()
278 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_power_dpm_force_performance_level()
284 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_power_dpm_force_performance_level()
285 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_power_dpm_force_performance_level()
288 (level == AMD_DPM_FORCED_LEVEL_AUTO) ? "auto" : in amdgpu_get_power_dpm_force_performance_level()
311 return -EPERM; in amdgpu_set_power_dpm_force_performance_level()
312 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_power_dpm_force_performance_level()
313 return -EPERM; in amdgpu_set_power_dpm_force_performance_level()
319 } else if (strncmp("auto", buf, strlen("auto")) == 0) { in amdgpu_set_power_dpm_force_performance_level()
336 return -EINVAL; in amdgpu_set_power_dpm_force_performance_level()
339 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_power_dpm_force_performance_level()
341 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_power_dpm_force_performance_level()
345 mutex_lock(&adev->pm.stable_pstate_ctx_lock); in amdgpu_set_power_dpm_force_performance_level()
347 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_power_dpm_force_performance_level()
348 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_power_dpm_force_performance_level()
349 mutex_unlock(&adev->pm.stable_pstate_ctx_lock); in amdgpu_set_power_dpm_force_performance_level()
350 return -EINVAL; in amdgpu_set_power_dpm_force_performance_level()
353 adev->pm.stable_pstate_ctx = NULL; in amdgpu_set_power_dpm_force_performance_level()
354 mutex_unlock(&adev->pm.stable_pstate_ctx_lock); in amdgpu_set_power_dpm_force_performance_level()
356 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_power_dpm_force_performance_level()
357 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_power_dpm_force_performance_level()
373 return -EPERM; in amdgpu_get_pp_num_states()
374 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_num_states()
375 return -EPERM; in amdgpu_get_pp_num_states()
377 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_num_states()
379 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_num_states()
386 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_num_states()
387 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_num_states()
411 return -EPERM; in amdgpu_get_pp_cur_state()
412 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_cur_state()
413 return -EPERM; in amdgpu_get_pp_cur_state()
415 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_cur_state()
417 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_cur_state()
425 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_cur_state()
426 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_cur_state()
437 i = -EINVAL; in amdgpu_get_pp_cur_state()
450 return -EPERM; in amdgpu_get_pp_force_state()
451 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_force_state()
452 return -EPERM; in amdgpu_get_pp_force_state()
454 if (adev->pm.pp_force_state_enabled) in amdgpu_get_pp_force_state()
473 return -EPERM; in amdgpu_set_pp_force_state()
474 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_force_state()
475 return -EPERM; in amdgpu_set_pp_force_state()
477 adev->pm.pp_force_state_enabled = false; in amdgpu_set_pp_force_state()
484 return -EINVAL; in amdgpu_set_pp_force_state()
488 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_force_state()
490 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_force_state()
508 adev->pm.pp_force_state_enabled = true; in amdgpu_set_pp_force_state()
511 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_force_state()
512 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_force_state()
517 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_force_state()
518 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_force_state()
528 * will attempt to upload a new powerplay table and re-initialize
543 return -EPERM; in amdgpu_get_pp_table()
544 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_table()
545 return -EPERM; in amdgpu_get_pp_table()
547 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_table()
549 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_table()
555 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_table()
556 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_table()
562 size = PAGE_SIZE - 1; in amdgpu_get_pp_table()
579 return -EPERM; in amdgpu_set_pp_table()
580 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_table()
581 return -EPERM; in amdgpu_set_pp_table()
583 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_table()
585 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_table()
591 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_table()
592 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_table()
657 * - a list of engine clock levels and voltages labeled OD_SCLK
659 * - a list of memory clock levels and voltages labeled OD_MCLK
661 * - a list of valid ranges for sclk, mclk, and voltage labeled OD_RANGE
677 * - minimum and maximum engine clock labeled OD_SCLK
679 * - minimum(not available for Vega20 and Navi1x) and maximum memory
682 * - three <frequency, voltage> points labeled OD_VDDC_CURVE.
686 * - voltage offset(in mV) applied on target voltage calculation.
692 * - a list of valid ranges for sclk, mclk, voltage curve points
699 * - minimum and maximum engine clock labeled OD_SCLK
701 * - a list of valid ranges for sclk labeled OD_RANGE
707 * - minimum and maximum engine clock labeled OD_SCLK
708 * - minimum and maximum core clocks labeled OD_CCLK
710 * - a list of valid ranges for sclk and cclk labeled OD_RANGE
714 * - First select manual using power_dpm_force_performance_level
716 * - For clock frequency setting, enter a new value by writing a
734 * string that contains "vo offset". E.g., "vo -10" will update the extra
735 * voltage offset applied to the whole v/f curve line as -10mv.
737 * - When you have edited all of the states as needed, write "c" (commit)
740 * - If you want to reset to the default power levels, write "r" (reset)
762 return -EPERM; in amdgpu_set_pp_od_clk_voltage()
763 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_od_clk_voltage()
764 return -EPERM; in amdgpu_set_pp_od_clk_voltage()
767 return -EINVAL; in amdgpu_set_pp_od_clk_voltage()
784 return -EINVAL; in amdgpu_set_pp_od_clk_voltage()
801 return -EINVAL; in amdgpu_set_pp_od_clk_voltage()
811 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_od_clk_voltage()
813 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_od_clk_voltage()
834 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_od_clk_voltage()
835 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_od_clk_voltage()
840 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_od_clk_voltage()
841 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_od_clk_voltage()
842 return -EINVAL; in amdgpu_set_pp_od_clk_voltage()
864 return -EPERM; in amdgpu_get_pp_od_clk_voltage()
865 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_od_clk_voltage()
866 return -EPERM; in amdgpu_get_pp_od_clk_voltage()
868 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_od_clk_voltage()
870 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_od_clk_voltage()
879 if (ret == -ENOENT) { in amdgpu_get_pp_od_clk_voltage()
891 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_od_clk_voltage()
892 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_od_clk_voltage()
905 * - Current ppfeature masks
906 * - List of the all supported powerplay features with their naming,
907 * bitmasks and enablement status('Y'/'N' means "enabled"/"disabled").
924 return -EPERM; in amdgpu_set_pp_features()
925 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_features()
926 return -EPERM; in amdgpu_set_pp_features()
930 return -EINVAL; in amdgpu_set_pp_features()
932 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_features()
934 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_features()
940 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_features()
941 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_features()
944 return -EINVAL; in amdgpu_set_pp_features()
959 return -EPERM; in amdgpu_get_pp_features()
960 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_features()
961 return -EPERM; in amdgpu_get_pp_features()
963 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_features()
965 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_features()
973 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_features()
974 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_features()
992 * the power state and the clock information for those levels. If deep sleep is
1009 * .. code-block:: bash
1028 return -EPERM; in amdgpu_get_pp_dpm_clock()
1029 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_dpm_clock()
1030 return -EPERM; in amdgpu_get_pp_dpm_clock()
1032 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_dpm_clock()
1034 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_dpm_clock()
1039 if (ret == -ENOENT) in amdgpu_get_pp_dpm_clock()
1045 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_dpm_clock()
1046 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_dpm_clock()
1069 bytes = min(count, sizeof(buf_cpy) - 1); in amdgpu_read_mask()
1077 return -EINVAL; in amdgpu_read_mask()
1097 return -EPERM; in amdgpu_set_pp_dpm_clock()
1098 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_dpm_clock()
1099 return -EPERM; in amdgpu_set_pp_dpm_clock()
1105 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_dpm_clock()
1107 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_dpm_clock()
1113 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_dpm_clock()
1114 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_dpm_clock()
1117 return -EINVAL; in amdgpu_set_pp_dpm_clock()
1282 return -EPERM; in amdgpu_get_pp_sclk_od()
1283 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_sclk_od()
1284 return -EPERM; in amdgpu_get_pp_sclk_od()
1286 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_sclk_od()
1288 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_sclk_od()
1294 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_sclk_od()
1295 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_sclk_od()
1311 return -EPERM; in amdgpu_set_pp_sclk_od()
1312 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_sclk_od()
1313 return -EPERM; in amdgpu_set_pp_sclk_od()
1318 return -EINVAL; in amdgpu_set_pp_sclk_od()
1320 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_sclk_od()
1322 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_sclk_od()
1328 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_sclk_od()
1329 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_sclk_od()
1344 return -EPERM; in amdgpu_get_pp_mclk_od()
1345 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_mclk_od()
1346 return -EPERM; in amdgpu_get_pp_mclk_od()
1348 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_mclk_od()
1350 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_mclk_od()
1356 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_mclk_od()
1357 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_mclk_od()
1373 return -EPERM; in amdgpu_set_pp_mclk_od()
1374 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_mclk_od()
1375 return -EPERM; in amdgpu_set_pp_mclk_od()
1380 return -EINVAL; in amdgpu_set_pp_mclk_od()
1382 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_mclk_od()
1384 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_mclk_od()
1390 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_mclk_od()
1391 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_mclk_od()
1426 return -EPERM; in amdgpu_get_pp_power_profile_mode()
1427 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pp_power_profile_mode()
1428 return -EPERM; in amdgpu_get_pp_power_profile_mode()
1430 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pp_power_profile_mode()
1432 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_power_profile_mode()
1440 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pp_power_profile_mode()
1441 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pp_power_profile_mode()
1465 return -EPERM; in amdgpu_set_pp_power_profile_mode()
1466 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pp_power_profile_mode()
1467 return -EPERM; in amdgpu_set_pp_power_profile_mode()
1473 return -EINVAL; in amdgpu_set_pp_power_profile_mode()
1477 return -EINVAL; in amdgpu_set_pp_power_profile_mode()
1480 memcpy(buf_cpy, buf, count-i); in amdgpu_set_pp_power_profile_mode()
1487 return -EINVAL; in amdgpu_set_pp_power_profile_mode()
1495 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pp_power_profile_mode()
1497 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_power_profile_mode()
1503 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pp_power_profile_mode()
1504 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pp_power_profile_mode()
1509 return -EINVAL; in amdgpu_set_pp_power_profile_mode()
1519 return -EPERM; in amdgpu_hwmon_get_sensor_generic()
1520 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_get_sensor_generic()
1521 return -EPERM; in amdgpu_hwmon_get_sensor_generic()
1523 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_sensor_generic()
1525 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_sensor_generic()
1532 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_sensor_generic()
1533 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_sensor_generic()
1632 return -EPERM; in amdgpu_get_pcie_bw()
1633 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pcie_bw()
1634 return -EPERM; in amdgpu_get_pcie_bw()
1636 if (adev->flags & AMD_IS_APU) in amdgpu_get_pcie_bw()
1637 return -ENODATA; in amdgpu_get_pcie_bw()
1639 if (!adev->asic_funcs->get_pcie_usage) in amdgpu_get_pcie_bw()
1640 return -ENODATA; in amdgpu_get_pcie_bw()
1642 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pcie_bw()
1644 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pcie_bw()
1650 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pcie_bw()
1651 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pcie_bw()
1654 count0, count1, pcie_get_mps(adev->pdev)); in amdgpu_get_pcie_bw()
1675 return -EPERM; in amdgpu_get_unique_id()
1676 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_unique_id()
1677 return -EPERM; in amdgpu_get_unique_id()
1679 if (adev->unique_id) in amdgpu_get_unique_id()
1680 return sysfs_emit(buf, "%016llx\n", adev->unique_id); in amdgpu_get_unique_id()
1693 * Reading back the file shows you the status(enabled or disabled) and
1698 * thermal logging is disabled. Values greater than 3600 are ignored.
1708 adev_to_drm(adev)->unique, in amdgpu_get_thermal_throttling_logging()
1709 atomic_read(&adev->throttling_logging_enabled) ? "enabled" : "disabled", in amdgpu_get_thermal_throttling_logging()
1710 adev->throttling_logging_rs.interval / HZ + 1); in amdgpu_get_thermal_throttling_logging()
1729 return -EINVAL; in amdgpu_set_thermal_throttling_logging()
1732 raw_spin_lock_irqsave(&adev->throttling_logging_rs.lock, flags); in amdgpu_set_thermal_throttling_logging()
1737 adev->throttling_logging_rs.interval = in amdgpu_set_thermal_throttling_logging()
1738 (throttling_logging_interval - 1) * HZ; in amdgpu_set_thermal_throttling_logging()
1739 adev->throttling_logging_rs.begin = 0; in amdgpu_set_thermal_throttling_logging()
1740 adev->throttling_logging_rs.printed = 0; in amdgpu_set_thermal_throttling_logging()
1741 adev->throttling_logging_rs.missed = 0; in amdgpu_set_thermal_throttling_logging()
1742 raw_spin_unlock_irqrestore(&adev->throttling_logging_rs.lock, flags); in amdgpu_set_thermal_throttling_logging()
1744 atomic_set(&adev->throttling_logging_enabled, 1); in amdgpu_set_thermal_throttling_logging()
1746 atomic_set(&adev->throttling_logging_enabled, 0); in amdgpu_set_thermal_throttling_logging()
1773 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_apu_thermal_cap()
1775 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_apu_thermal_cap()
1785 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_apu_thermal_cap()
1786 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_apu_thermal_cap()
1807 return -EINVAL; in amdgpu_set_apu_thermal_cap()
1810 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_apu_thermal_cap()
1812 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_apu_thermal_cap()
1822 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_apu_thermal_cap()
1823 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_apu_thermal_cap()
1833 if (amdgpu_dpm_get_pm_metrics(adev, NULL, 0) == -EOPNOTSUPP) in amdgpu_pm_metrics_attr_update()
1848 return -EPERM; in amdgpu_get_pm_metrics()
1849 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pm_metrics()
1850 return -EPERM; in amdgpu_get_pm_metrics()
1852 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_pm_metrics()
1854 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pm_metrics()
1860 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_pm_metrics()
1861 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_pm_metrics()
1889 return -EPERM; in amdgpu_get_gpu_metrics()
1890 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_gpu_metrics()
1891 return -EPERM; in amdgpu_get_gpu_metrics()
1893 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_get_gpu_metrics()
1895 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_gpu_metrics()
1904 size = PAGE_SIZE - 1; in amdgpu_get_gpu_metrics()
1909 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_get_gpu_metrics()
1910 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_get_gpu_metrics()
1924 if (r == -EOPNOTSUPP) { in amdgpu_show_powershift_percent()
1929 if (mgpu_info.gpu_ins[i].adev->flags & AMD_IS_APU) { in amdgpu_show_powershift_percent()
1950 * there is no powershift and values between [1-100] means that the power
1966 * there is no powershift and values between [1-100] means that the power is
1981 * smartshift(SS2.0) bias level. The value ranges from -100 to 100
1982 * and the default is 0. -100 sets maximum preference to APU
2007 return -EPERM; in amdgpu_set_smartshift_bias()
2008 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_smartshift_bias()
2009 return -EPERM; in amdgpu_set_smartshift_bias()
2011 r = pm_runtime_get_sync(ddev->dev); in amdgpu_set_smartshift_bias()
2013 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_smartshift_bias()
2032 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_smartshift_bias()
2033 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_smartshift_bias()
2083 if (!(attr->flags & mask)) in pp_od_clk_voltage_attr_update()
2092 struct device_attribute *dev_attr = &attr->dev_attr; in pp_dpm_dcefclk_attr_update()
2097 if (!(attr->flags & mask)) { in pp_dpm_dcefclk_attr_update()
2114 dev_attr->attr.mode &= ~S_IWUGO; in pp_dpm_dcefclk_attr_update()
2115 dev_attr->store = NULL; in pp_dpm_dcefclk_attr_update()
2124 struct device_attribute *dev_attr = &attr->dev_attr; in pp_dpm_clk_default_attr_update()
2125 enum amdgpu_device_attr_id attr_id = attr->attr_id; in pp_dpm_clk_default_attr_update()
2131 if (!(attr->flags & mask)) { in pp_dpm_clk_default_attr_update()
2162 gc_ver == IP_VERSION(11, 0, 3)) && adev->vcn.num_vcn_inst >= 2)) in pp_dpm_clk_default_attr_update()
2184 gc_ver == IP_VERSION(11, 0, 3)) && adev->vcn.num_vcn_inst >= 2)) in pp_dpm_clk_default_attr_update()
2200 dev_attr->attr.mode &= ~S_IWUGO; in pp_dpm_clk_default_attr_update()
2201 dev_attr->store = NULL; in pp_dpm_clk_default_attr_update()
2210 dev_attr->attr.mode &= ~S_IWUGO; in pp_dpm_clk_default_attr_update()
2211 dev_attr->store = NULL; in pp_dpm_clk_default_attr_update()
2228 * per-process level. This is useful especially when entire SOC is utilized for
2234 * Pstate Policy Selection - This is to select different Pstate profiles which
2237 * XGMI PLPD Policy Selection - When multiple devices are connected over XGMI,
2250 * .. code-block:: console
2268 * XGMI and "soc_pstate_2" for soc pstate policy -
2270 * .. code-block:: console
2288 return -EPERM; in amdgpu_get_pm_policy_attr()
2289 if (adev->in_suspend && !adev->in_runpm) in amdgpu_get_pm_policy_attr()
2290 return -EPERM; in amdgpu_get_pm_policy_attr()
2292 return amdgpu_dpm_get_pm_policy_info(adev, policy_attr->id, buf); in amdgpu_get_pm_policy_attr()
2309 return -EPERM; in amdgpu_set_pm_policy_attr()
2310 if (adev->in_suspend && !adev->in_runpm) in amdgpu_set_pm_policy_attr()
2311 return -EPERM; in amdgpu_set_pm_policy_attr()
2315 tmp_buf[count - 1] = '\0'; in amdgpu_set_pm_policy_attr()
2326 return -EINVAL; in amdgpu_set_pm_policy_attr()
2329 return -EINVAL; in amdgpu_set_pm_policy_attr()
2333 return -EINVAL; in amdgpu_set_pm_policy_attr()
2338 ret = pm_runtime_get_sync(ddev->dev); in amdgpu_set_pm_policy_attr()
2340 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pm_policy_attr()
2344 ret = amdgpu_dpm_set_pm_policy(adev, policy_attr->id, val); in amdgpu_set_pm_policy_attr()
2346 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_set_pm_policy_attr()
2347 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_set_pm_policy_attr()
2384 if (amdgpu_dpm_get_pm_policy_info(adev, policy_attr->id, NULL) == in amdgpu_pm_policy_attr_visible()
2385 -ENOENT) in amdgpu_pm_policy_attr_visible()
2388 return attr->mode; in amdgpu_pm_policy_attr_visible()
2451 struct device_attribute *dev_attr = &attr->dev_attr; in default_attr_update()
2452 enum amdgpu_device_attr_id attr_id = attr->attr_id; in default_attr_update()
2455 if (!(attr->flags & mask)) { in default_attr_update()
2461 if ((adev->flags & AMD_IS_APU && in default_attr_update()
2476 if (adev->flags & AMD_IS_APU || in default_attr_update()
2477 !adev->asic_funcs->get_pcie_usage) in default_attr_update()
2498 if ((adev->flags & AMD_IS_APU && in default_attr_update()
2506 if (amdgpu_dpm_get_power_profile_mode(adev, NULL) == -EOPNOTSUPP) in default_attr_update()
2512 if (amdgpu_dpm_get_mclk_od(adev) == -EOPNOTSUPP) in default_attr_update()
2515 if (amdgpu_dpm_get_sclk_od(adev) == -EOPNOTSUPP) in default_attr_update()
2521 -EOPNOTSUPP) in default_attr_update()
2529 dev_attr->attr.mode &= ~0222; in default_attr_update()
2530 dev_attr->store = NULL; in default_attr_update()
2555 return -EINVAL; in amdgpu_device_attr_create()
2557 dev_attr = &attr->dev_attr; in amdgpu_device_attr_create()
2558 name = dev_attr->attr.name; in amdgpu_device_attr_create()
2560 attr_update = attr->attr_update ? attr->attr_update : default_attr_update; in amdgpu_device_attr_create()
2564 dev_err(adev->dev, "failed to update device file %s, ret = %d\n", in amdgpu_device_attr_create()
2572 ret = device_create_file(adev->dev, dev_attr); in amdgpu_device_attr_create()
2574 dev_err(adev->dev, "failed to create device file %s, ret = %d\n", in amdgpu_device_attr_create()
2580 return -ENOMEM; in amdgpu_device_attr_create()
2582 attr_entry->attr = attr; in amdgpu_device_attr_create()
2583 INIT_LIST_HEAD(&attr_entry->entry); in amdgpu_device_attr_create()
2585 list_add_tail(&attr_entry->entry, attr_list); in amdgpu_device_attr_create()
2592 struct device_attribute *dev_attr = &attr->dev_attr; in amdgpu_device_attr_remove()
2594 device_remove_file(adev->dev, dev_attr); in amdgpu_device_attr_remove()
2632 amdgpu_device_attr_remove(adev, entry->attr); in amdgpu_device_attr_remove_groups()
2633 list_del(&entry->entry); in amdgpu_device_attr_remove_groups()
2643 int channel = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_show_temp()
2647 return -EINVAL; in amdgpu_hwmon_show_temp()
2666 r = -EINVAL; in amdgpu_hwmon_show_temp()
2681 int hyst = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_show_temp_thresh()
2685 temp = adev->pm.dpm.thermal.min_temp; in amdgpu_hwmon_show_temp_thresh()
2687 temp = adev->pm.dpm.thermal.max_temp; in amdgpu_hwmon_show_temp_thresh()
2697 int hyst = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_show_hotspot_temp_thresh()
2701 temp = adev->pm.dpm.thermal.min_hotspot_temp; in amdgpu_hwmon_show_hotspot_temp_thresh()
2703 temp = adev->pm.dpm.thermal.max_hotspot_crit_temp; in amdgpu_hwmon_show_hotspot_temp_thresh()
2713 int hyst = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_show_mem_temp_thresh()
2717 temp = adev->pm.dpm.thermal.min_mem_temp; in amdgpu_hwmon_show_mem_temp_thresh()
2719 temp = adev->pm.dpm.thermal.max_mem_crit_temp; in amdgpu_hwmon_show_mem_temp_thresh()
2728 int channel = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_show_temp_label()
2731 return -EINVAL; in amdgpu_hwmon_show_temp_label()
2741 int channel = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_show_temp_emergency()
2745 return -EINVAL; in amdgpu_hwmon_show_temp_emergency()
2749 temp = adev->pm.dpm.thermal.max_hotspot_emergency_temp; in amdgpu_hwmon_show_temp_emergency()
2752 temp = adev->pm.dpm.thermal.max_edge_emergency_temp; in amdgpu_hwmon_show_temp_emergency()
2755 temp = adev->pm.dpm.thermal.max_mem_emergency_temp; in amdgpu_hwmon_show_temp_emergency()
2771 return -EPERM; in amdgpu_hwmon_get_pwm1_enable()
2772 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_get_pwm1_enable()
2773 return -EPERM; in amdgpu_hwmon_get_pwm1_enable()
2775 ret = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable()
2777 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable()
2783 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable()
2784 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable()
2787 return -EINVAL; in amdgpu_hwmon_get_pwm1_enable()
2803 return -EPERM; in amdgpu_hwmon_set_pwm1_enable()
2804 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_set_pwm1_enable()
2805 return -EPERM; in amdgpu_hwmon_set_pwm1_enable()
2818 return -EINVAL; in amdgpu_hwmon_set_pwm1_enable()
2820 ret = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1_enable()
2822 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1_enable()
2828 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1_enable()
2829 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1_enable()
2832 return -EINVAL; in amdgpu_hwmon_set_pwm1_enable()
2861 return -EPERM; in amdgpu_hwmon_set_pwm1()
2862 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_set_pwm1()
2863 return -EPERM; in amdgpu_hwmon_set_pwm1()
2869 err = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1()
2871 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1()
2881 err = -EINVAL; in amdgpu_hwmon_set_pwm1()
2888 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1()
2889 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_pwm1()
2906 return -EPERM; in amdgpu_hwmon_get_pwm1()
2907 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_get_pwm1()
2908 return -EPERM; in amdgpu_hwmon_get_pwm1()
2910 err = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1()
2912 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1()
2918 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1()
2919 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1()
2936 return -EPERM; in amdgpu_hwmon_get_fan1_input()
2937 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_get_fan1_input()
2938 return -EPERM; in amdgpu_hwmon_get_fan1_input()
2940 err = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_input()
2942 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_input()
2948 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_input()
2949 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_input()
3000 return -EPERM; in amdgpu_hwmon_get_fan1_target()
3001 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_get_fan1_target()
3002 return -EPERM; in amdgpu_hwmon_get_fan1_target()
3004 err = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_target()
3006 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_target()
3012 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_target()
3013 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_target()
3031 return -EPERM; in amdgpu_hwmon_set_fan1_target()
3032 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_set_fan1_target()
3033 return -EPERM; in amdgpu_hwmon_set_fan1_target()
3039 err = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_target()
3041 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_target()
3050 err = -ENODATA; in amdgpu_hwmon_set_fan1_target()
3057 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_target()
3058 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_target()
3075 return -EPERM; in amdgpu_hwmon_get_fan1_enable()
3076 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_get_fan1_enable()
3077 return -EPERM; in amdgpu_hwmon_get_fan1_enable()
3079 ret = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_enable()
3081 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_enable()
3087 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_enable()
3088 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_fan1_enable()
3091 return -EINVAL; in amdgpu_hwmon_get_fan1_enable()
3107 return -EPERM; in amdgpu_hwmon_set_fan1_enable()
3108 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_set_fan1_enable()
3109 return -EPERM; in amdgpu_hwmon_set_fan1_enable()
3120 return -EINVAL; in amdgpu_hwmon_set_fan1_enable()
3122 err = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_enable()
3124 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_enable()
3130 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_enable()
3131 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_fan1_enable()
3134 return -EINVAL; in amdgpu_hwmon_set_fan1_enable()
3172 if (!(adev->flags & AMD_IS_APU)) in amdgpu_hwmon_show_vddnb()
3173 return -EINVAL; in amdgpu_hwmon_show_vddnb()
3241 enum pp_power_type power_type = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_show_power_cap_generic()
3247 return -EPERM; in amdgpu_hwmon_show_power_cap_generic()
3248 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_show_power_cap_generic()
3249 return -EPERM; in amdgpu_hwmon_show_power_cap_generic()
3251 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_power_cap_generic()
3253 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_power_cap_generic()
3265 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_power_cap_generic()
3266 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_power_cap_generic()
3311 to_sensor_dev_attr(attr)->index == PP_PWR_TYPE_FAST ? in amdgpu_hwmon_show_power_label()
3323 int limit_type = to_sensor_dev_attr(attr)->index; in amdgpu_hwmon_set_power_cap()
3328 return -EPERM; in amdgpu_hwmon_set_power_cap()
3329 if (adev->in_suspend && !adev->in_runpm) in amdgpu_hwmon_set_power_cap()
3330 return -EPERM; in amdgpu_hwmon_set_power_cap()
3333 return -EINVAL; in amdgpu_hwmon_set_power_cap()
3342 err = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_power_cap()
3344 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_power_cap()
3350 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_power_cap()
3351 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_set_power_cap()
3412 * - GPU temperature (via the on-die sensor)
3414 * - GPU voltage
3416 * - Northbridge voltage (APUs only)
3418 * - GPU power
3420 * - GPU fan
3422 * - GPU gfx/compute engine clock
3424 * - GPU memory clock (dGPU only)
3428 * - temp[1-3]_input: the on die GPU temperature in millidegrees Celsius
3429 * - temp2_input and temp3_input are supported on SOC15 dGPUs only
3431 * - temp[1-3]_label: temperature channel label
3432 * - temp2_label and temp3_label are supported on SOC15 dGPUs only
3434 * - temp[1-3]_crit: temperature critical max value in millidegrees Celsius
3435 * - temp2_crit and temp3_crit are supported on SOC15 dGPUs only
3437 * - temp[1-3]_crit_hyst: temperature hysteresis for critical limit in millidegrees Celsius
3438 * - temp2_crit_hyst and temp3_crit_hyst are supported on SOC15 dGPUs only
3440 * - temp[1-3]_emergency: temperature emergency max value(asic shutdown) in millidegrees Celsius
3441 * - these are supported on SOC15 dGPUs only
3445 * - in0_input: the voltage on the GPU in millivolts
3447 * - in1_input: the voltage on the Northbridge in millivolts
3451 * - power1_average: average power used by the SoC in microWatts. On APUs this includes the CPU.
3453 …* - power1_input: instantaneous power used by the SoC in microWatts. On APUs this includes the CP…
3455 * - power1_cap_min: minimum cap supported in microWatts
3457 * - power1_cap_max: maximum cap supported in microWatts
3459 * - power1_cap: selected power cap in microWatts
3463 * - pwm1: pulse width modulation fan level (0-255)
3465 …* - pwm1_enable: pulse width modulation fan control method (0: no fan speed control, 1: manual fan…
3467 * - pwm1_min: pulse width modulation fan control minimum level (0)
3469 * - pwm1_max: pulse width modulation fan control maximum level (255)
3471 * - fan1_min: a minimum value Unit: revolution/min (RPM)
3473 * - fan1_max: a maximum value Unit: revolution/max (RPM)
3475 * - fan1_input: fan speed in RPM
3477 * - fan[1-\*]_target: Desired fan speed Unit: revolution/min (RPM)
3479 * - fan[1-\*]_enable: Enable or disable the sensors.1: Enable 0: Disable
3481 * NOTE: DO NOT set the fan speed via "pwm1" and "fan[1-\*]_target" interfaces at the same time.
3486 * - freq1_input: the gfx/compute clock in hertz
3488 * - freq2_input: the memory clock in hertz
3594 umode_t effective_mode = attr->mode; in hwmon_attributes_visible()
3603 if (adev->pm.no_fan && (attr == &sensor_dev_attr_pwm1.dev_attr.attr || in hwmon_attributes_visible()
3615 if ((adev->flags & AMD_IS_APU) && in hwmon_attributes_visible()
3628 if ((((adev->flags & AMD_IS_APU) && (adev->family >= AMDGPU_FAMILY_CZ)) || in hwmon_attributes_visible()
3635 if (!adev->pm.dpm_enabled && in hwmon_attributes_visible()
3650 if (((amdgpu_dpm_get_fan_speed_pwm(adev, NULL) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3652 ((amdgpu_dpm_get_fan_control_mode(adev, NULL) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3656 if (((amdgpu_dpm_set_fan_speed_pwm(adev, U32_MAX) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3658 ((amdgpu_dpm_set_fan_control_mode(adev, U32_MAX) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3663 if (((adev->family == AMDGPU_FAMILY_SI) || in hwmon_attributes_visible()
3664 ((adev->flags & AMD_IS_APU) && (gc_ver != IP_VERSION(10, 3, 1)) && in hwmon_attributes_visible()
3673 if (((adev->family == AMDGPU_FAMILY_SI) || in hwmon_attributes_visible()
3674 ((adev->flags & AMD_IS_APU) && (gc_ver < IP_VERSION(9, 3, 0)))) && in hwmon_attributes_visible()
3680 …amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_GPU_AVG_POWER, (void *)&tmp) == -EOPNOTSUPP) in hwmon_attributes_visible()
3683 …amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_GPU_INPUT_POWER, (void *)&tmp) == -EOPNOTSU… in hwmon_attributes_visible()
3687 if (((amdgpu_dpm_set_fan_speed_pwm(adev, U32_MAX) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3688 (amdgpu_dpm_get_fan_speed_pwm(adev, NULL) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3689 (amdgpu_dpm_set_fan_speed_rpm(adev, U32_MAX) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3690 (amdgpu_dpm_get_fan_speed_rpm(adev, NULL) == -EOPNOTSUPP)) && in hwmon_attributes_visible()
3695 if ((amdgpu_dpm_set_fan_speed_rpm(adev, U32_MAX) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3696 (amdgpu_dpm_get_fan_speed_rpm(adev, NULL) == -EOPNOTSUPP) && in hwmon_attributes_visible()
3701 if ((adev->family == AMDGPU_FAMILY_SI || /* not implemented yet */ in hwmon_attributes_visible()
3702 adev->family == AMDGPU_FAMILY_KV || /* not implemented yet */ in hwmon_attributes_visible()
3710 if ((!(adev->flags & AMD_IS_APU) || in hwmon_attributes_visible()
3718 if (((adev->flags & AMD_IS_APU) && (gc_ver != IP_VERSION(9, 4, 3))) && in hwmon_attributes_visible()
3723 if (((adev->flags & AMD_IS_APU) || gc_ver < IP_VERSION(9, 0, 0)) && in hwmon_attributes_visible()
3743 return attr->mode; in hwmon_attributes_visible()
3747 if (((adev->flags & AMD_IS_APU) || gc_ver < IP_VERSION(9, 0, 0)) && in hwmon_attributes_visible()
3786 return -EPERM; in amdgpu_retrieve_od_settings()
3787 if (adev->in_suspend && !adev->in_runpm) in amdgpu_retrieve_od_settings()
3788 return -EPERM; in amdgpu_retrieve_od_settings()
3790 ret = pm_runtime_get_sync(adev->dev); in amdgpu_retrieve_od_settings()
3792 pm_runtime_put_autosuspend(adev->dev); in amdgpu_retrieve_od_settings()
3800 pm_runtime_mark_last_busy(adev->dev); in amdgpu_retrieve_od_settings()
3801 pm_runtime_put_autosuspend(adev->dev); in amdgpu_retrieve_od_settings()
3818 if (count > sizeof(buf_cpy) - 1) in parse_input_od_command_lines()
3819 return -EINVAL; in parse_input_od_command_lines()
3847 return -EINVAL; in parse_input_od_command_lines()
3870 return -EPERM; in amdgpu_distribute_custom_od_settings()
3871 if (adev->in_suspend && !adev->in_runpm) in amdgpu_distribute_custom_od_settings()
3872 return -EPERM; in amdgpu_distribute_custom_od_settings()
3882 ret = pm_runtime_get_sync(adev->dev); in amdgpu_distribute_custom_od_settings()
3901 pm_runtime_mark_last_busy(adev->dev); in amdgpu_distribute_custom_od_settings()
3902 pm_runtime_put_autosuspend(adev->dev); in amdgpu_distribute_custom_od_settings()
3907 pm_runtime_mark_last_busy(adev->dev); in amdgpu_distribute_custom_od_settings()
3909 pm_runtime_put_autosuspend(adev->dev); in amdgpu_distribute_custom_od_settings()
3934 * There are two fan control modes supported: auto and manual. With auto mode,
3937 * described here. Normally the ASIC is booted up with auto mode. Any
3946 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in fan_curve_show()
3957 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in fan_curve_store()
3969 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_CURVE_RETRIEVE) in fan_curve_visible()
3972 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_CURVE_SET) in fan_curve_visible()
3995 * This setting works under auto fan control mode only. It adjusts the PMFW's
3997 * interface will switch the fan control to auto mode implicitly.
4004 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in acoustic_limit_threshold_show()
4015 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in acoustic_limit_threshold_store()
4027 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_RETRIEVE) in acoustic_limit_threshold_visible()
4030 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_ACOUSTIC_LIMIT_THRESHOLD_SET) in acoustic_limit_threshold_visible()
4053 * This setting works under auto fan control mode only. It can co-exist with
4054 * other settings which can work also under auto mode. It adjusts the PMFW's
4057 * interface will switch the fan control to auto mode implicitly.
4064 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in acoustic_target_threshold_show()
4075 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in acoustic_target_threshold_store()
4087 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_RETRIEVE) in acoustic_target_threshold_visible()
4090 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_ACOUSTIC_TARGET_THRESHOLD_SET) in acoustic_target_threshold_visible()
4113 * This setting works under auto fan control mode only. It can co-exist with
4114 * other settings which can work also under auto mode. Paring with the
4118 * auto mode implicitly.
4125 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in fan_target_temperature_show()
4136 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in fan_target_temperature_store()
4148 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_RETRIEVE) in fan_target_temperature_visible()
4151 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_TARGET_TEMPERATURE_SET) in fan_target_temperature_visible()
4174 * This setting works under auto fan control mode only. It can co-exist with
4175 * other settings which can work also under auto mode. It adjusts the PMFW's
4177 * via this interface will switch the fan control to auto mode implicitly.
4184 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in fan_minimum_pwm_show()
4195 struct amdgpu_device *adev = (struct amdgpu_device *)container->priv; in fan_minimum_pwm_store()
4207 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_MINIMUM_PWM_RETRIEVE) in fan_minimum_pwm_visible()
4210 if (adev->pm.od_feature_mask & OD_OPS_SUPPORT_FAN_MINIMUM_PWM_SET) in fan_minimum_pwm_visible()
4283 if (list_empty(&adev->pm.od_kobj_list)) in amdgpu_od_set_fini()
4287 &adev->pm.od_kobj_list, entry) { in amdgpu_od_set_fini()
4288 list_del(&container->entry); in amdgpu_od_set_fini()
4291 &container->attribute, entry) { in amdgpu_od_set_fini()
4292 list_del(&attribute->entry); in amdgpu_od_set_fini()
4293 sysfs_remove_file(&container->kobj, in amdgpu_od_set_fini()
4294 &attribute->attribute.attr); in amdgpu_od_set_fini()
4298 kobject_put(&container->kobj); in amdgpu_od_set_fini()
4307 if (!feature_ops->is_visible) in amdgpu_is_od_feature_supported()
4315 mode = feature_ops->is_visible(adev); in amdgpu_is_od_feature_supported()
4333 for (i = 0; i < ARRAY_SIZE(container->sub_feature); i++) { in amdgpu_od_is_self_contained()
4334 if (container->sub_feature[i].name && in amdgpu_od_is_self_contained()
4336 &container->sub_feature[i].ops)) in amdgpu_od_is_self_contained()
4355 return -ENOMEM; in amdgpu_od_set_init()
4356 list_add(&top_set->entry, &adev->pm.od_kobj_list); in amdgpu_od_set_init()
4358 ret = kobject_init_and_add(&top_set->kobj, in amdgpu_od_set_init()
4360 &adev->dev->kobj, in amdgpu_od_set_init()
4365 INIT_LIST_HEAD(&top_set->attribute); in amdgpu_od_set_init()
4366 top_set->priv = adev; in amdgpu_od_set_init()
4371 if (!container->name) in amdgpu_od_set_init()
4383 &container->ops)) in amdgpu_od_set_init()
4392 ret = -ENOMEM; in amdgpu_od_set_init()
4395 list_add(&attribute->entry, &top_set->attribute); in amdgpu_od_set_init()
4397 attribute->attribute.attr.mode = in amdgpu_od_set_init()
4398 container->ops.is_visible(adev); in amdgpu_od_set_init()
4399 attribute->attribute.attr.name = container->name; in amdgpu_od_set_init()
4400 attribute->attribute.show = in amdgpu_od_set_init()
4401 container->ops.show; in amdgpu_od_set_init()
4402 attribute->attribute.store = in amdgpu_od_set_init()
4403 container->ops.store; in amdgpu_od_set_init()
4404 ret = sysfs_create_file(&top_set->kobj, in amdgpu_od_set_init()
4405 &attribute->attribute.attr); in amdgpu_od_set_init()
4412 ret = -ENOMEM; in amdgpu_od_set_init()
4415 list_add(&sub_set->entry, &adev->pm.od_kobj_list); in amdgpu_od_set_init()
4417 ret = kobject_init_and_add(&sub_set->kobj, in amdgpu_od_set_init()
4419 &top_set->kobj, in amdgpu_od_set_init()
4421 container->name); in amdgpu_od_set_init()
4424 INIT_LIST_HEAD(&sub_set->attribute); in amdgpu_od_set_init()
4425 sub_set->priv = adev; in amdgpu_od_set_init()
4427 for (j = 0; j < ARRAY_SIZE(container->sub_feature); j++) { in amdgpu_od_set_init()
4428 feature = &container->sub_feature[j]; in amdgpu_od_set_init()
4429 if (!feature->name) in amdgpu_od_set_init()
4433 &feature->ops)) in amdgpu_od_set_init()
4442 ret = -ENOMEM; in amdgpu_od_set_init()
4445 list_add(&attribute->entry, &sub_set->attribute); in amdgpu_od_set_init()
4447 attribute->attribute.attr.mode = in amdgpu_od_set_init()
4448 feature->ops.is_visible(adev); in amdgpu_od_set_init()
4449 attribute->attribute.attr.name = feature->name; in amdgpu_od_set_init()
4450 attribute->attribute.show = in amdgpu_od_set_init()
4451 feature->ops.show; in amdgpu_od_set_init()
4452 attribute->attribute.store = in amdgpu_od_set_init()
4453 feature->ops.store; in amdgpu_od_set_init()
4454 ret = sysfs_create_file(&sub_set->kobj, in amdgpu_od_set_init()
4455 &attribute->attribute.attr); in amdgpu_od_set_init()
4466 if (list_is_singular(&adev->pm.od_kobj_list)) in amdgpu_od_set_init()
4483 if (adev->pm.sysfs_initialized) in amdgpu_pm_sysfs_init()
4486 INIT_LIST_HEAD(&adev->pm.pm_attr_list); in amdgpu_pm_sysfs_init()
4488 if (adev->pm.dpm_enabled == 0) in amdgpu_pm_sysfs_init()
4493 /* under multi-vf mode, the hwmon attributes are all not supported */ in amdgpu_pm_sysfs_init()
4495 adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev, in amdgpu_pm_sysfs_init()
4498 if (IS_ERR(adev->pm.int_hwmon_dev)) { in amdgpu_pm_sysfs_init()
4499 ret = PTR_ERR(adev->pm.int_hwmon_dev); in amdgpu_pm_sysfs_init()
4500 dev_err(adev->dev, "Unable to register hwmon device: %d\n", ret); in amdgpu_pm_sysfs_init()
4522 &adev->pm.pm_attr_list); in amdgpu_pm_sysfs_init()
4530 } else if (adev->pm.pp_feature & PP_OVERDRIVE_MASK) { in amdgpu_pm_sysfs_init()
4531 dev_info(adev->dev, "overdrive feature is not supported\n"); in amdgpu_pm_sysfs_init()
4535 -EOPNOTSUPP) { in amdgpu_pm_sysfs_init()
4536 ret = devm_device_add_group(adev->dev, in amdgpu_pm_sysfs_init()
4542 adev->pm.sysfs_initialized = true; in amdgpu_pm_sysfs_init()
4547 amdgpu_device_attr_remove_groups(adev, &adev->pm.pm_attr_list); in amdgpu_pm_sysfs_init()
4549 if (adev->pm.int_hwmon_dev) in amdgpu_pm_sysfs_init()
4550 hwmon_device_unregister(adev->pm.int_hwmon_dev); in amdgpu_pm_sysfs_init()
4559 if (adev->pm.int_hwmon_dev) in amdgpu_pm_sysfs_fini()
4560 hwmon_device_unregister(adev->pm.int_hwmon_dev); in amdgpu_pm_sysfs_fini()
4562 amdgpu_device_attr_remove_groups(adev, &adev->pm.pm_attr_list); in amdgpu_pm_sysfs_fini()
4622 if (adev->flags & AMD_IS_APU) in amdgpu_debugfs_pm_info_pp()
4629 if (adev->flags & AMD_IS_APU) in amdgpu_debugfs_pm_info_pp()
4705 {AMD_CG_SUPPORT_GFX_MGLS, "Graphics Medium Grain memory Light Sleep"},
4707 {AMD_CG_SUPPORT_GFX_CGLS, "Graphics Coarse Grain memory Light Sleep"},
4709 {AMD_CG_SUPPORT_GFX_CGTS_LS, "Graphics Coarse Grain Tree Shader Light Sleep"},
4710 {AMD_CG_SUPPORT_GFX_CP_LS, "Graphics Command Processor Light Sleep"},
4711 {AMD_CG_SUPPORT_GFX_RLC_LS, "Graphics Run List Controller Light Sleep"},
4713 {AMD_CG_SUPPORT_GFX_3D_CGLS, "Graphics 3D Coarse Grain memory Light Sleep"},
4714 {AMD_CG_SUPPORT_MC_LS, "Memory Controller Light Sleep"},
4716 {AMD_CG_SUPPORT_SDMA_LS, "System Direct Memory Access Light Sleep"},
4719 {AMD_CG_SUPPORT_BIF_LS, "Bus Interface Light Sleep"},
4722 {AMD_CG_SUPPORT_HDP_LS, "Host Data Path Light Sleep"},
4725 {AMD_CG_SUPPORT_DRM_LS, "Digital Right Management Light Sleep"},
4729 {AMD_CG_SUPPORT_HDP_DS, "Host Data Path Deep Sleep"},
4736 {AMD_CG_SUPPORT_ATHUB_LS, "Address Translation Hub Light Sleep"},
4751 struct amdgpu_device *adev = (struct amdgpu_device *)m->private; in amdgpu_debugfs_pm_info_show()
4757 return -EPERM; in amdgpu_debugfs_pm_info_show()
4758 if (adev->in_suspend && !adev->in_runpm) in amdgpu_debugfs_pm_info_show()
4759 return -EPERM; in amdgpu_debugfs_pm_info_show()
4761 r = pm_runtime_get_sync(dev->dev); in amdgpu_debugfs_pm_info_show()
4763 pm_runtime_put_autosuspend(dev->dev); in amdgpu_debugfs_pm_info_show()
4780 pm_runtime_mark_last_busy(dev->dev); in amdgpu_debugfs_pm_info_show()
4781 pm_runtime_put_autosuspend(dev->dev); in amdgpu_debugfs_pm_info_show()
4789 * amdgpu_pm_priv_buffer_read - Read memory region allocated to FW
4796 struct amdgpu_device *adev = file_inode(f)->i_private; in amdgpu_pm_prv_buffer_read()
4802 return -EPERM; in amdgpu_pm_prv_buffer_read()
4803 if (adev->in_suspend && !adev->in_runpm) in amdgpu_pm_prv_buffer_read()
4804 return -EPERM; in amdgpu_pm_prv_buffer_read()
4811 return -EINVAL; in amdgpu_pm_prv_buffer_read()
4829 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_pm_init()
4830 struct dentry *root = minor->debugfs_root; in amdgpu_debugfs_pm_init()
4832 if (!adev->pm.dpm_enabled) in amdgpu_debugfs_pm_init()
4838 if (adev->pm.smu_prv_buffer_size > 0) in amdgpu_debugfs_pm_init()
4842 adev->pm.smu_prv_buffer_size); in amdgpu_debugfs_pm_init()