75 #define DMUB_CW0_BASE (0x60000000)
76 #define DMUB_CW1_BASE (0x61000000)
77 #define DMUB_CW3_BASE (0x63000000)
78 #define DMUB_CW4_BASE (0x64000000)
79 #define DMUB_CW5_BASE (0x65000000)
80 #define DMUB_CW6_BASE (0x66000000)
82 #define DMUB_REGION5_BASE (0xA0000000)
83 #define DMUB_REGION6_BASE (0xC0000000)
105 	for (pos = 0; pos < end; pos += sizeof(buf))  in dmub_flush_buffer_mem()
147 		for (i = 0; i < 16; ++i) {  in dmub_get_fw_meta_info()
422 	dmub_memset(dmub, 0, sizeof(*dmub));  in dmub_srv_create()
469 	dmub_memset(dmub, 0, sizeof(*dmub));  in dmub_srv_destroy()
477 	uint32_t i, top = 0;  in dmub_srv_calc_regions_for_memory_type()
479 	for (i = 0; i < DMUB_WINDOW_TOTAL; ++i) {  in dmub_srv_calc_regions_for_memory_type()
500 	uint32_t window_sizes[DMUB_WINDOW_TOTAL] = { 0 };  in dmub_srv_calc_region_info()
505 	memset(out, 0, sizeof(*out));  in dmub_srv_calc_region_info()
506 	memset(window_sizes, 0, sizeof(window_sizes));  in dmub_srv_calc_region_info()
525 		if (dmub->fw_version == 0)  in dmub_srv_calc_region_info()
557 	memset(out, 0, sizeof(*out));  in dmub_srv_calc_mem_info()
562 	for (i = 0; i < DMUB_NUM_WINDOWS; ++i) {  in dmub_srv_calc_mem_info()
634 		ASSERT(0);  in dmub_srv_hw_init()
646 	dmub->inbox1_last_wptr = 0;  in dmub_srv_hw_init()
734 	dmub_memset(&rb_params, 0, sizeof(rb_params));  in dmub_srv_hw_init()
746 	dmub_memset(&outbox0_rb_params, 0, sizeof(outbox0_rb_params));  in dmub_srv_hw_init()
799 	dmub->inbox1_last_wptr = 0;  in dmub_srv_hw_reset()
800 	dmub->inbox1_rb.wrpt = 0;  in dmub_srv_hw_reset()
801 	dmub->inbox1_rb.rptr = 0;  in dmub_srv_hw_reset()
802 	dmub->outbox0_rb.wrpt = 0;  in dmub_srv_hw_reset()
803 	dmub->outbox0_rb.rptr = 0;  in dmub_srv_hw_reset()
804 	dmub->outbox1_rb.wrpt = 0;  in dmub_srv_hw_reset()
805 	dmub->outbox1_rb.rptr = 0;  in dmub_srv_hw_reset()
877 	for (i = 0; i <= timeout_us; i += 100) {  in dmub_srv_wait_for_hw_pwr_up()
896 	for (i = 0; i <= timeout_us; i += 100) {  in dmub_srv_wait_for_auto_load()
919 	for (i = 0; i <= timeout_us; ++i) {  in dmub_srv_wait_for_idle()
959 	for (i = 0; i < timeout_us; ++i) {  in dmub_srv_send_gpint_command()
972 	*response = 0;  in dmub_srv_get_gpint_response()
988 	*dataout = 0;  in dmub_srv_get_gpint_dataout()
1004 	status->all = 0;  in dmub_srv_get_fw_boot_status()
1018 	option->all = 0;  in dmub_srv_get_fw_boot_option()
1083 	for (i = 0; i < loop_count; i++)  in dmub_rb_out_trace_buffer_front()
1127 	uint32_t i = 0;  in dmub_srv_wait_for_inbox0_ack()
1128 	uint32_t ack = 0;  in dmub_srv_wait_for_inbox0_ack()
1133 	for (i = 0; i <= timeout_us; i++) {  in dmub_srv_wait_for_inbox0_ack()
1166 	uint32_t rsp_ready = 0;  in dmub_srv_send_reg_inbox0_cmd()
1171 	for (i = 0; i < timeout_us; i++) {  in dmub_srv_send_reg_inbox0_cmd()
1177 	if (rsp_ready == 0)  in dmub_srv_send_reg_inbox0_cmd()
1188 		if (rsp_ready == 0)  in dmub_srv_send_reg_inbox0_cmd()
1192 	ASSERT(rsp_ready == 0);  in dmub_srv_send_reg_inbox0_cmd()