Lines Matching refs:dml2
37 static void initialize_dml2_ip_params(struct dml2_context *dml2, const struct dc *in_dc, struct ip_… in initialize_dml2_ip_params() argument
39 if (dml2->config.use_native_soc_bb_construction) in initialize_dml2_ip_params()
40 dml2_init_ip_params(dml2, in_dc, out); in initialize_dml2_ip_params()
45 static void initialize_dml2_soc_bbox(struct dml2_context *dml2, const struct dc *in_dc, struct soc_… in initialize_dml2_soc_bbox() argument
47 if (dml2->config.use_native_soc_bb_construction) in initialize_dml2_soc_bbox()
48 dml2_init_socbb_params(dml2, in_dc, out); in initialize_dml2_soc_bbox()
53 static void initialize_dml2_soc_states(struct dml2_context *dml2, in initialize_dml2_soc_states() argument
56 if (dml2->config.use_native_soc_bb_construction) in initialize_dml2_soc_states()
57 dml2_init_soc_states(dml2, in_dc, in_bbox, out); in initialize_dml2_soc_states()
62 static void map_hw_resources(struct dml2_context *dml2, in map_hw_resources() argument
74 if (dml2->v20.dml_core_ctx.project != dml_project_dcn35 && in map_hw_resources()
75 dml2->v20.dml_core_ctx.project != dml_project_dcn351) { in map_hw_resources()
85 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[num_pipes] = dml2->v20.scratch.… in map_hw_resources()
86 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[num_pipes] = true; in map_hw_resources()
87 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[num_pipes] = dml2->v20.scratch.d… in map_hw_resources()
88 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[num_pipes] = true; in map_hw_resources()
94 static unsigned int pack_and_call_dml_mode_support_ex(struct dml2_context *dml2, in pack_and_call_dml_mode_support_ex() argument
98 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in pack_and_call_dml_mode_support_ex()
100 s->mode_support_params.mode_lib = &dml2->v20.dml_core_ctx; in pack_and_call_dml_mode_support_ex()
110 static bool optimize_configuration(struct dml2_context *dml2, struct dml2_wrapper_optimize_configur… in optimize_configuration() argument
132 if (dml2->config.use_native_pstate_optimization) { in optimize_configuration()
207 … 0 && p->cur_policy->ODMUse[0] == dml_odm_use_policy_combine_as_needed && dml2->config.minimize_di… in optimize_configuration()
208 odms_needed = dml2_util_get_maximum_odm_combine_for_output(dml2->config.optimize_odm_4to1, in optimize_configuration()
229 static int calculate_lowest_supported_state_for_temp_read(struct dml2_context *dml2, struct dc_stat… in calculate_lowest_supported_state_for_temp_read() argument
231 …struct dml2_calculate_lowest_supported_state_for_temp_read_scratch *s = &dml2->v20.scratch.dml2_ca… in calculate_lowest_supported_state_for_temp_read()
232 struct dml2_wrapper_scratch *s_global = &dml2->v20.scratch; in calculate_lowest_supported_state_for_temp_read()
237 build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy); in calculate_lowest_supported_state_for_temp_read()
244 for (i = 0; i < dml2->config.dcn_pipe_count; i++) { in calculate_lowest_supported_state_for_temp_read()
253 if (!dml2->config.callbacks.build_scaling_params(pipe)) { in calculate_lowest_supported_state_for_temp_read()
260 map_dc_state_into_dml_display_cfg(dml2, display_state, &s->cur_display_config); in calculate_lowest_supported_state_for_temp_read()
262 for (i = 0; i < dml2->v20.dml_core_ctx.states.num_states; i++) { in calculate_lowest_supported_state_for_temp_read()
263 …s->uclk_change_latencies[i] = dml2->v20.dml_core_ctx.states.state_array[i].dram_clock_change_laten… in calculate_lowest_supported_state_for_temp_read()
267 for (j = 0; j < dml2->v20.dml_core_ctx.states.num_states; j++) { in calculate_lowest_supported_state_for_temp_read()
268 …dml2->v20.dml_core_ctx.states.state_array[j].dram_clock_change_latency_us = s_global->dummy_pstate… in calculate_lowest_supported_state_for_temp_read()
271 dml_result = pack_and_call_dml_mode_support_ex(dml2, &s->cur_display_config, &s->evaluation_info); in calculate_lowest_supported_state_for_temp_read()
274 map_hw_resources(dml2, &s->cur_display_config, &s->evaluation_info); in calculate_lowest_supported_state_for_temp_read()
275 …dml_result = dml_mode_programming(&dml2->v20.dml_core_ctx, s_global->mode_support_params.out_lowes… in calculate_lowest_supported_state_for_temp_read()
279 dml2_extract_watermark_set(&dml2->v20.g6_temp_read_watermark_set, &dml2->v20.dml_core_ctx); in calculate_lowest_supported_state_for_temp_read()
280 …dml2->v20.g6_temp_read_watermark_set.cstate_pstate.fclk_pstate_change_ns = dml2->v20.g6_temp_read_… in calculate_lowest_supported_state_for_temp_read()
284 …while (dml2->v20.dml_core_ctx.states.state_array[result].dram_speed_mts < s_global->dummy_pstate_t… in calculate_lowest_supported_state_for_temp_read()
291 for (i = 0; i < dml2->v20.dml_core_ctx.states.num_states; i++) { in calculate_lowest_supported_state_for_temp_read()
292 …dml2->v20.dml_core_ctx.states.state_array[i].dram_clock_change_latency_us = s->uclk_change_latenci… in calculate_lowest_supported_state_for_temp_read()
335 static bool dml_mode_support_wrapper(struct dml2_context *dml2, in dml_mode_support_wrapper() argument
338 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in dml_mode_support_wrapper()
342 build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy); in dml_mode_support_wrapper()
350 for (i = 0; i < dml2->config.dcn_pipe_count; i++) { in dml_mode_support_wrapper()
359 if (!dml2->config.callbacks.build_scaling_params(pipe)) { in dml_mode_support_wrapper()
366 map_dc_state_into_dml_display_cfg(dml2, display_state, &s->cur_display_config); in dml_mode_support_wrapper()
367 if (!dml2->config.skip_hw_state_mapping) in dml_mode_support_wrapper()
368 dml2_apply_det_buffer_allocation_policy(dml2, &s->cur_display_config); in dml_mode_support_wrapper()
370 result = pack_and_call_dml_mode_support_ex(dml2, in dml_mode_support_wrapper()
375 result = does_configuration_meet_sw_policies(dml2, &s->cur_display_config, &s->mode_support_info); in dml_mode_support_wrapper()
379 s->cur_policy = dml2->v20.dml_core_ctx.policy; in dml_mode_support_wrapper()
380 s->optimize_configuration_params.dml_core_ctx = &dml2->v20.dml_core_ctx; in dml_mode_support_wrapper()
381 s->optimize_configuration_params.config = &dml2->config; in dml_mode_support_wrapper()
382 s->optimize_configuration_params.ip_params = &dml2->v20.dml_core_ctx.ip; in dml_mode_support_wrapper()
389 while (optimized_result && optimize_configuration(dml2, &s->optimize_configuration_params)) { in dml_mode_support_wrapper()
390 dml2->v20.dml_core_ctx.policy = s->new_policy; in dml_mode_support_wrapper()
391 optimized_result = pack_and_call_dml_mode_support_ex(dml2, in dml_mode_support_wrapper()
396 …optimized_result = does_configuration_meet_sw_policies(dml2, &s->new_display_config, &s->mode_supp… in dml_mode_support_wrapper()
404 dml2->v20.dml_core_ctx.policy = s->cur_policy; in dml_mode_support_wrapper()
410 result = pack_and_call_dml_mode_support_ex(dml2, in dml_mode_support_wrapper()
417 map_hw_resources(dml2, &s->cur_display_config, &s->mode_support_info); in dml_mode_support_wrapper()
437 static bool optimize_pstate_with_svp_and_drr(struct dml2_context *dml2, struct dc_state *display_st… in optimize_pstate_with_svp_and_drr() argument
439 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in optimize_pstate_with_svp_and_drr()
444 bool force_svp = dml2->config.svp_pstate.force_enable_subvp; in optimize_pstate_with_svp_and_drr()
449 result = dml_mode_support_wrapper(dml2, display_state); in optimize_pstate_with_svp_and_drr()
458 …display_state->stream_count == 1 && dml2->config.callbacks.can_support_mclk_switch_using_fw_based_… in optimize_pstate_with_svp_and_drr()
461 result = dml_mode_support_wrapper(dml2, display_state); in optimize_pstate_with_svp_and_drr()
466 …result = dml_mode_programming(&dml2->v20.dml_core_ctx, s->mode_support_params.out_lowest_state_idx… in optimize_pstate_with_svp_and_drr()
470 result = dml2_svp_add_phantom_pipe_to_dc_state(dml2, display_state, &s->mode_support_info); in optimize_pstate_with_svp_and_drr()
476 result = dml_mode_support_wrapper(dml2, display_state); in optimize_pstate_with_svp_and_drr()
485 …if (dml2_svp_validate_static_schedulability(dml2, display_state, s->mode_support_info.DRAMClockCha… in optimize_pstate_with_svp_and_drr()
498 …if (dml2_svp_drr_schedulable(dml2, display_state, &display_state->streams[drr_display_index]->timi… in optimize_pstate_with_svp_and_drr()
501 result = dml_mode_support_wrapper(dml2, display_state); in optimize_pstate_with_svp_and_drr()
524 dml2_svp_remove_all_phantom_pipes(dml2, display_state); in optimize_pstate_with_svp_and_drr()
527 result = dml_mode_support_wrapper(dml2, display_state); in optimize_pstate_with_svp_and_drr()
538 struct dml2_context *dml2 = context->bw_ctx.dml2; in call_dml_mode_support_and_programming() local
539 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in call_dml_mode_support_and_programming()
541 min_state_for_g6_temp_read = calculate_lowest_supported_state_for_temp_read(dml2, context); in call_dml_mode_support_and_programming()
545 if (!dml2->config.use_native_pstate_optimization) { in call_dml_mode_support_and_programming()
546 result = optimize_pstate_with_svp_and_drr(dml2, context); in call_dml_mode_support_and_programming()
548 result = dml_mode_support_wrapper(dml2, context); in call_dml_mode_support_and_programming()
560 result = dml_mode_programming(&dml2->v20.dml_core_ctx, min_state, &s->cur_display_config, true); in call_dml_mode_support_and_programming()
567 struct dml2_context *dml2 = context->bw_ctx.dml2; in dml2_validate_and_build_resource() local
568 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in dml2_validate_and_build_resource()
579 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
580 …out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabr… in dml2_validate_and_build_resource()
581 …out_clks.uclk_mts = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dram… in dml2_validate_and_build_resource()
582 …out_clks.phyclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].ph… in dml2_validate_and_build_resource()
583 …out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].so… in dml2_validate_and_build_resource()
584 …out_clks.ref_dtbclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx… in dml2_validate_and_build_resource()
591 memset(&dml2->v20.scratch, 0, sizeof(struct dml2_wrapper_scratch)); in dml2_validate_and_build_resource()
592 memset(&dml2->v20.dml_core_ctx.policy, 0, sizeof(struct dml_mode_eval_policy_st)); in dml2_validate_and_build_resource()
593 memset(&dml2->v20.dml_core_ctx.ms, 0, sizeof(struct mode_support_st)); in dml2_validate_and_build_resource()
594 memset(&dml2->v20.dml_core_ctx.mp, 0, sizeof(struct mode_program_st)); in dml2_validate_and_build_resource()
597 dml2_initialize_det_scratch(dml2); in dml2_validate_and_build_resource()
606 if (result && !dml2->config.skip_hw_state_mapping) in dml2_validate_and_build_resource()
607 …dml2_map_dc_pipes(dml2, context, &s->cur_display_config, &s->dml_to_dc_pipe_mapping, in_dc->curren… in dml2_validate_and_build_resource()
614 if (result && !dml2->config.skip_hw_state_mapping) { in dml2_validate_and_build_resource()
615 …need_recalculation = dml2_verify_det_buffer_configuration(dml2, context, &dml2->det_helper_scratch… in dml2_validate_and_build_resource()
619 if (!dml2->config.skip_hw_state_mapping) { in dml2_validate_and_build_resource()
620 …dml2_map_dc_pipes(dml2, context, &s->cur_display_config, &s->dml_to_dc_pipe_mapping, in_dc->curren… in dml2_validate_and_build_resource()
622 …need_recalculation = dml2_verify_det_buffer_configuration(dml2, context, &dml2->det_helper_scratch… in dml2_validate_and_build_resource()
629 out_clks.dispclk_khz = (unsigned int)dml2->v20.dml_core_ctx.mp.Dispclk_calculated * 1000; in dml2_validate_and_build_resource()
632 (lowest_state_idx < dml2->v20.dml_core_ctx.states.num_states - 1)) { in dml2_validate_and_build_resource()
633 lowest_state_idx = dml2->v20.dml_core_ctx.states.num_states - 1; in dml2_validate_and_build_resource()
634 …out_clks.dispclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].d… in dml2_validate_and_build_resource()
637 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
638 …out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabr… in dml2_validate_and_build_resource()
639 …out_clks.uclk_mts = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dram… in dml2_validate_and_build_resource()
640 …out_clks.phyclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].ph… in dml2_validate_and_build_resource()
641 …out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].so… in dml2_validate_and_build_resource()
642 …out_clks.ref_dtbclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx… in dml2_validate_and_build_resource()
645 if (!dml2->config.skip_hw_state_mapping) { in dml2_validate_and_build_resource()
647 …dml2_calculate_rq_and_dlg_params(in_dc, context, &context->res_ctx, dml2, in_dc->res_pool->pipe_co… in dml2_validate_and_build_resource()
651 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.a, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
652 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.b, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
653 …memcpy(&context->bw_ctx.bw.dcn.watermarks.c, &dml2->v20.g6_temp_read_watermark_set, sizeof(context… in dml2_validate_and_build_resource()
654 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.d, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
655 dml2_extract_writeback_wm(context, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
657 context->bw_ctx.dml.vba.StutterPeriod = context->bw_ctx.dml2->v20.dml_core_ctx.mp.StutterPeriod; in dml2_validate_and_build_resource()
673 struct dml2_context *dml2; in dml2_validate_only() local
679 dml2 = context->bw_ctx.dml2; in dml2_validate_only()
682 memset(&dml2->v20.scratch, 0, sizeof(struct dml2_wrapper_scratch)); in dml2_validate_only()
683 memset(&dml2->v20.dml_core_ctx.policy, 0, sizeof(struct dml_mode_eval_policy_st)); in dml2_validate_only()
684 memset(&dml2->v20.dml_core_ctx.ms, 0, sizeof(struct mode_support_st)); in dml2_validate_only()
685 memset(&dml2->v20.dml_core_ctx.mp, 0, sizeof(struct mode_program_st)); in dml2_validate_only()
687 build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy); in dml2_validate_only()
689 map_dc_state_into_dml_display_cfg(dml2, context, &dml2->v20.scratch.cur_display_config); in dml2_validate_only()
691 result = pack_and_call_dml_mode_support_ex(dml2, in dml2_validate_only()
692 &dml2->v20.scratch.cur_display_config, in dml2_validate_only()
693 &dml2->v20.scratch.mode_support_info); in dml2_validate_only()
696 …result = does_configuration_meet_sw_policies(dml2, &dml2->v20.scratch.cur_display_config, &dml2->v… in dml2_validate_only()
701 static void dml2_apply_debug_options(const struct dc *dc, struct dml2_context *dml2) in dml2_apply_debug_options() argument
704 dml2->config.minimize_dispclk_using_odm = dc->debug.minimize_dispclk_using_odm; in dml2_apply_debug_options()
708 bool dml2_validate(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml2, boo… in dml2_validate() argument
712 if (!dml2) in dml2_validate()
714 dml2_apply_debug_options(in_dc, dml2); in dml2_validate()
717 if (dml2->architecture == dml2_architecture_21) { in dml2_validate()
718 out = dml21_validate(in_dc, context, dml2, fast_validate); in dml2_validate()
735 …onst struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) in dml2_init() argument
739 dml21_reinit(in_dc, dml2, config); in dml2_init()
744 (*dml2)->config = *config; in dml2_init()
748 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn35; in dml2_init()
751 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn351; in dml2_init()
754 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn32; in dml2_init()
757 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn321; in dml2_init()
760 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn401; in dml2_init()
763 (*dml2)->v20.dml_core_ctx.project = dml_project_default; in dml2_init()
767 initialize_dml2_ip_params(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.ip); in dml2_init()
769 initialize_dml2_soc_bbox(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc); in dml2_init()
771 …initialize_dml2_soc_states(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc, &(*dml2)->v20.dml_core_ct… in dml2_init()
774 …onst struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) in dml2_create() argument
778 return dml21_create(in_dc, dml2, config); in dml2_create()
782 *dml2 = dml2_allocate_memory(); in dml2_create()
784 if (!(*dml2)) in dml2_create()
787 dml2_init(in_dc, config, dml2); in dml2_create()
792 void dml2_destroy(struct dml2_context *dml2) in dml2_destroy() argument
794 if (!dml2) in dml2_destroy()
797 if (dml2->architecture == dml2_architecture_21) in dml2_destroy()
798 dml21_destroy(dml2); in dml2_destroy()
799 kfree(dml2); in dml2_destroy()
802 void dml2_extract_dram_and_fclk_change_support(struct dml2_context *dml2, in dml2_extract_dram_and_fclk_change_support() argument
805 *fclk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.FCLKChangeSupport[0]; in dml2_extract_dram_and_fclk_change_support()
806 …*dram_clk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.DRAMClockChangeSupport… in dml2_extract_dram_and_fclk_change_support()
809 …2_prepare_mcache_programming(struct dc *in_dc, struct dc_state *context, struct dml2_context *dml2) in dml2_prepare_mcache_programming() argument
811 if (dml2->architecture == dml2_architecture_21) in dml2_prepare_mcache_programming()
812 dml21_prepare_mcache_programming(in_dc, context, dml2); in dml2_prepare_mcache_programming()
845 struct dml2_context **dml2) in dml2_reinit() argument
849 dml21_reinit(in_dc, dml2, config); in dml2_reinit()
853 dml2_init(in_dc, config, dml2); in dml2_reinit()