Lines Matching refs:afb
5476 const struct amdgpu_framebuffer *afb =
5567 ret = amdgpu_dm_plane_fill_plane_buffer_attributes(adev, afb, plane_info->format,
5589 struct amdgpu_framebuffer *afb = (struct amdgpu_framebuffer *)plane_state->fb;
5606 afb->tiling_flags,
5609 afb->tmz_surface,
8811 struct amdgpu_framebuffer *afb = to_amdgpu_framebuffer(plane->state->fb);
8812 struct drm_crtc *crtc = afb ? plane->state->crtc : old_plane_state->crtc;
8815 uint64_t address = afb ? afb->address : 0;
8860 if (afb)
8861 attributes.pitch = afb->base.pitches[0] / afb->base.format->cpp[0];
8996 struct amdgpu_framebuffer *afb = (struct amdgpu_framebuffer *)fb;
9053 afb->tiling_flags,
9056 afb->tmz_surface, false);
9632 struct amdgpu_framebuffer *afb;
9648 afb = to_amdgpu_framebuffer(new_con_state->writeback_job->fb);
9649 if (!afb) {
9697 wb_info->mcif_buf_params.luma_pitch = afb->base.pitches[0];
9698 wb_info->mcif_buf_params.chroma_pitch = afb->base.pitches[1];
9701 wb_info->mcif_buf_params.luma_address[i] = afb->address;
9707 wb_info->mcif_warmup_params.start_address.quad_part = afb->address;
10794 struct amdgpu_framebuffer *afb = to_amdgpu_framebuffer(fb);
10836 linear = AMDGPU_TILING_GET(afb->tiling_flags, GFX12_SWIZZLE_MODE) == 0;
10838 linear = AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE) == 0;
10840 linear = AMDGPU_TILING_GET(afb->tiling_flags, ARRAY_MODE) != DC_ARRAY_2D_TILED_THIN1 &&
10841 AMDGPU_TILING_GET(afb->tiling_flags, ARRAY_MODE) != DC_ARRAY_1D_TILED_THIN1 &&
10842 AMDGPU_TILING_GET(afb->tiling_flags, MICRO_TILE_MODE) == 0;