51 	struct vi_mqd *m;  in update_cu_mask()  local
60 	m = get_mqd(mqd);  in update_cu_mask()
61 	m->compute_static_thread_mgmt_se0 = se_mask[0];  in update_cu_mask()
62 	m->compute_static_thread_mgmt_se1 = se_mask[1];  in update_cu_mask()
63 	m->compute_static_thread_mgmt_se2 = se_mask[2];  in update_cu_mask()
64 	m->compute_static_thread_mgmt_se3 = se_mask[3];  in update_cu_mask()
67 		m->compute_static_thread_mgmt_se0,  in update_cu_mask()
68 		m->compute_static_thread_mgmt_se1,  in update_cu_mask()
69 		m->compute_static_thread_mgmt_se2,  in update_cu_mask()
70 		m->compute_static_thread_mgmt_se3);  in update_cu_mask()
73 static void set_priority(struct vi_mqd *m, struct queue_properties *q)  in set_priority()  argument
75 	m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];  in set_priority()
76 	m->cp_hqd_queue_priority = q->priority;  in set_priority()
96 	struct vi_mqd *m;  in init_mqd()  local
98 	m = (struct vi_mqd *) mqd_mem_obj->cpu_ptr;  in init_mqd()
101 	memset(m, 0, sizeof(struct vi_mqd));  in init_mqd()
103 	m->header = 0xC0310800;  in init_mqd()
104 	m->compute_pipelinestat_enable = 1;  in init_mqd()
105 	m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;  in init_mqd()
106 	m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;  in init_mqd()
107 	m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;  in init_mqd()
108 	m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;  in init_mqd()
110 	m->cp_hqd_persistent_state = CP_HQD_PERSISTENT_STATE__PRELOAD_REQ_MASK |  in init_mqd()
113 	m->cp_mqd_control = 1 << CP_MQD_CONTROL__PRIV_STATE__SHIFT |  in init_mqd()
116 	m->cp_mqd_base_addr_lo        = lower_32_bits(addr);  in init_mqd()
117 	m->cp_mqd_base_addr_hi        = upper_32_bits(addr);  in init_mqd()
119 	m->cp_hqd_quantum = 1 << CP_HQD_QUANTUM__QUANTUM_EN__SHIFT |  in init_mqd()
123 	set_priority(m, q);  in init_mqd()
124 	m->cp_hqd_eop_rptr = 1 << CP_HQD_EOP_RPTR__INIT_FETCHER__SHIFT;  in init_mqd()
127 		m->cp_hqd_iq_rptr = 1;  in init_mqd()
130 		m->compute_tba_lo = lower_32_bits(q->tba_addr >> 8);  in init_mqd()
131 		m->compute_tba_hi = upper_32_bits(q->tba_addr >> 8);  in init_mqd()
132 		m->compute_tma_lo = lower_32_bits(q->tma_addr >> 8);  in init_mqd()
133 		m->compute_tma_hi = upper_32_bits(q->tma_addr >> 8);  in init_mqd()
134 		m->compute_pgm_rsrc2 |=  in init_mqd()
139 		m->cp_hqd_persistent_state |=  in init_mqd()
141 		m->cp_hqd_ctx_save_base_addr_lo =  in init_mqd()
143 		m->cp_hqd_ctx_save_base_addr_hi =  in init_mqd()
145 		m->cp_hqd_ctx_save_size = q->ctx_save_restore_area_size;  in init_mqd()
146 		m->cp_hqd_cntl_stack_size = q->ctl_stack_size;  in init_mqd()
147 		m->cp_hqd_cntl_stack_offset = q->ctl_stack_size;  in init_mqd()
148 		m->cp_hqd_wg_state_offset = q->ctl_stack_size;  in init_mqd()
151 	*mqd = m;  in init_mqd()
154 	mm->update_mqd(mm, m, q, NULL);  in init_mqd()
174 	struct vi_mqd *m;  in __update_mqd()  local
176 	m = get_mqd(mqd);  in __update_mqd()
178 	m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT |  in __update_mqd()
181 	m->cp_hqd_pq_control |=	order_base_2(q->queue_size / 4) - 1;  in __update_mqd()
182 	pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control);  in __update_mqd()
184 	m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);  in __update_mqd()
185 	m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);  in __update_mqd()
187 	m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);  in __update_mqd()
188 	m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);  in __update_mqd()
189 	m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr);  in __update_mqd()
190 	m->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits((uint64_t)q->write_ptr);  in __update_mqd()
192 	m->cp_hqd_pq_doorbell_control =  in __update_mqd()
196 			m->cp_hqd_pq_doorbell_control);  in __update_mqd()
198 	m->cp_hqd_eop_control = atc_bit << CP_HQD_EOP_CONTROL__EOP_ATC__SHIFT |  in __update_mqd()
201 	m->cp_hqd_ib_control = atc_bit << CP_HQD_IB_CONTROL__IB_ATC__SHIFT |  in __update_mqd()
207 	 * is constrained by per-SE EOP done signal count, which is 8-bit.  in __update_mqd()
212 	m->cp_hqd_eop_control |= min(0xA,  in __update_mqd()
214 	m->cp_hqd_eop_base_addr_lo =  in __update_mqd()
215 			lower_32_bits(q->eop_ring_buffer_address >> 8);  in __update_mqd()
216 	m->cp_hqd_eop_base_addr_hi =  in __update_mqd()
217 			upper_32_bits(q->eop_ring_buffer_address >> 8);  in __update_mqd()
219 	m->cp_hqd_iq_timer = atc_bit << CP_HQD_IQ_TIMER__IQ_ATC__SHIFT |  in __update_mqd()
222 	m->cp_hqd_vmid = q->vmid;  in __update_mqd()
225 		m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |  in __update_mqd()
230 		m->cp_hqd_ctx_save_control =  in __update_mqd()
235 	set_priority(m, q);  in __update_mqd()
242 	struct vi_mqd *m = (struct vi_mqd *)mqd;  in check_preemption_failed()  local
244 	return kfd_check_hiq_mqd_doorbell_id(mm->dev, m->queue_doorbell_id0, 0);  in check_preemption_failed()
260 	struct vi_mqd *m;  in get_wave_state()  local
262 	m = get_mqd(mqd);  in get_wave_state()
264 	*ctl_stack_used_size = m->cp_hqd_cntl_stack_size -  in get_wave_state()
265 		m->cp_hqd_cntl_stack_offset;  in get_wave_state()
266 	*save_area_used_size = m->cp_hqd_wg_state_offset -  in get_wave_state()
267 		m->cp_hqd_cntl_stack_size;  in get_wave_state()
285 	struct vi_mqd *m;  in checkpoint_mqd()  local
287 	m = get_mqd(mqd);  in checkpoint_mqd()
289 	memcpy(mqd_dst, m, sizeof(struct vi_mqd));  in checkpoint_mqd()
299 	struct vi_mqd *m;  in restore_mqd()  local
301 	m = (struct vi_mqd *) mqd_mem_obj->cpu_ptr;  in restore_mqd()
304 	memcpy(m, mqd_src, sizeof(*m));  in restore_mqd()
306 	*mqd = m;  in restore_mqd()
310 	m->cp_hqd_pq_doorbell_control =  in restore_mqd()
314 			m->cp_hqd_pq_doorbell_control);  in restore_mqd()
323 	struct vi_mqd *m;  in init_mqd_hiq()  local
327 	m = get_mqd(*mqd);  in init_mqd_hiq()
329 	m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT |  in init_mqd_hiq()
344 	struct vi_sdma_mqd *m;  in init_mqd_sdma()  local
346 	m = (struct vi_sdma_mqd *) mqd_mem_obj->cpu_ptr;  in init_mqd_sdma()
348 	memset(m, 0, sizeof(struct vi_sdma_mqd));  in init_mqd_sdma()
350 	*mqd = m;  in init_mqd_sdma()
354 	mm->update_mqd(mm, m, q, NULL);  in init_mqd_sdma()
361 	struct vi_sdma_mqd *m;  in update_mqd_sdma()  local
363 	m = get_sdma_mqd(mqd);  in update_mqd_sdma()
364 	m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)  in update_mqd_sdma()
370 	m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8);  in update_mqd_sdma()
371 	m->sdmax_rlcx_rb_base_hi = upper_32_bits(q->queue_address >> 8);  in update_mqd_sdma()
372 	m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr);  in update_mqd_sdma()
373 	m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr);  in update_mqd_sdma()
374 	m->sdmax_rlcx_doorbell =  in update_mqd_sdma()
377 	m->sdmax_rlcx_virtual_addr = q->sdma_vm_addr;  in update_mqd_sdma()
379 	m->sdma_engine_id = q->sdma_engine_id;  in update_mqd_sdma()
380 	m->sdma_queue_id = q->sdma_queue_id;  in update_mqd_sdma()
390 	struct vi_sdma_mqd *m;  in checkpoint_mqd_sdma()  local
392 	m = get_sdma_mqd(mqd);  in checkpoint_mqd_sdma()
394 	memcpy(mqd_dst, m, sizeof(struct vi_sdma_mqd));  in checkpoint_mqd_sdma()
404 	struct vi_sdma_mqd *m;  in restore_mqd_sdma()  local
406 	m = (struct vi_sdma_mqd *) mqd_mem_obj->cpu_ptr;  in restore_mqd_sdma()
409 	memcpy(m, mqd_src, sizeof(*m));  in restore_mqd_sdma()
411 	m->sdmax_rlcx_doorbell =  in restore_mqd_sdma()
414 	*mqd = m;  in restore_mqd_sdma()
424 static int debugfs_show_mqd(struct seq_file *m, void *data)  in debugfs_show_mqd()  argument
426 	seq_hex_dump(m, "    ", DUMP_PREFIX_OFFSET, 32, 4,  in debugfs_show_mqd()
431 static int debugfs_show_mqd_sdma(struct seq_file *m, void *data)  in debugfs_show_mqd_sdma()  argument
433 	seq_hex_dump(m, "    ", DUMP_PREFIX_OFFSET, 32, 4,  in debugfs_show_mqd_sdma()