70 #define		PIPEID(x)					((x) << 0)  argument
71 #define		MEID(x)						((x) << 2)  argument
72 #define		VMID(x)						((x) << 4)  argument
73 #define		QUEUEID(x)					((x) << 8)  argument
88 #define	PACKET_TYPE1	1
109 #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)
114 #define		PACKET3_BASE_INDEX(x)                  ((x) << 0)  argument
142 #define		WRITE_DATA_DST_SEL(x)                   ((x) << 8)  argument
144 		 * 1 - memory (sync - via GRBM)
150 #define		WR_ONE_ADDR                             (1 << 16)
151 #define		WR_CONFIRM                              (1 << 20)
152 #define		WRITE_DATA_CACHE_POLICY(x)              ((x) << 25)  argument
154 		 * 1 - Stream
156 #define		WRITE_DATA_ENGINE_SEL(x)                ((x) << 30)  argument
158 		 * 1 - pfp
164 #              define PACKET3_SEM_SEL_SIGNAL_TYPE   (0x1 << 20) /* 0 = increment, 1 = write 1 */
165 #              define PACKET3_SEM_CLIENT_CODE	    ((x) << 24) /* 0 = CP, 1 = CB, 2 = DB */
169 #define		WAIT_REG_MEM_FUNCTION(x)                ((x) << 0)  argument
171 		 * 1 - <
178 #define		WAIT_REG_MEM_MEM_SPACE(x)               ((x) << 4)  argument
180 		 * 1 - mem
182 #define		WAIT_REG_MEM_OPERATION(x)               ((x) << 6)  argument
184 		 * 1 - wr_wait_wr_reg
186 #define		WAIT_REG_MEM_ENGINE(x)                  ((x) << 8)  argument
188 		 * 1 - pfp
191 #define		INDIRECT_BUFFER_TCL2_VOLATILE           (1 << 22)
192 #define		INDIRECT_BUFFER_VALID                   (1 << 23)
193 #define		INDIRECT_BUFFER_CACHE_POLICY(x)         ((x) << 28)  argument
195 		 * 1 - Stream
198 #define     INDIRECT_BUFFER_PRE_ENB(x)		 ((x) << 21)  argument
202 #              define PACKET3_DEST_BASE_0_ENA      (1 << 0)
203 #              define PACKET3_DEST_BASE_1_ENA      (1 << 1)
204 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
205 #              define PACKET3_CB1_DEST_BASE_ENA    (1 << 7)
206 #              define PACKET3_CB2_DEST_BASE_ENA    (1 << 8)
207 #              define PACKET3_CB3_DEST_BASE_ENA    (1 << 9)
208 #              define PACKET3_CB4_DEST_BASE_ENA    (1 << 10)
209 #              define PACKET3_CB5_DEST_BASE_ENA    (1 << 11)
210 #              define PACKET3_CB6_DEST_BASE_ENA    (1 << 12)
211 #              define PACKET3_CB7_DEST_BASE_ENA    (1 << 13)
212 #              define PACKET3_DB_DEST_BASE_ENA     (1 << 14)
213 #              define PACKET3_TCL1_VOL_ACTION_ENA  (1 << 15)
214 #              define PACKET3_TC_VOL_ACTION_ENA    (1 << 16) /* L2 */
215 #              define PACKET3_TC_WB_ACTION_ENA     (1 << 18) /* L2 */
216 #              define PACKET3_DEST_BASE_2_ENA      (1 << 19)
217 #              define PACKET3_DEST_BASE_3_ENA      (1 << 21)
218 #              define PACKET3_TCL1_ACTION_ENA      (1 << 22)
219 #              define PACKET3_TC_ACTION_ENA        (1 << 23) /* L2 */
220 #              define PACKET3_CB_ACTION_ENA        (1 << 25)
221 #              define PACKET3_DB_ACTION_ENA        (1 << 26)
222 #              define PACKET3_SH_KCACHE_ACTION_ENA (1 << 27)
223 #              define PACKET3_SH_KCACHE_VOL_ACTION_ENA (1 << 28)
224 #              define PACKET3_SH_ICACHE_ACTION_ENA (1 << 29)
227 #define		EVENT_TYPE(x)                           ((x) << 0)  argument
228 #define		EVENT_INDEX(x)                          ((x) << 8)  argument
230 		 * 1 - ZPASS_DONE, PIXEL_PIPE_STAT_*
238 #define		EOP_TCL1_VOL_ACTION_EN                  (1 << 12)
239 #define		EOP_TC_VOL_ACTION_EN                    (1 << 13) /* L2 */
240 #define		EOP_TC_WB_ACTION_EN                     (1 << 15) /* L2 */
241 #define		EOP_TCL1_ACTION_EN                      (1 << 16)
242 #define		EOP_TC_ACTION_EN                        (1 << 17) /* L2 */
243 #define		EOP_TCL2_VOLATILE                       (1 << 24)
244 #define		EOP_CACHE_POLICY(x)                     ((x) << 25)  argument
246 		 * 1 - Stream
249 #define		EOP_EXEC				(1 << 28) /* For Trailing Fence */
250 #define		DATA_SEL(x)                             ((x) << 29)  argument
252 		 * 1 - send low 32bit data
257 #define		INT_SEL(x)                              ((x) << 24)  argument
259 		 * 1 - interrupt only (DATA_SEL = 0)
262 #define		DST_SEL(x)                              ((x) << 16)  argument
264 		 * 1 - TC/L2
272 /* 1. header
281 #              define PACKET3_DMA_DATA_ENGINE(x)     ((x) << 0)  argument
283 		 * 1 - PFP
285 #              define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13)  argument
287 		 * 1 - Stream
290 #              define PACKET3_DMA_DATA_SRC_VOLATILE (1 << 15)
291 #              define PACKET3_DMA_DATA_DST_SEL(x)  ((x) << 20)  argument
293 		 * 1 - GDS
296 #              define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25)  argument
298 		 * 1 - Stream
301 #              define PACKET3_DMA_DATA_DST_VOLATILE (1 << 27)
302 #              define PACKET3_DMA_DATA_SRC_SEL(x)  ((x) << 29)  argument
304 		 * 1 - GDS
308 #              define PACKET3_DMA_DATA_CP_SYNC     (1 << 31)
310 #              define PACKET3_DMA_DATA_DIS_WC      (1 << 21)
311 #              define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) ((x) << 22)  argument
313 		 * 1 - 8 in 16
317 #              define PACKET3_DMA_DATA_CMD_DST_SWAP(x) ((x) << 24)  argument
319 		 * 1 - 8 in 16
323 #              define PACKET3_DMA_DATA_CMD_SAS     (1 << 26)
325 		 * 1 - register
327 #              define PACKET3_DMA_DATA_CMD_DAS     (1 << 27)
329 		 * 1 - register
331 #              define PACKET3_DMA_DATA_CMD_SAIC    (1 << 28)
332 #              define PACKET3_DMA_DATA_CMD_DAIC    (1 << 29)
333 #              define PACKET3_DMA_DATA_CMD_RAW_WAIT  (1 << 30)
366 #			define FRAME_CMD(x) ((x) << 28)  argument
368 			 * x=0: tmz_begin
369 			 * x=1: tmz_end
372 /* 1. header
381 #              define PACKET3_SET_RESOURCES_VMID_MASK(x)     ((x) << 0)  argument
382 #              define PACKET3_SET_RESOURCES_UNMAP_LATENTY(x) ((x) << 16)  argument
383 #              define PACKET3_SET_RESOURCES_QUEUE_TYPE(x)    ((x) << 29)  argument
385 /* 1. header
394 #              define PACKET3_MAP_QUEUES_QUEUE_SEL(x)       ((x) << 4)  argument
395 #              define PACKET3_MAP_QUEUES_VMID(x)            ((x) << 8)  argument
396 #              define PACKET3_MAP_QUEUES_QUEUE_TYPE(x)      ((x) << 21)  argument
397 #              define PACKET3_MAP_QUEUES_ALLOC_FORMAT(x)    ((x) << 24)  argument
398 #              define PACKET3_MAP_QUEUES_ENGINE_SEL(x)      ((x) << 26)  argument
399 #              define PACKET3_MAP_QUEUES_NUM_QUEUES(x)      ((x) << 29)  argument
401 #              define PACKET3_MAP_QUEUES_CHECK_DISABLE(x)   ((x) << 1)  argument
402 #              define PACKET3_MAP_QUEUES_DOORBELL_OFFSET(x) ((x) << 2)  argument
403 #              define PACKET3_MAP_QUEUES_QUEUE(x)           ((x) << 26)  argument
404 #              define PACKET3_MAP_QUEUES_PIPE(x)            ((x) << 29)  argument
405 #              define PACKET3_MAP_QUEUES_ME(x)              ((x) << 31)  argument
407 /* 1. header
415 #              define PACKET3_UNMAP_QUEUES_ACTION(x)           ((x) << 0)  argument
417 		 * 1 - RESET_QUEUES
421 #              define PACKET3_UNMAP_QUEUES_QUEUE_SEL(x)        ((x) << 4)  argument
422 #              define PACKET3_UNMAP_QUEUES_ENGINE_SEL(x)       ((x) << 26)  argument
423 #              define PACKET3_UNMAP_QUEUES_NUM_QUEUES(x)       ((x) << 29)  argument
425 #              define PACKET3_UNMAP_QUEUES_PASID(x)            ((x) << 0)  argument
427 #              define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(x) ((x) << 2)  argument
429 #              define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET1(x) ((x) << 2)  argument
431 #              define PACKET3_UNMAP_QUEUES_RB_WPTR(x)          ((x) << 0)  argument
433 #              define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET2(x) ((x) << 2)  argument
435 #              define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET3(x) ((x) << 2)  argument
437 /* 1. header
446 #              define PACKET3_QUERY_STATUS_CONTEXT_ID(x)       ((x) << 0)  argument
447 #              define PACKET3_QUERY_STATUS_INTERRUPT_SEL(x)    ((x) << 28)  argument
448 #              define PACKET3_QUERY_STATUS_COMMAND(x)          ((x) << 30)  argument
450 #              define PACKET3_QUERY_STATUS_PASID(x)            ((x) << 0)  argument
452 #              define PACKET3_QUERY_STATUS_DOORBELL_OFFSET(x)  ((x) << 2)  argument
453 #              define PACKET3_QUERY_STATUS_ENG_SEL(x)          ((x) << 25)  argument
480 #define RB_MAP_PKR0(x)				((x) << 0)  argument
482 #define RB_MAP_PKR1(x)				((x) << 2)  argument
484 #define RB_XSEL2(x)				((x) << 4)  argument
486 #define RB_XSEL					(1 << 6)
487 #define RB_YSEL					(1 << 7)
488 #define PKR_MAP(x)				((x) << 8)  argument
490 #define PKR_XSEL(x)				((x) << 10)  argument
492 #define PKR_YSEL(x)				((x) << 12)  argument
494 #define SC_MAP(x)				((x) << 16)  argument
496 #define SC_XSEL(x)				((x) << 18)  argument
498 #define SC_YSEL(x)				((x) << 20)  argument
500 #define SE_MAP(x)				((x) << 24)  argument
502 #define SE_XSEL(x)				((x) << 26)  argument
504 #define SE_YSEL(x)				((x) << 28)  argument
508 #define SE_PAIR_MAP(x)				((x) << 0)  argument
510 #define SE_PAIR_XSEL(x)				((x) << 2)  argument
512 #define SE_PAIR_YSEL(x)				((x) << 4)  argument