40 #define LATENCY_WATERMARK_MASK(x)      ((x) << 16)  argument
41 #define DC_LB_MEMORY_CONFIG(x)         ((x) << 20)  argument
42 #define ICON_DEGAMMA_MODE(x)           (((x) & 0x3) << 8)  argument
44 #define GRPH_ENDIAN_SWAP(x)            (((x) & 0x3) << 0)  argument
48 #define GRPH_ENDIAN_8IN64              3
49 #define GRPH_RED_CROSSBAR(x)           (((x) & 0x3) << 4)  argument
53 #define GRPH_RED_SEL_A                 3
54 #define GRPH_GREEN_CROSSBAR(x)         (((x) & 0x3) << 6)  argument
58 #define GRPH_GREEN_SEL_R               3
59 #define GRPH_BLUE_CROSSBAR(x)          (((x) & 0x3) << 8)  argument
63 #define GRPH_BLUE_SEL_G                3
64 #define GRPH_ALPHA_CROSSBAR(x)         (((x) & 0x3) << 10)  argument
68 #define GRPH_ALPHA_SEL_B               3
70 #define GRPH_DEPTH(x)                  (((x) & 0x3) << 0)  argument
75 #define GRPH_FORMAT(x)                 (((x) & 0x7) << 8)  argument
80 #define GRPH_FORMAT_AI88               3
86 #define GRPH_FORMAT_8B_ARGB2101010     3
92 #define GRPH_NUM_BANKS(x)              (((x) & 0x3) << 2)  argument
93 #define GRPH_ARRAY_MODE(x)             (((x) & 0x7) << 20)  argument
98 #define GRPH_TILE_SPLIT(x)             (((x) & 0x7) << 13)  argument
99 #define GRPH_BANK_WIDTH(x)             (((x) & 0x3) << 6)  argument
100 #define GRPH_BANK_HEIGHT(x)            (((x) & 0x3) << 11)  argument
101 #define GRPH_MACRO_TILE_ASPECT(x)      (((x) & 0x3) << 18)  argument
102 #define GRPH_ARRAY_MODE(x)             (((x) & 0x7) << 20)  argument
103 #define GRPH_PIPE_CONFIG(x)                   (((x) & 0x1f) << 24)  argument
106 #define CURSOR_MODE(x)                 (((x) & 0x3) << 8)  argument
110 #define CURSOR_24_8_UNPRE_MULT         3
113 #define CURSOR_URGENT_CONTROL(x)       (((x) & 0x7) << 24)  argument
117 #define CURSOR_URGENT_3_8              3
133 #define ES_AND_GS_AUTO       3
134 #define RADEON_PACKET_TYPE3  3
135 #define CE_PARTITION_BASE    3
140 #define GFX_LS_STATUS                              (1 << 3)
143 #define RLC_PUD(x)                               ((x) << 0)  argument
145 #define RLC_PDD(x)                               ((x) << 8)  argument
147 #define RLC_TTPD(x)                              ((x) << 16)  argument
149 #define RLC_MSD(x)                               ((x) << 24)  argument
151 #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30)  argument
152 #define WRITE_DATA_DST_SEL(x) ((x) << 8)  argument
153 #define EVENT_TYPE(x) ((x) << 0)  argument
154 #define EVENT_INDEX(x) ((x) << 8)  argument
155 #define WAIT_REG_MEM_MEM_SPACE(x)               ((x) << 4)  argument
156 #define WAIT_REG_MEM_FUNCTION(x)                ((x) << 0)  argument
157 #define WAIT_REG_MEM_ENGINE(x)                  ((x) << 8)  argument
174 #define		PACKET3_BASE_INDEX(x)                  ((x) << 0)  argument
213 #              define PACKET3_CP_DMA_DST_SEL(x)    ((x) << 20)  argument
214 #              define PACKET3_CP_DMA_ENGINE(x)     ((x) << 27)  argument
215 #              define PACKET3_CP_DMA_SRC_SEL(x)    ((x) << 29)  argument
218 #              define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22)  argument
219 #              define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24)  argument
247 #define		PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16)  argument
254 #              define PACKET3_PREAMBLE_END_CLEAR_STATE       (3 << 28)