Lines Matching full:sdma
602 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_setup_ulv()
627 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
633 for every SDMA instance */ in sdma_v4_0_init_microcode()
786 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_0_ring_insert_nop() local
790 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_0_ring_insert_nop()
919 * @enable: enable SDMA RB/IB
927 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_enable()
961 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_page_stop()
1010 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()
1022 * Enable SDMA utilization. Its only supported on in sdma_v4_0_ctx_switch_enable()
1028 adev->sdma.instance[i].fw_version >= 14) in sdma_v4_0_ctx_switch_enable()
1052 if (adev->sdma.has_page_queue) in sdma_v4_0_enable()
1056 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_enable()
1091 struct amdgpu_ring *ring = &adev->sdma.instance[i].ring; in sdma_v4_0_gfx_resume()
1176 struct amdgpu_ring *ring = &adev->sdma.instance[i].page; in sdma_v4_0_page_resume()
1332 * sdma_v4_0_load_microcode - load the sDMA ME ucode
1349 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_load_microcode()
1350 if (!adev->sdma.instance[i].fw) in sdma_v4_0_load_microcode()
1353 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v4_0_load_microcode()
1358 (adev->sdma.instance[i].fw->data + in sdma_v4_0_load_microcode()
1368 adev->sdma.instance[i].fw_version); in sdma_v4_0_load_microcode()
1400 /* enable sdma ring preemption */ in sdma_v4_0_start()
1405 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1410 if (adev->sdma.has_page_queue) in sdma_v4_0_start()
1435 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1436 ring = &adev->sdma.instance[i].ring; in sdma_v4_0_start()
1442 if (adev->sdma.has_page_queue) { in sdma_v4_0_start()
1443 struct amdgpu_ring *page = &adev->sdma.instance[i].page; in sdma_v4_0_start()
1584 * Update PTEs by copying them from the GART using sDMA (VEGA10).
1612 * Update PTEs by writing them manually using sDMA (VEGA10).
1633 * sdma_v4_0_vm_set_pte_pde - update the page tables using sDMA
1642 * Update the page tables using sDMA (VEGA10).
1670 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_0_ring_pad_ib() local
1676 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_0_ring_pad_ib()
1707 * sdma_v4_0_ring_emit_vm_flush - vm flush using sDMA
1714 * using sDMA (VEGA10).
1739 uint fw_version = adev->sdma.instance[0].fw_version; in sdma_v4_0_fw_support_paging_queue()
1766 adev->sdma.has_page_queue = false; in sdma_v4_0_early_init()
1768 adev->sdma.has_page_queue = true; in sdma_v4_0_early_init()
1803 /* SDMA trap event */ in sdma_v4_0_sw_init()
1804 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1807 &adev->sdma.trap_irq); in sdma_v4_0_sw_init()
1812 /* SDMA SRAM ECC event */ in sdma_v4_0_sw_init()
1813 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1816 &adev->sdma.ecc_irq); in sdma_v4_0_sw_init()
1821 /* SDMA VM_HOLE/DOORBELL_INV/POLL_TIMEOUT/SRBM_WRITE_PROTECTION event*/ in sdma_v4_0_sw_init()
1822 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1825 &adev->sdma.vm_hole_irq); in sdma_v4_0_sw_init()
1831 &adev->sdma.doorbell_invalid_irq); in sdma_v4_0_sw_init()
1837 &adev->sdma.pool_timeout_irq); in sdma_v4_0_sw_init()
1843 &adev->sdma.srbm_write_irq); in sdma_v4_0_sw_init()
1848 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1849 ring = &adev->sdma.instance[i].ring; in sdma_v4_0_sw_init()
1853 DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i, in sdma_v4_0_sw_init()
1860 * On Arcturus, SDMA instance 5~7 has a different vmhub in sdma_v4_0_sw_init()
1870 sprintf(ring->name, "sdma%d", i); in sdma_v4_0_sw_init()
1871 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v4_0_sw_init()
1877 if (adev->sdma.has_page_queue) { in sdma_v4_0_sw_init()
1878 ring = &adev->sdma.instance[i].page; in sdma_v4_0_sw_init()
1909 &adev->sdma.trap_irq, in sdma_v4_0_sw_init()
1918 dev_err(adev->dev, "Failed to initialize sdma ras block!\n"); in sdma_v4_0_sw_init()
1922 /* Allocate memory for SDMA IP Dump buffer */ in sdma_v4_0_sw_init()
1923 ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); in sdma_v4_0_sw_init()
1925 adev->sdma.ip_dump = ptr; in sdma_v4_0_sw_init()
1927 DRM_ERROR("Failed to allocated memory for SDMA IP Dump\n"); in sdma_v4_0_sw_init()
1937 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_fini()
1938 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v4_0_sw_fini()
1939 if (adev->sdma.has_page_queue) in sdma_v4_0_sw_fini()
1940 amdgpu_ring_fini(&adev->sdma.instance[i].page); in sdma_v4_0_sw_fini()
1949 kfree(adev->sdma.ip_dump); in sdma_v4_0_sw_fini()
1976 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_hw_fini()
1977 amdgpu_irq_put(adev, &adev->sdma.ecc_irq, in sdma_v4_0_hw_fini()
1995 /* SMU saves SDMA state for us */ in sdma_v4_0_suspend()
2008 /* SMU restores SDMA state for us */ in sdma_v4_0_resume()
2023 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_is_idle()
2036 u32 sdma[AMDGPU_MAX_SDMA_INSTANCES]; in sdma_v4_0_wait_for_idle() local
2040 for (j = 0; j < adev->sdma.num_instances; j++) { in sdma_v4_0_wait_for_idle()
2041 sdma[j] = RREG32_SDMA(j, mmSDMA0_STATUS_REG); in sdma_v4_0_wait_for_idle()
2042 if (!(sdma[j] & SDMA0_STATUS_REG__IDLE_MASK)) in sdma_v4_0_wait_for_idle()
2045 if (j == adev->sdma.num_instances) in sdma_v4_0_wait_for_idle()
2080 DRM_DEBUG("IH: SDMA trap\n"); in sdma_v4_0_process_trap_irq()
2087 amdgpu_fence_process(&adev->sdma.instance[instance].ring); in sdma_v4_0_process_trap_irq()
2092 amdgpu_fence_process(&adev->sdma.instance[instance].page); in sdma_v4_0_process_trap_irq()
2100 amdgpu_fence_process(&adev->sdma.instance[instance].page); in sdma_v4_0_process_trap_irq()
2135 DRM_ERROR("Illegal instruction in SDMA command stream\n"); in sdma_v4_0_process_illegal_inst_irq()
2143 drm_sched_fault(&adev->sdma.instance[instance].ring.sched); in sdma_v4_0_process_illegal_inst_irq()
2172 if (instance < 0 || instance >= adev->sdma.num_instances) { in sdma_v4_0_print_iv_entry()
2173 dev_err(adev->dev, "sdma instance invalid %d\n", instance); in sdma_v4_0_print_iv_entry()
2181 "[sdma%d] address:0x%016llx src_id:%u ring:%u vmid:%u pasid:%u\n", in sdma_v4_0_print_iv_entry()
2210 dev_dbg_ratelimited(adev->dev, "SDMA received a doorbell from BIF with byte_enable !=0xff\n"); in sdma_v4_0_process_doorbell_invalid_irq()
2230 "SDMA gets an Register Write SRBM_WRITE command in non-privilege command buffer\n"); in sdma_v4_0_process_srbm_write_irq()
2243 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_clock_gating()
2257 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_clock_gating()
2282 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_light_sleep()
2283 /* 1-not override: enable sdma mem light sleep */ in sdma_v4_0_update_medium_grain_light_sleep()
2290 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_light_sleep()
2291 /* 0-override:disable sdma mem light sleep */ in sdma_v4_0_update_medium_grain_light_sleep()
2360 if (!adev->sdma.ip_dump) in sdma_v4_0_print_ip_state()
2363 drm_printf(p, "num_instances:%d\n", adev->sdma.num_instances); in sdma_v4_0_print_ip_state()
2364 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_print_ip_state()
2370 adev->sdma.ip_dump[instance_offset + j]); in sdma_v4_0_print_ip_state()
2381 if (!adev->sdma.ip_dump) in sdma_v4_0_dump_ip_state()
2385 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_dump_ip_state()
2388 adev->sdma.ip_dump[instance_offset + j] = in sdma_v4_0_dump_ip_state()
2483 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_set_ring_funcs()
2484 adev->sdma.instance[i].ring.funcs = &sdma_v4_0_ring_funcs; in sdma_v4_0_set_ring_funcs()
2485 adev->sdma.instance[i].ring.me = i; in sdma_v4_0_set_ring_funcs()
2486 if (adev->sdma.has_page_queue) { in sdma_v4_0_set_ring_funcs()
2487 adev->sdma.instance[i].page.funcs = in sdma_v4_0_set_ring_funcs()
2489 adev->sdma.instance[i].page.me = i; in sdma_v4_0_set_ring_funcs()
2526 adev->sdma.trap_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2527 adev->sdma.ecc_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2529 switch (adev->sdma.num_instances) { in sdma_v4_0_set_irq_funcs()
2532 adev->sdma.vm_hole_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2533 adev->sdma.doorbell_invalid_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2534 adev->sdma.pool_timeout_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2535 adev->sdma.srbm_write_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2540 adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs; in sdma_v4_0_set_irq_funcs()
2541 adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs; in sdma_v4_0_set_irq_funcs()
2542 adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs; in sdma_v4_0_set_irq_funcs()
2543 adev->sdma.vm_hole_irq.funcs = &sdma_v4_0_vm_hole_irq_funcs; in sdma_v4_0_set_irq_funcs()
2544 adev->sdma.doorbell_invalid_irq.funcs = &sdma_v4_0_doorbell_invalid_irq_funcs; in sdma_v4_0_set_irq_funcs()
2545 adev->sdma.pool_timeout_irq.funcs = &sdma_v4_0_pool_timeout_irq_funcs; in sdma_v4_0_set_irq_funcs()
2546 adev->sdma.srbm_write_irq.funcs = &sdma_v4_0_srbm_write_irq_funcs; in sdma_v4_0_set_irq_funcs()
2550 * sdma_v4_0_emit_copy_buffer - copy buffer using the sDMA engine
2580 * sdma_v4_0_emit_fill_buffer - fill buffer using the sDMA engine
2614 if (adev->sdma.has_page_queue) in sdma_v4_0_set_buffer_funcs()
2615 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].page; in sdma_v4_0_set_buffer_funcs()
2617 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v4_0_set_buffer_funcs()
2634 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_set_vm_pte_funcs()
2635 if (adev->sdma.has_page_queue) in sdma_v4_0_set_vm_pte_funcs()
2636 sched = &adev->sdma.instance[i].page.sched; in sdma_v4_0_set_vm_pte_funcs()
2638 sched = &adev->sdma.instance[i].ring.sched; in sdma_v4_0_set_vm_pte_funcs()
2641 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v4_0_set_vm_pte_funcs()
2653 /* the SDMA_EDC_COUNTER register in each sdma instance in sdma_v4_0_get_ras_error_count()
2660 DRM_INFO("Detected %s in SDMA%d, SED %d\n", in sdma_v4_0_get_ras_error_count()
2694 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_query_ras_error_count()
2696 dev_err(adev->dev, "Query ras error count failed in SDMA%d\n", i); in sdma_v4_0_query_ras_error_count()
2708 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v4_0_reset_ras_error_count()
2730 adev->sdma.ras = &sdma_v4_0_ras; in sdma_v4_0_set_ras_funcs()
2733 adev->sdma.ras = &sdma_v4_4_ras; in sdma_v4_0_set_ras_funcs()