42  * jpeg_v2_0_early_init - set function pointers
52 	adev->jpeg.num_jpeg_inst = 1;  in jpeg_v2_0_early_init()
53 	adev->jpeg.num_jpeg_rings = 1;  in jpeg_v2_0_early_init()
62  * jpeg_v2_0_sw_init - sw init for JPEG block
76 		VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq);  in jpeg_v2_0_sw_init()
88 	ring = adev->jpeg.inst->ring_dec;  in jpeg_v2_0_sw_init()
89 	ring->use_doorbell = true;  in jpeg_v2_0_sw_init()
90 	ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1;  in jpeg_v2_0_sw_init()
91 	ring->vm_hub = AMDGPU_MMHUB0(0);  in jpeg_v2_0_sw_init()
92 	sprintf(ring->name, "jpeg_dec");  in jpeg_v2_0_sw_init()
93 	r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq,  in jpeg_v2_0_sw_init()
98 	adev->jpeg.internal.jpeg_pitch[0] = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;  in jpeg_v2_0_sw_init()
99 	adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);  in jpeg_v2_0_sw_init()
105  * jpeg_v2_0_sw_fini - sw fini for JPEG block
126  * jpeg_v2_0_hw_init - start and test JPEG block
134 	struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;  in jpeg_v2_0_hw_init()
136 	adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,  in jpeg_v2_0_hw_init()
137 		(adev->doorbell_index.vcn.vcn_ring0_1 << 1), 0);  in jpeg_v2_0_hw_init()
143  * jpeg_v2_0_hw_fini - stop the hardware block
153 	cancel_delayed_work_sync(&adev->vcn.idle_work);  in jpeg_v2_0_hw_fini()
155 	if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&  in jpeg_v2_0_hw_fini()
163  * jpeg_v2_0_suspend - suspend JPEG block
184  * jpeg_v2_0_resume - resume JPEG block
209 	if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {  in jpeg_v2_0_disable_power_gating()
232 	if (adev->pg_flags & AMD_PG_SUPPORT_JPEG) {  in jpeg_v2_0_enable_power_gating()
262 	if (adev->cg_flags & AMD_CG_SUPPORT_JPEG_MGCG)  in jpeg_v2_0_disable_clock_gating()
285 	if (adev->cg_flags & AMD_CG_SUPPORT_JPEG_MGCG)  in jpeg_v2_0_enable_clock_gating()
304  * jpeg_v2_0_start - start JPEG block
312 	struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;  in jpeg_v2_0_start()
315 	if (adev->pm.dpm_enabled)  in jpeg_v2_0_start()
326 	WREG32_SOC15(JPEG, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config);  in jpeg_v2_0_start()
340 		lower_32_bits(ring->gpu_addr));  in jpeg_v2_0_start()
342 		upper_32_bits(ring->gpu_addr));  in jpeg_v2_0_start()
346 	WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_SIZE, ring->ring_size / 4);  in jpeg_v2_0_start()
347 	ring->wptr = RREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR);  in jpeg_v2_0_start()
353  * jpeg_v2_0_stop - stop JPEG block
376 	if (adev->pm.dpm_enabled)  in jpeg_v2_0_stop()
383  * jpeg_v2_0_dec_ring_get_rptr - get read pointer
391 	struct amdgpu_device *adev = ring->adev;  in jpeg_v2_0_dec_ring_get_rptr()
397  * jpeg_v2_0_dec_ring_get_wptr - get write pointer
405 	struct amdgpu_device *adev = ring->adev;  in jpeg_v2_0_dec_ring_get_wptr()
407 	if (ring->use_doorbell)  in jpeg_v2_0_dec_ring_get_wptr()
408 		return *ring->wptr_cpu_addr;  in jpeg_v2_0_dec_ring_get_wptr()
414  * jpeg_v2_0_dec_ring_set_wptr - set write pointer
422 	struct amdgpu_device *adev = ring->adev;  in jpeg_v2_0_dec_ring_set_wptr()
424 	if (ring->use_doorbell) {  in jpeg_v2_0_dec_ring_set_wptr()
425 		*ring->wptr_cpu_addr = lower_32_bits(ring->wptr);  in jpeg_v2_0_dec_ring_set_wptr()
426 		WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr));  in jpeg_v2_0_dec_ring_set_wptr()
428 		WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr));  in jpeg_v2_0_dec_ring_set_wptr()
433  * jpeg_v2_0_dec_ring_insert_start - insert a start command
451  * jpeg_v2_0_dec_ring_insert_end - insert a end command
469  * jpeg_v2_0_dec_ring_emit_fence - emit an fence & trap command
520  * jpeg_v2_0_dec_ring_emit_ib - execute indirect buffer
543 	if (ring->funcs->parse_cs)  in jpeg_v2_0_dec_ring_emit_ib()
554 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));  in jpeg_v2_0_dec_ring_emit_ib()
558 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in jpeg_v2_0_dec_ring_emit_ib()
562 	amdgpu_ring_write(ring, ib->length_dw);  in jpeg_v2_0_dec_ring_emit_ib()
566 	amdgpu_ring_write(ring, lower_32_bits(ring->gpu_addr));  in jpeg_v2_0_dec_ring_emit_ib()
570 	amdgpu_ring_write(ring, upper_32_bits(ring->gpu_addr));  in jpeg_v2_0_dec_ring_emit_ib()
618 	struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->vm_hub];  in jpeg_v2_0_dec_ring_emit_vm_flush()
624 	data0 = hub->ctx0_ptb_addr_lo32 + vmid * hub->ctx_addr_distance;  in jpeg_v2_0_dec_ring_emit_vm_flush()
652 	WARN_ON(ring->wptr % 2 || count % 2);  in jpeg_v2_0_dec_ring_nop()
688 			return -EBUSY;  in jpeg_v2_0_set_clockgating_state()
703 	if (state == adev->jpeg.cur_state)  in jpeg_v2_0_set_powergating_state()
712 		adev->jpeg.cur_state = state;  in jpeg_v2_0_set_powergating_state()
731 	switch (entry->src_id) {  in jpeg_v2_0_process_interrupt()
733 		amdgpu_fence_process(adev->jpeg.inst->ring_dec);  in jpeg_v2_0_process_interrupt()
737 			  entry->src_id, entry->src_data[0]);  in jpeg_v2_0_process_interrupt()
798 	adev->jpeg.inst->ring_dec->funcs = &jpeg_v2_0_dec_ring_vm_funcs;  in jpeg_v2_0_set_dec_ring_funcs()
808 	adev->jpeg.inst->irq.num_types = 1;  in jpeg_v2_0_set_irq_funcs()
809 	adev->jpeg.inst->irq.funcs = &jpeg_v2_0_irq_funcs;  in jpeg_v2_0_set_irq_funcs()
821  * jpeg_v2_dec_ring_parse_cs - command submission parser
827  * Parse the command stream, return -EINVAL for invalid packet,
834 	u32 i, reg, res, cond, type;  in jpeg_v2_dec_ring_parse_cs()  local
835 	struct amdgpu_device *adev = parser->adev;  in jpeg_v2_dec_ring_parse_cs()
837 	for (i = 0; i < ib->length_dw ; i += 2) {  in jpeg_v2_dec_ring_parse_cs()
838 		reg  = CP_PACKETJ_GET_REG(ib->ptr[i]);  in jpeg_v2_dec_ring_parse_cs()
839 		res  = CP_PACKETJ_GET_RES(ib->ptr[i]);  in jpeg_v2_dec_ring_parse_cs()
840 		cond = CP_PACKETJ_GET_COND(ib->ptr[i]);  in jpeg_v2_dec_ring_parse_cs()
841 		type = CP_PACKETJ_GET_TYPE(ib->ptr[i]);  in jpeg_v2_dec_ring_parse_cs()
844 			return -EINVAL;  in jpeg_v2_dec_ring_parse_cs()
848 			if (cond != PACKETJ_CONDITION_CHECK0 || reg < JPEG_REG_RANGE_START ||  in jpeg_v2_dec_ring_parse_cs()
850 				dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);  in jpeg_v2_dec_ring_parse_cs()
851 				return -EINVAL;  in jpeg_v2_dec_ring_parse_cs()
855 			if (cond != PACKETJ_CONDITION_CHECK3 || reg < JPEG_REG_RANGE_START ||  in jpeg_v2_dec_ring_parse_cs()
857 				dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);  in jpeg_v2_dec_ring_parse_cs()
858 				return -EINVAL;  in jpeg_v2_dec_ring_parse_cs()
862 			if (ib->ptr[i] == CP_PACKETJ_NOP)  in jpeg_v2_dec_ring_parse_cs()
864 			dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);  in jpeg_v2_dec_ring_parse_cs()
865 			return -EINVAL;  in jpeg_v2_dec_ring_parse_cs()
867 			dev_err(adev->dev, "Unknown packet type %d !\n", type);  in jpeg_v2_dec_ring_parse_cs()
868 			return -EINVAL;  in jpeg_v2_dec_ring_parse_cs()