Lines Matching refs:kiq_ring
4314 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_kiq_kcq_enable() local
4333 r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 8); in gfx_v8_0_kiq_kcq_enable()
4339 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v8_0_kiq_kcq_enable()
4340 amdgpu_ring_write(kiq_ring, 0); /* vmid_mask:0 queue_type:0 (KIQ) */ in gfx_v8_0_kiq_kcq_enable()
4341 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v8_0_kiq_kcq_enable()
4342 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v8_0_kiq_kcq_enable()
4343 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v8_0_kiq_kcq_enable()
4344 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v8_0_kiq_kcq_enable()
4345 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v8_0_kiq_kcq_enable()
4346 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v8_0_kiq_kcq_enable()
4353 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in gfx_v8_0_kiq_kcq_enable()
4355 amdgpu_ring_write(kiq_ring, in gfx_v8_0_kiq_kcq_enable()
4357 amdgpu_ring_write(kiq_ring, in gfx_v8_0_kiq_kcq_enable()
4362 amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr)); in gfx_v8_0_kiq_kcq_enable()
4363 amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr)); in gfx_v8_0_kiq_kcq_enable()
4364 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx_v8_0_kiq_kcq_enable()
4365 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx_v8_0_kiq_kcq_enable()
4368 amdgpu_ring_commit(kiq_ring); in gfx_v8_0_kiq_kcq_enable()
4806 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_kcq_disable() local
4808 r = amdgpu_ring_alloc(kiq_ring, 6 * adev->gfx.num_compute_rings); in gfx_v8_0_kcq_disable()
4815 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); in gfx_v8_0_kcq_disable()
4816 amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */ in gfx_v8_0_kcq_disable()
4821 amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index)); in gfx_v8_0_kcq_disable()
4822 amdgpu_ring_write(kiq_ring, 0); in gfx_v8_0_kcq_disable()
4823 amdgpu_ring_write(kiq_ring, 0); in gfx_v8_0_kcq_disable()
4824 amdgpu_ring_write(kiq_ring, 0); in gfx_v8_0_kcq_disable()
4826 r = amdgpu_ring_test_helper(kiq_ring); in gfx_v8_0_kcq_disable()
6893 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v8_0_reset_kgq() local
6906 if (amdgpu_ring_alloc(kiq_ring, 5)) { in gfx_v8_0_reset_kgq()
6912 gfx_v8_0_ring_emit_wreg(kiq_ring, mmCP_VMID_RESET, tmp); in gfx_v8_0_reset_kgq()
6913 amdgpu_ring_commit(kiq_ring); in gfx_v8_0_reset_kgq()
6917 r = amdgpu_ring_test_ring(kiq_ring); in gfx_v8_0_reset_kgq()