Lines Matching refs:NUM_BANKS
76 #define NUM_BANKS(x) ((x) << GB_MACROTILE_MODE0__NUM_BANKS__SHIFT) macro
2194 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2198 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2202 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2206 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2210 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2214 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2218 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2222 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2226 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2230 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2234 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2238 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2242 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2246 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2386 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2390 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2394 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2398 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2402 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2406 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2410 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2414 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2418 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2422 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2426 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2430 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2434 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2438 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v8_0_tiling_mode_table_init()
2575 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2579 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2583 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2587 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2591 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2595 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2599 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2603 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2607 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2611 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2615 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2619 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2623 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v8_0_tiling_mode_table_init()
2627 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v8_0_tiling_mode_table_init()
2765 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2770 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2775 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2780 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2785 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2790 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2795 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2800 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2805 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2810 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2815 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2820 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2825 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2830 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v8_0_tiling_mode_table_init()
2967 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2972 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2977 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2982 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2987 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2992 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2997 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3002 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3007 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3012 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3017 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3022 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3027 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v8_0_tiling_mode_table_init()
3032 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v8_0_tiling_mode_table_init()
3149 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3153 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3157 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3161 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3165 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3169 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3173 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3177 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3181 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3185 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3189 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3193 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3197 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3201 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3326 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3330 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3334 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3338 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3342 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3346 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3350 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
3354 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3358 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3362 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3366 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3370 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3374 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
3378 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()