1120 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1124 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1128 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1132 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1136 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1140 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1144 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1148 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) |  in gfx_v7_0_tiling_mode_table_init()
1152 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1156 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1160 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1164 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1168 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1172 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1303 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1307 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1311 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1315 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1319 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1323 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1327 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1331 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1335 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1339 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1343 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1347 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1351 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1355 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1473 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1477 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1481 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1485 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1489 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1493 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1497 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1501 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_8) |  in gfx_v7_0_tiling_mode_table_init()
1505 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1509 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_4) |  in gfx_v7_0_tiling_mode_table_init()
1513 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1517 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_2) |  in gfx_v7_0_tiling_mode_table_init()
1521 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()
1525 				BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) |  in gfx_v7_0_tiling_mode_table_init()