Lines Matching +full:2 +full:v5
55 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
56 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
57 args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
58 args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
65 …args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2); in amdgpu_atombios_crtc_overscan_setup()
66 …rgs.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2); in amdgpu_atombios_crtc_overscan_setup()
68 … args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2); in amdgpu_atombios_crtc_overscan_setup()
69 …gs.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2); in amdgpu_atombios_crtc_overscan_setup()
200 args.usH_Size = cpu_to_le16(mode->crtc_hdisplay - (amdgpu_crtc->h_border * 2)); in amdgpu_atombios_crtc_set_dtd_timing()
202 cpu_to_le16(mode->crtc_hblank_end - mode->crtc_hdisplay + (amdgpu_crtc->h_border * 2)); in amdgpu_atombios_crtc_set_dtd_timing()
203 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay - (amdgpu_crtc->v_border * 2)); in amdgpu_atombios_crtc_set_dtd_timing()
205 cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay + (amdgpu_crtc->v_border * 2)); in amdgpu_atombios_crtc_set_dtd_timing()
347 /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ in amdgpu_atombios_crtc_adjust_pll()
349 adjusted_clock = mode->clock * 2; in amdgpu_atombios_crtc_adjust_pll()
366 clock = (clock * 3) / 2; in amdgpu_atombios_crtc_adjust_pll()
369 clock = clock * 2; in amdgpu_atombios_crtc_adjust_pll()
389 case 2: in amdgpu_atombios_crtc_adjust_pll()
462 PIXEL_CLOCK_PARAMETERS_V5 v5; member
491 args.v5.ucCRTC = ATOM_CRTC_INVALID; in amdgpu_atombios_crtc_set_disp_eng_pll()
492 args.v5.usPixelClock = cpu_to_le16(dispclk); in amdgpu_atombios_crtc_set_disp_eng_pll()
493 args.v5.ucPpll = ATOM_DCPLL; in amdgpu_atombios_crtc_set_disp_eng_pll()
541 case 2: in amdgpu_atombios_crtc_set_dce_clock()
616 case 2: in amdgpu_atombios_crtc_program_pll()
643 args.v5.ucCRTC = crtc_id; in amdgpu_atombios_crtc_program_pll()
644 args.v5.usPixelClock = cpu_to_le16(clock / 10); in amdgpu_atombios_crtc_program_pll()
645 args.v5.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll()
646 args.v5.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll()
647 args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); in amdgpu_atombios_crtc_program_pll()
648 args.v5.ucPostDiv = post_div; in amdgpu_atombios_crtc_program_pll()
649 args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */ in amdgpu_atombios_crtc_program_pll()
652 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_REF_DIV_SRC; in amdgpu_atombios_crtc_program_pll()
657 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP; in amdgpu_atombios_crtc_program_pll()
661 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP; in amdgpu_atombios_crtc_program_pll()
665 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP; in amdgpu_atombios_crtc_program_pll()
669 args.v5.ucTransmitterID = encoder_id; in amdgpu_atombios_crtc_program_pll()
670 args.v5.ucEncoderMode = encoder_mode; in amdgpu_atombios_crtc_program_pll()
671 args.v5.ucPpll = pll_id; in amdgpu_atombios_crtc_program_pll()
844 pll = &adev->clock.ppll[2]; in amdgpu_atombios_crtc_set_pll()
877 step_size = (2 * amount * ref_div * ((u32)amdgpu_crtc->ss.rate * 2048)) / in amdgpu_atombios_crtc_set_pll()