Lines Matching +full:ati +full:- +full:target
38 #include "atom-names.h"
39 #include "atom-bits.h"
99 while (n--) in debug_print_spaces()
121 temp = ctx->card->reg_read(ctx->card, CU16(base + 1)); in atom_iio_execute()
125 ctx->card->reg_write(ctx->card, CU16(base + 1), temp); in atom_iio_execute()
130 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
136 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + in atom_iio_execute()
142 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
146 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + in atom_iio_execute()
152 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
156 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + in atom_iio_execute()
162 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
165 ((ctx-> in atom_iio_execute()
166 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 - in atom_iio_execute()
186 struct atom_context *gctx = ctx->ctx; in atom_get_src_int()
195 idx += gctx->reg_block; in atom_get_src_int()
196 switch (gctx->io_mode) { in atom_get_src_int()
198 val = gctx->card->reg_read(gctx->card, idx); in atom_get_src_int()
207 if (!(gctx->io_mode & 0x80)) { in atom_get_src_int()
211 if (!gctx->iio[gctx->io_mode & 0x7F]) { in atom_get_src_int()
213 gctx->io_mode & 0x7F); in atom_get_src_int()
218 gctx->iio[gctx->io_mode & 0x7F], in atom_get_src_int()
227 if (idx < ctx->ps_size) in atom_get_src_int()
228 val = get_unaligned_le32((u32 *)&ctx->ps[idx]); in atom_get_src_int()
230 pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size); in atom_get_src_int()
241 val = gctx->divmul[0]; in atom_get_src_int()
244 val = gctx->divmul[1]; in atom_get_src_int()
247 val = gctx->data_block; in atom_get_src_int()
250 val = gctx->shift; in atom_get_src_int()
253 val = 1 << gctx->shift; in atom_get_src_int()
256 val = ~(1 << gctx->shift); in atom_get_src_int()
259 val = gctx->fb_base; in atom_get_src_int()
262 val = gctx->io_attr; in atom_get_src_int()
265 val = gctx->reg_block; in atom_get_src_int()
268 if (idx < ctx->ws_size) in atom_get_src_int()
269 val = ctx->ws[idx]; in atom_get_src_int()
271 pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size); in atom_get_src_int()
278 if (gctx->data_block) in atom_get_src_int()
279 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block); in atom_get_src_int()
283 val = U32(idx + gctx->data_block); in atom_get_src_int()
288 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { in atom_get_src_int()
290 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); in atom_get_src_int()
293 val = gctx->scratch[(gctx->fb_base / 4) + idx]; in atom_get_src_int()
329 val = gctx->card->pll_read(gctx->card, idx); in atom_get_src_int()
336 val = gctx->card->mc_read(gctx->card, idx); in atom_get_src_int()
346 DEBUG(".[31:0] -> 0x%08X\n", val); in atom_get_src_int()
349 DEBUG(".[15:0] -> 0x%04X\n", val); in atom_get_src_int()
352 DEBUG(".[23:8] -> 0x%04X\n", val); in atom_get_src_int()
355 DEBUG(".[31:16] -> 0x%04X\n", val); in atom_get_src_int()
358 DEBUG(".[7:0] -> 0x%02X\n", val); in atom_get_src_int()
361 DEBUG(".[15:8] -> 0x%02X\n", val); in atom_get_src_int()
364 DEBUG(".[23:16] -> 0x%02X\n", val); in atom_get_src_int()
367 DEBUG(".[31:24] -> 0x%02X\n", val); in atom_get_src_int()
461 struct atom_context *gctx = ctx->ctx; in atom_put_dst()
472 idx += gctx->reg_block; in atom_put_dst()
473 switch (gctx->io_mode) { in atom_put_dst()
476 gctx->card->reg_write(gctx->card, idx, in atom_put_dst()
479 gctx->card->reg_write(gctx->card, idx, val); in atom_put_dst()
488 if (!(gctx->io_mode & 0x80)) { in atom_put_dst()
492 if (!gctx->iio[gctx->io_mode & 0xFF]) { in atom_put_dst()
494 gctx->io_mode & 0x7F); in atom_put_dst()
497 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], in atom_put_dst()
505 if (idx >= ctx->ps_size) { in atom_put_dst()
506 pr_info("PS index out of range: %i > %i\n", idx, ctx->ps_size); in atom_put_dst()
509 ctx->ps[idx] = cpu_to_le32(val); in atom_put_dst()
517 gctx->divmul[0] = val; in atom_put_dst()
520 gctx->divmul[1] = val; in atom_put_dst()
523 gctx->data_block = val; in atom_put_dst()
526 gctx->shift = val; in atom_put_dst()
532 gctx->fb_base = val; in atom_put_dst()
535 gctx->io_attr = val; in atom_put_dst()
538 gctx->reg_block = val; in atom_put_dst()
541 if (idx >= ctx->ws_size) { in atom_put_dst()
542 pr_info("WS index out of range: %i > %i\n", idx, ctx->ws_size); in atom_put_dst()
545 ctx->ws[idx] = val; in atom_put_dst()
551 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { in atom_put_dst()
553 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); in atom_put_dst()
555 gctx->scratch[(gctx->fb_base / 4) + idx] = val; in atom_put_dst()
562 gctx->card->pll_write(gctx->card, idx, val); in atom_put_dst()
568 gctx->card->mc_write(gctx->card, idx, val); in atom_put_dst()
573 DEBUG(".[31:0] <- 0x%08X\n", old_val); in atom_put_dst()
576 DEBUG(".[15:0] <- 0x%04X\n", old_val); in atom_put_dst()
579 DEBUG(".[23:8] <- 0x%04X\n", old_val); in atom_put_dst()
582 DEBUG(".[31:16] <- 0x%04X\n", old_val); in atom_put_dst()
585 DEBUG(".[7:0] <- 0x%02X\n", old_val); in atom_put_dst()
588 DEBUG(".[15:8] <- 0x%02X\n", old_val); in atom_put_dst()
591 DEBUG(".[23:16] <- 0x%02X\n", old_val); in atom_put_dst()
594 DEBUG(".[31:24] <- 0x%02X\n", old_val); in atom_put_dst()
641 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) in atom_op_calltable()
642 …r = amdgpu_atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift, ctx->ps_size - ctx->p… in atom_op_calltable()
644 ctx->abort = true; in atom_op_calltable()
668 ctx->ctx->cs_equal = (dst == src); in atom_op_compare()
669 ctx->ctx->cs_above = (dst > src); in atom_op_compare()
670 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", in atom_op_compare()
671 ctx->ctx->cs_above ? "GT" : "LE"); in atom_op_compare()
695 ctx->ctx->divmul[0] = dst / src; in atom_op_div()
696 ctx->ctx->divmul[1] = dst % src; in atom_op_div()
698 ctx->ctx->divmul[0] = 0; in atom_op_div()
699 ctx->ctx->divmul[1] = 0; in atom_op_div()
714 val64 |= ((uint64_t)ctx->ctx->divmul[1]) << 32; in atom_op_div32()
716 ctx->ctx->divmul[0] = lower_32_bits(val64); in atom_op_div32()
717 ctx->ctx->divmul[1] = upper_32_bits(val64); in atom_op_div32()
719 ctx->ctx->divmul[0] = 0; in atom_op_div32()
720 ctx->ctx->divmul[1] = 0; in atom_op_div32()
731 int execute = 0, target = U16(*ptr); in atom_op_jump() local
737 execute = ctx->ctx->cs_above; in atom_op_jump()
740 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal; in atom_op_jump()
746 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal); in atom_op_jump()
749 execute = !ctx->ctx->cs_above; in atom_op_jump()
752 execute = ctx->ctx->cs_equal; in atom_op_jump()
755 execute = !ctx->ctx->cs_equal; in atom_op_jump()
760 SDEBUG(" target: 0x%04X\n", target); in atom_op_jump()
762 if (ctx->last_jump == (ctx->start + target)) { in atom_op_jump()
764 if (time_after(cjiffies, ctx->last_jump_jiffies)) { in atom_op_jump()
765 cjiffies -= ctx->last_jump_jiffies; in atom_op_jump()
769 ctx->abort = true; in atom_op_jump()
773 ctx->last_jump_jiffies = jiffies; in atom_op_jump()
776 ctx->last_jump = ctx->start + target; in atom_op_jump()
777 ctx->last_jump_jiffies = jiffies; in atom_op_jump()
779 *ptr = ctx->start + target; in atom_op_jump()
825 ctx->ctx->divmul[0] = dst * src; in atom_op_mul()
838 ctx->ctx->divmul[0] = lower_32_bits(val64); in atom_op_mul32()
839 ctx->ctx->divmul[1] = upper_32_bits(val64); in atom_op_mul32()
888 ctx->ctx->data_block = 0; in atom_op_setdatablock()
890 ctx->ctx->data_block = ctx->start; in atom_op_setdatablock()
892 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx); in atom_op_setdatablock()
893 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block); in atom_op_setdatablock()
900 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr); in atom_op_setfbbase()
914 ctx->ctx->io_mode = ATOM_IO_MM; in atom_op_setport()
916 ctx->ctx->io_mode = ATOM_IO_IIO | port; in atom_op_setport()
920 ctx->ctx->io_mode = ATOM_IO_PCI; in atom_op_setport()
924 ctx->ctx->io_mode = ATOM_IO_SYSIO; in atom_op_setport()
932 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
934 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1016 dst -= src; in atom_op_sub()
1024 uint32_t src, val, target; in atom_op_switch() local
1034 target = U16(*ptr); in atom_op_switch()
1036 SDEBUG(" target: %04X\n", target); in atom_op_switch()
1037 *ptr = ctx->start + target; in atom_op_switch()
1056 ctx->ctx->cs_equal = ((dst & src) == 0); in atom_op_test()
1057 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE"); in atom_op_test()
1223 int base = CU16(ctx->cmd_table + 4 + 2 * index); in amdgpu_atom_execute_table_locked()
1230 return -EINVAL; in amdgpu_atom_execute_table_locked()
1259 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); in amdgpu_atom_execute_table_locked()
1261 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1); in amdgpu_atom_execute_table_locked()
1264 base, len, ws, ps, ptr - 1); in amdgpu_atom_execute_table_locked()
1265 ret = -EINVAL; in amdgpu_atom_execute_table_locked()
1278 debug_depth--; in amdgpu_atom_execute_table_locked()
1291 mutex_lock(&ctx->mutex); in amdgpu_atom_execute_table()
1293 ctx->data_block = 0; in amdgpu_atom_execute_table()
1295 ctx->reg_block = 0; in amdgpu_atom_execute_table()
1297 ctx->fb_base = 0; in amdgpu_atom_execute_table()
1299 ctx->io_mode = ATOM_IO_MM; in amdgpu_atom_execute_table()
1301 ctx->divmul[0] = 0; in amdgpu_atom_execute_table()
1302 ctx->divmul[1] = 0; in amdgpu_atom_execute_table()
1304 mutex_unlock(&ctx->mutex); in amdgpu_atom_execute_table()
1312 ctx->iio = kzalloc(2 * 256, GFP_KERNEL); in atom_index_iio()
1313 if (!ctx->iio) in atom_index_iio()
1316 ctx->iio[CU8(base + 1)] = base + 2; in atom_index_iio()
1333 const char *na = "--N/A--"; in atom_get_vbios_name()
1336 p_rom = ctx->bios; in atom_get_vbios_name()
1346 memcpy(ctx->name, na, 7); in atom_get_vbios_name()
1347 ctx->name[7] = 0; in atom_get_vbios_name()
1364 name_size = strnlen(c_ptr, STRLEN_LONG - 1); in atom_get_vbios_name()
1365 memcpy(ctx->name, c_ptr, name_size); in atom_get_vbios_name()
1366 back = ctx->name + name_size; in atom_get_vbios_name()
1367 while ((*--back) == ' ') in atom_get_vbios_name()
1377 p_rom = ctx->bios; in atom_get_vbios_date()
1381 ctx->date[0] = '2'; in atom_get_vbios_date()
1382 ctx->date[1] = '0'; in atom_get_vbios_date()
1383 ctx->date[2] = date_in_rom[6]; in atom_get_vbios_date()
1384 ctx->date[3] = date_in_rom[7]; in atom_get_vbios_date()
1385 ctx->date[4] = '/'; in atom_get_vbios_date()
1386 ctx->date[5] = date_in_rom[0]; in atom_get_vbios_date()
1387 ctx->date[6] = date_in_rom[1]; in atom_get_vbios_date()
1388 ctx->date[7] = '/'; in atom_get_vbios_date()
1389 ctx->date[8] = date_in_rom[3]; in atom_get_vbios_date()
1390 ctx->date[9] = date_in_rom[4]; in atom_get_vbios_date()
1391 ctx->date[10] = ' '; in atom_get_vbios_date()
1392 ctx->date[11] = date_in_rom[9]; in atom_get_vbios_date()
1393 ctx->date[12] = date_in_rom[10]; in atom_get_vbios_date()
1394 ctx->date[13] = date_in_rom[11]; in atom_get_vbios_date()
1395 ctx->date[14] = date_in_rom[12]; in atom_get_vbios_date()
1396 ctx->date[15] = date_in_rom[13]; in atom_get_vbios_date()
1397 ctx->date[16] = '\0'; in atom_get_vbios_date()
1409 p_rom = ctx->bios; in atom_find_str_in_rom()
1431 p_rom = ctx->bios; in atom_get_vbios_pn()
1445 vbios_str += sizeof(BIOS_ATOM_PREFIX) - 1; in atom_get_vbios_pn()
1454 ctx->vbios_pn[count] = vbios_str[count]; in atom_get_vbios_pn()
1458 ctx->vbios_pn[count] = 0; in atom_get_vbios_pn()
1461 pr_info("ATOM BIOS: %s\n", ctx->vbios_pn); in atom_get_vbios_pn()
1470 p_rom = ctx->bios; in atom_get_vbios_version()
1484 /* find anchor ATOMBIOSBK-AMD */ in atom_get_vbios_version()
1488 /* skip ATOMBIOSBK-AMD VER */ in atom_get_vbios_version()
1490 memcpy(ctx->vbios_ver_str, vbios_ver, STRLEN_NORMAL); in atom_get_vbios_version()
1492 ctx->vbios_ver_str[0] = '\0'; in atom_get_vbios_version()
1508 ctx->card = card; in amdgpu_atom_parse()
1509 ctx->bios = bios; in amdgpu_atom_parse()
1519 pr_info("Invalid ATI magic\n"); in amdgpu_atom_parse()
1533 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR); in amdgpu_atom_parse()
1534 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR); in amdgpu_atom_parse()
1535 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4); in amdgpu_atom_parse()
1536 if (!ctx->iio) { in amdgpu_atom_parse()
1542 if (atom_rom_header->usMasterDataTableOffset != 0) { in amdgpu_atom_parse()
1544 CSTR(atom_rom_header->usMasterDataTableOffset); in amdgpu_atom_parse()
1545 if (master_table->ListOfDataTables.FirmwareInfo != 0) { in amdgpu_atom_parse()
1547 CSTR(master_table->ListOfDataTables.FirmwareInfo); in amdgpu_atom_parse()
1548 ctx->version = atom_fw_info->ulFirmwareRevision; in amdgpu_atom_parse()
1562 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR); in amdgpu_atom_asic_init()
1573 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) in amdgpu_atom_asic_init()
1586 kfree(ctx->iio); in amdgpu_atom_destroy()
1595 int idx = CU16(ctx->data_table + offset); in amdgpu_atom_parse_data_header()
1596 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4); in amdgpu_atom_parse_data_header()
1615 int idx = CU16(ctx->cmd_table + offset); in amdgpu_atom_parse_cmd_header()
1616 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4); in amdgpu_atom_parse_cmd_header()