Lines Matching +full:pcs +full:- +full:handle
122 [0x00] = "XGMI PCS DataLossErr",
123 [0x01] = "XGMI PCS TrainingErr",
124 [0x02] = "XGMI PCS FlowCtrlAckErr",
125 [0x03] = "XGMI PCS RxFifoUnderflowErr",
126 [0x04] = "XGMI PCS RxFifoOverflowErr",
127 [0x05] = "XGMI PCS CRCErr",
128 [0x06] = "XGMI PCS BERExceededErr",
129 [0x07] = "XGMI PCS TxMetaDataErr",
130 [0x08] = "XGMI PCS ReplayBufParityErr",
131 [0x09] = "XGMI PCS DataParityErr",
132 [0x0a] = "XGMI PCS ReplayFifoOverflowErr",
133 [0x0b] = "XGMI PCS ReplayFifoUnderflowErr",
134 [0x0c] = "XGMI PCS ElasticFifoOverflowErr",
135 [0x0d] = "XGMI PCS DeskewErr",
136 [0x0e] = "XGMI PCS FlowCtrlCRCErr",
137 [0x0f] = "XGMI PCS DataStartupLimitErr",
138 [0x10] = "XGMI PCS FCInitTimeoutErr",
139 [0x11] = "XGMI PCS RecoveryTimeoutErr",
140 [0x12] = "XGMI PCS ReadySerialTimeoutErr",
141 [0x13] = "XGMI PCS ReadySerialAttemptErr",
142 [0x14] = "XGMI PCS RecoveryAttemptErr",
143 [0x15] = "XGMI PCS RecoveryRelockAttemptErr",
144 [0x16] = "XGMI PCS ReplayAttemptErr",
145 [0x17] = "XGMI PCS SyncHdrErr",
146 [0x18] = "XGMI PCS TxReplayTimeoutErr",
147 [0x19] = "XGMI PCS RxReplayTimeoutErr",
148 [0x1a] = "XGMI PCS LinkSubTxTimeoutErr",
149 [0x1b] = "XGMI PCS LinkSubRxTimeoutErr",
150 [0x1c] = "XGMI PCS RxCMDPktErr",
154 {"XGMI PCS DataLossErr",
156 {"XGMI PCS TrainingErr",
158 {"XGMI PCS CRCErr",
160 {"XGMI PCS BERExceededErr",
162 {"XGMI PCS TxMetaDataErr",
164 {"XGMI PCS ReplayBufParityErr",
166 {"XGMI PCS DataParityErr",
168 {"XGMI PCS ReplayFifoOverflowErr",
170 {"XGMI PCS ReplayFifoUnderflowErr",
172 {"XGMI PCS ElasticFifoOverflowErr",
174 {"XGMI PCS DeskewErr",
176 {"XGMI PCS DataStartupLimitErr",
178 {"XGMI PCS FCInitTimeoutErr",
180 {"XGMI PCS RecoveryTimeoutErr",
182 {"XGMI PCS ReadySerialTimeoutErr",
184 {"XGMI PCS ReadySerialAttemptErr",
186 {"XGMI PCS RecoveryAttemptErr",
188 {"XGMI PCS RecoveryRelockAttemptErr",
193 {"WAFL PCS DataLossErr",
195 {"WAFL PCS TrainingErr",
197 {"WAFL PCS CRCErr",
199 {"WAFL PCS BERExceededErr",
201 {"WAFL PCS TxMetaDataErr",
203 {"WAFL PCS ReplayBufParityErr",
205 {"WAFL PCS DataParityErr",
207 {"WAFL PCS ReplayFifoOverflowErr",
209 {"WAFL PCS ReplayFifoUnderflowErr",
211 {"WAFL PCS ElasticFifoOverflowErr",
213 {"WAFL PCS DeskewErr",
215 {"WAFL PCS DataStartupLimitErr",
217 {"WAFL PCS FCInitTimeoutErr",
219 {"WAFL PCS RecoveryTimeoutErr",
221 {"WAFL PCS ReadySerialTimeoutErr",
223 {"WAFL PCS ReadySerialAttemptErr",
225 {"WAFL PCS RecoveryAttemptErr",
227 {"WAFL PCS RecoveryRelockAttemptErr",
232 {"XGMI3X16 PCS DataLossErr",
234 {"XGMI3X16 PCS TrainingErr",
236 {"XGMI3X16 PCS FlowCtrlAckErr",
238 {"XGMI3X16 PCS RxFifoUnderflowErr",
240 {"XGMI3X16 PCS RxFifoOverflowErr",
242 {"XGMI3X16 PCS CRCErr",
244 {"XGMI3X16 PCS BERExceededErr",
246 {"XGMI3X16 PCS TxVcidDataErr",
248 {"XGMI3X16 PCS ReplayBufParityErr",
250 {"XGMI3X16 PCS DataParityErr",
252 {"XGMI3X16 PCS ReplayFifoOverflowErr",
254 {"XGMI3X16 PCS ReplayFifoUnderflowErr",
256 {"XGMI3X16 PCS ElasticFifoOverflowErr",
258 {"XGMI3X16 PCS DeskewErr",
260 {"XGMI3X16 PCS FlowCtrlCRCErr",
262 {"XGMI3X16 PCS DataStartupLimitErr",
264 {"XGMI3X16 PCS FCInitTimeoutErr",
266 {"XGMI3X16 PCS RecoveryTimeoutErr",
268 {"XGMI3X16 PCS ReadySerialTimeoutErr",
270 {"XGMI3X16 PCS ReadySerialAttemptErr",
272 {"XGMI3X16 PCS RecoveryAttemptErr",
274 {"XGMI3X16 PCS RecoveryRelockAttemptErr",
276 {"XGMI3X16 PCS ReplayAttemptErr",
278 {"XGMI3X16 PCS SyncHdrErr",
280 {"XGMI3X16 PCS TxReplayTimeoutErr",
282 {"XGMI3X16 PCS RxReplayTimeoutErr",
284 {"XGMI3X16 PCS LinkSubTxTimeoutErr",
286 {"XGMI3X16 PCS LinkSubRxTimeoutErr",
288 {"XGMI3X16 PCS RxCMDPktErr",
297 * hive ID and individual node IDs, both of which are 64-bit numbers.
302 * Inside the device directory a sub-directory 'xgmi_hive_info' is
312 * set of node sub-directories.
337 return snprintf(buf, PAGE_SIZE, "%llu\n", hive->hive_id); in amdgpu_xgmi_show_attrs()
347 amdgpu_reset_put_reset_domain(hive->reset_domain); in amdgpu_xgmi_hive_release()
348 hive->reset_domain = NULL; in amdgpu_xgmi_hive_release()
350 mutex_destroy(&hive->hive_lock); in amdgpu_xgmi_hive_release()
371 return sysfs_emit(buf, "%llu\n", adev->gmc.xgmi.node_id); in amdgpu_xgmi_show_device_id()
382 return sysfs_emit(buf, "%u\n", adev->gmc.xgmi.physical_node_id); in amdgpu_xgmi_show_physical_id()
392 struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info; in amdgpu_xgmi_show_num_hops()
395 for (i = 0; i < top->num_nodes; i++) in amdgpu_xgmi_show_num_hops()
396 sprintf(buf + 3 * i, "%02x ", top->nodes[i].num_hops); in amdgpu_xgmi_show_num_hops()
407 struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info; in amdgpu_xgmi_show_num_links()
410 for (i = 0; i < top->num_nodes; i++) in amdgpu_xgmi_show_num_links()
411 sprintf(buf + 3 * i, "%02x ", top->nodes[i].num_links); in amdgpu_xgmi_show_num_links()
422 struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info; in amdgpu_xgmi_show_connected_port_num()
430 for (i = 0; i < top->num_nodes; i++) { in amdgpu_xgmi_show_connected_port_num()
431 if (top->nodes[i].node_id == adev->gmc.xgmi.node_id) { in amdgpu_xgmi_show_connected_port_num()
437 if (i == top->num_nodes) in amdgpu_xgmi_show_connected_port_num()
438 return -EINVAL; in amdgpu_xgmi_show_connected_port_num()
440 for (i = 0; i < top->num_nodes; i++) { in amdgpu_xgmi_show_connected_port_num()
441 for (j = 0; j < top->nodes[i].num_links; j++) in amdgpu_xgmi_show_connected_port_num()
443 size += sysfs_emit_at(buf, size, "%02x:%02x -> %02x:%02x\n", current_node + 1, in amdgpu_xgmi_show_connected_port_num()
444 top->nodes[i].port_num[j].src_xgmi_port_num, i + 1, in amdgpu_xgmi_show_connected_port_num()
445 top->nodes[i].port_num[j].dst_xgmi_port_num); in amdgpu_xgmi_show_connected_port_num()
465 if ((!adev->df.funcs) || in amdgpu_xgmi_show_error()
466 (!adev->df.funcs->get_fica) || in amdgpu_xgmi_show_error()
467 (!adev->df.funcs->set_fica)) in amdgpu_xgmi_show_error()
468 return -EINVAL; in amdgpu_xgmi_show_error()
470 fica_out = adev->df.funcs->get_fica(adev, ficaa_pie_ctl_in); in amdgpu_xgmi_show_error()
474 fica_out = adev->df.funcs->get_fica(adev, ficaa_pie_status_in); in amdgpu_xgmi_show_error()
479 adev->df.funcs->set_fica(adev, ficaa_pie_status_in, 0, 0); in amdgpu_xgmi_show_error()
499 ret = device_create_file(adev->dev, &dev_attr_xgmi_device_id); in amdgpu_xgmi_sysfs_add_dev_info()
501 dev_err(adev->dev, "XGMI: Failed to create device file xgmi_device_id\n"); in amdgpu_xgmi_sysfs_add_dev_info()
505 ret = device_create_file(adev->dev, &dev_attr_xgmi_physical_id); in amdgpu_xgmi_sysfs_add_dev_info()
507 dev_err(adev->dev, "XGMI: Failed to create device file xgmi_physical_id\n"); in amdgpu_xgmi_sysfs_add_dev_info()
512 ret = device_create_file(adev->dev, &dev_attr_xgmi_error); in amdgpu_xgmi_sysfs_add_dev_info()
517 ret = device_create_file(adev->dev, &dev_attr_xgmi_num_hops); in amdgpu_xgmi_sysfs_add_dev_info()
522 ret = device_create_file(adev->dev, &dev_attr_xgmi_num_links); in amdgpu_xgmi_sysfs_add_dev_info()
527 if (adev->psp.xgmi_context.xgmi_ta_caps & EXTEND_PEER_LINK_INFO_CMD_FLAG) { in amdgpu_xgmi_sysfs_add_dev_info()
528 ret = device_create_file(adev->dev, &dev_attr_xgmi_port_num); in amdgpu_xgmi_sysfs_add_dev_info()
530 dev_err(adev->dev, "failed to create xgmi_port_num\n"); in amdgpu_xgmi_sysfs_add_dev_info()
534 if (hive->kobj.parent != (&adev->dev->kobj)) { in amdgpu_xgmi_sysfs_add_dev_info()
535 ret = sysfs_create_link(&adev->dev->kobj, &hive->kobj, in amdgpu_xgmi_sysfs_add_dev_info()
538 dev_err(adev->dev, "XGMI: Failed to create link to hive info"); in amdgpu_xgmi_sysfs_add_dev_info()
543 sprintf(node, "node%d", atomic_read(&hive->number_devices)); in amdgpu_xgmi_sysfs_add_dev_info()
545 ret = sysfs_create_link(&hive->kobj, &adev->dev->kobj, node); in amdgpu_xgmi_sysfs_add_dev_info()
547 dev_err(adev->dev, "XGMI: Failed to create link from hive info"); in amdgpu_xgmi_sysfs_add_dev_info()
555 sysfs_remove_link(&adev->dev->kobj, adev_to_drm(adev)->unique); in amdgpu_xgmi_sysfs_add_dev_info()
558 device_remove_file(adev->dev, &dev_attr_xgmi_device_id); in amdgpu_xgmi_sysfs_add_dev_info()
559 device_remove_file(adev->dev, &dev_attr_xgmi_physical_id); in amdgpu_xgmi_sysfs_add_dev_info()
560 device_remove_file(adev->dev, &dev_attr_xgmi_error); in amdgpu_xgmi_sysfs_add_dev_info()
561 device_remove_file(adev->dev, &dev_attr_xgmi_num_hops); in amdgpu_xgmi_sysfs_add_dev_info()
562 device_remove_file(adev->dev, &dev_attr_xgmi_num_links); in amdgpu_xgmi_sysfs_add_dev_info()
563 if (adev->psp.xgmi_context.xgmi_ta_caps & EXTEND_PEER_LINK_INFO_CMD_FLAG) in amdgpu_xgmi_sysfs_add_dev_info()
564 device_remove_file(adev->dev, &dev_attr_xgmi_port_num); in amdgpu_xgmi_sysfs_add_dev_info()
576 device_remove_file(adev->dev, &dev_attr_xgmi_device_id); in amdgpu_xgmi_sysfs_rem_dev_info()
577 device_remove_file(adev->dev, &dev_attr_xgmi_physical_id); in amdgpu_xgmi_sysfs_rem_dev_info()
578 device_remove_file(adev->dev, &dev_attr_xgmi_error); in amdgpu_xgmi_sysfs_rem_dev_info()
579 device_remove_file(adev->dev, &dev_attr_xgmi_num_hops); in amdgpu_xgmi_sysfs_rem_dev_info()
580 device_remove_file(adev->dev, &dev_attr_xgmi_num_links); in amdgpu_xgmi_sysfs_rem_dev_info()
581 if (adev->psp.xgmi_context.xgmi_ta_caps & EXTEND_PEER_LINK_INFO_CMD_FLAG) in amdgpu_xgmi_sysfs_rem_dev_info()
582 device_remove_file(adev->dev, &dev_attr_xgmi_port_num); in amdgpu_xgmi_sysfs_rem_dev_info()
584 if (hive->kobj.parent != (&adev->dev->kobj)) in amdgpu_xgmi_sysfs_rem_dev_info()
585 sysfs_remove_link(&adev->dev->kobj,"xgmi_hive_info"); in amdgpu_xgmi_sysfs_rem_dev_info()
587 sprintf(node, "node%d", atomic_read(&hive->number_devices)); in amdgpu_xgmi_sysfs_rem_dev_info()
588 sysfs_remove_link(&hive->kobj, node); in amdgpu_xgmi_sysfs_rem_dev_info()
599 if (!adev->gmc.xgmi.hive_id) in amdgpu_get_xgmi_hive()
602 if (adev->hive) { in amdgpu_get_xgmi_hive()
603 kobject_get(&adev->hive->kobj); in amdgpu_get_xgmi_hive()
604 return adev->hive; in amdgpu_get_xgmi_hive()
610 if (hive->hive_id == adev->gmc.xgmi.hive_id) in amdgpu_get_xgmi_hive()
616 dev_err(adev->dev, "XGMI: allocation failed\n"); in amdgpu_get_xgmi_hive()
617 ret = -ENOMEM; in amdgpu_get_xgmi_hive()
623 ret = kobject_init_and_add(&hive->kobj, in amdgpu_get_xgmi_hive()
625 &adev->dev->kobj, in amdgpu_get_xgmi_hive()
628 dev_err(adev->dev, "XGMI: failed initializing kobject for xgmi hive\n"); in amdgpu_get_xgmi_hive()
629 kobject_put(&hive->kobj); in amdgpu_get_xgmi_hive()
635 * Only init hive->reset_domain for none SRIOV configuration. For SRIOV, in amdgpu_get_xgmi_hive()
644 * See https://www.spinics.net/lists/amd-gfx/msg58836.html in amdgpu_get_xgmi_hive()
646 if (adev->reset_domain->type != XGMI_HIVE) { in amdgpu_get_xgmi_hive()
647 hive->reset_domain = in amdgpu_get_xgmi_hive()
648 amdgpu_reset_create_reset_domain(XGMI_HIVE, "amdgpu-reset-hive"); in amdgpu_get_xgmi_hive()
649 if (!hive->reset_domain) { in amdgpu_get_xgmi_hive()
650 dev_err(adev->dev, "XGMI: failed initializing reset domain for xgmi hive\n"); in amdgpu_get_xgmi_hive()
651 ret = -ENOMEM; in amdgpu_get_xgmi_hive()
652 kobject_put(&hive->kobj); in amdgpu_get_xgmi_hive()
657 amdgpu_reset_get_reset_domain(adev->reset_domain); in amdgpu_get_xgmi_hive()
658 hive->reset_domain = adev->reset_domain; in amdgpu_get_xgmi_hive()
662 hive->hive_id = adev->gmc.xgmi.hive_id; in amdgpu_get_xgmi_hive()
663 INIT_LIST_HEAD(&hive->device_list); in amdgpu_get_xgmi_hive()
664 INIT_LIST_HEAD(&hive->node); in amdgpu_get_xgmi_hive()
665 mutex_init(&hive->hive_lock); in amdgpu_get_xgmi_hive()
666 atomic_set(&hive->number_devices, 0); in amdgpu_get_xgmi_hive()
667 task_barrier_init(&hive->tb); in amdgpu_get_xgmi_hive()
668 hive->pstate = AMDGPU_XGMI_PSTATE_UNKNOWN; in amdgpu_get_xgmi_hive()
669 hive->hi_req_gpu = NULL; in amdgpu_get_xgmi_hive()
675 hive->hi_req_count = AMDGPU_MAX_XGMI_DEVICE_PER_HIVE; in amdgpu_get_xgmi_hive()
676 list_add_tail(&hive->node, &xgmi_hive_list); in amdgpu_get_xgmi_hive()
680 kobject_get(&hive->kobj); in amdgpu_get_xgmi_hive()
688 kobject_put(&hive->kobj); in amdgpu_put_xgmi_hive()
703 request_adev = hive->hi_req_gpu ? hive->hi_req_gpu : adev; in amdgpu_xgmi_set_pstate()
704 init_low = hive->pstate == AMDGPU_XGMI_PSTATE_UNKNOWN; in amdgpu_xgmi_set_pstate()
709 if (!hive || adev->asic_type != CHIP_VEGA20) in amdgpu_xgmi_set_pstate()
712 mutex_lock(&hive->hive_lock); in amdgpu_xgmi_set_pstate()
715 hive->hi_req_count++; in amdgpu_xgmi_set_pstate()
717 hive->hi_req_count--; in amdgpu_xgmi_set_pstate()
723 if (hive->pstate == pstate || in amdgpu_xgmi_set_pstate()
724 (!is_hi_req && hive->hi_req_count && !init_low)) in amdgpu_xgmi_set_pstate()
727 dev_dbg(request_adev->dev, "Set xgmi pstate %d.\n", pstate); in amdgpu_xgmi_set_pstate()
731 dev_err(request_adev->dev, in amdgpu_xgmi_set_pstate()
733 request_adev->gmc.xgmi.node_id, in amdgpu_xgmi_set_pstate()
734 request_adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_set_pstate()
739 hive->pstate = hive->hi_req_count ? in amdgpu_xgmi_set_pstate()
740 hive->pstate : AMDGPU_XGMI_PSTATE_MIN; in amdgpu_xgmi_set_pstate()
742 hive->pstate = pstate; in amdgpu_xgmi_set_pstate()
743 hive->hi_req_gpu = pstate != AMDGPU_XGMI_PSTATE_MIN ? in amdgpu_xgmi_set_pstate()
747 mutex_unlock(&hive->hive_lock); in amdgpu_xgmi_set_pstate()
759 ret = psp_xgmi_set_topology_info(&adev->psp, in amdgpu_xgmi_update_topology()
760 atomic_read(&hive->number_devices), in amdgpu_xgmi_update_topology()
761 &adev->psp.xgmi_context.top_info); in amdgpu_xgmi_update_topology()
763 dev_err(adev->dev, in amdgpu_xgmi_update_topology()
765 adev->gmc.xgmi.node_id, in amdgpu_xgmi_update_topology()
766 adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_update_topology()
781 struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info; in amdgpu_xgmi_get_hops_count()
785 for (i = 0 ; i < top->num_nodes; ++i) in amdgpu_xgmi_get_hops_count()
786 if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id) in amdgpu_xgmi_get_hops_count()
787 return top->nodes[i].num_hops & num_hops_mask; in amdgpu_xgmi_get_hops_count()
788 return -EINVAL; in amdgpu_xgmi_get_hops_count()
794 struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info; in amdgpu_xgmi_get_num_links()
797 for (i = 0 ; i < top->num_nodes; ++i) in amdgpu_xgmi_get_num_links()
798 if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id) in amdgpu_xgmi_get_num_links()
799 return top->nodes[i].num_links; in amdgpu_xgmi_get_num_links()
800 return -EINVAL; in amdgpu_xgmi_get_num_links()
807 * Hive locks and conditions apply - see amdgpu_xgmi_add_device
815 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_initialize_hive_get_data_partition()
816 ret = psp_xgmi_initialize(&tmp_adev->psp, set_extended_data, false); in amdgpu_xgmi_initialize_hive_get_data_partition()
818 dev_err(tmp_adev->dev, in amdgpu_xgmi_initialize_hive_get_data_partition()
832 struct psp_xgmi_topology_info *top_info = &adev->psp.xgmi_context.top_info; in amdgpu_xgmi_fill_topology_info()
833 struct psp_xgmi_topology_info *peer_info = &peer_adev->psp.xgmi_context.top_info; in amdgpu_xgmi_fill_topology_info()
835 for (int i = 0; i < peer_info->num_nodes; i++) { in amdgpu_xgmi_fill_topology_info()
836 if (peer_info->nodes[i].node_id == adev->gmc.xgmi.node_id) { in amdgpu_xgmi_fill_topology_info()
837 for (int j = 0; j < top_info->num_nodes; j++) { in amdgpu_xgmi_fill_topology_info()
838 if (top_info->nodes[j].node_id == peer_adev->gmc.xgmi.node_id) { in amdgpu_xgmi_fill_topology_info()
839 peer_info->nodes[i].num_hops = top_info->nodes[j].num_hops; in amdgpu_xgmi_fill_topology_info()
840 peer_info->nodes[i].is_sharing_enabled = in amdgpu_xgmi_fill_topology_info()
841 top_info->nodes[j].is_sharing_enabled; in amdgpu_xgmi_fill_topology_info()
842 peer_info->nodes[i].num_links = in amdgpu_xgmi_fill_topology_info()
843 top_info->nodes[j].num_links; in amdgpu_xgmi_fill_topology_info()
860 if (!adev->gmc.xgmi.supported) in amdgpu_xgmi_add_device()
863 if (!adev->gmc.xgmi.pending_reset && in amdgpu_xgmi_add_device()
865 ret = psp_xgmi_initialize(&adev->psp, false, true); in amdgpu_xgmi_add_device()
867 dev_err(adev->dev, in amdgpu_xgmi_add_device()
872 ret = psp_xgmi_get_hive_id(&adev->psp, &adev->gmc.xgmi.hive_id); in amdgpu_xgmi_add_device()
874 dev_err(adev->dev, in amdgpu_xgmi_add_device()
879 ret = psp_xgmi_get_node_id(&adev->psp, &adev->gmc.xgmi.node_id); in amdgpu_xgmi_add_device()
881 dev_err(adev->dev, in amdgpu_xgmi_add_device()
886 adev->gmc.xgmi.hive_id = 16; in amdgpu_xgmi_add_device()
887 adev->gmc.xgmi.node_id = adev->gmc.xgmi.physical_node_id + 16; in amdgpu_xgmi_add_device()
892 ret = -EINVAL; in amdgpu_xgmi_add_device()
893 dev_err(adev->dev, in amdgpu_xgmi_add_device()
895 adev->gmc.xgmi.node_id, adev->gmc.xgmi.hive_id); in amdgpu_xgmi_add_device()
898 mutex_lock(&hive->hive_lock); in amdgpu_xgmi_add_device()
900 top_info = &adev->psp.xgmi_context.top_info; in amdgpu_xgmi_add_device()
902 list_add_tail(&adev->gmc.xgmi.head, &hive->device_list); in amdgpu_xgmi_add_device()
903 list_for_each_entry(entry, &hive->device_list, head) in amdgpu_xgmi_add_device()
904 top_info->nodes[count++].node_id = entry->node_id; in amdgpu_xgmi_add_device()
905 top_info->num_nodes = count; in amdgpu_xgmi_add_device()
906 atomic_set(&hive->number_devices, count); in amdgpu_xgmi_add_device()
908 task_barrier_add_task(&hive->tb); in amdgpu_xgmi_add_device()
910 if (!adev->gmc.xgmi.pending_reset && in amdgpu_xgmi_add_device()
912 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_add_device()
915 top_info = &tmp_adev->psp.xgmi_context.top_info; in amdgpu_xgmi_add_device()
916 top_info->nodes[count - 1].node_id = in amdgpu_xgmi_add_device()
917 adev->gmc.xgmi.node_id; in amdgpu_xgmi_add_device()
918 top_info->num_nodes = count; in amdgpu_xgmi_add_device()
926 adev->psp.xgmi_context.xgmi_ta_caps & EXTEND_PEER_LINK_INFO_CMD_FLAG) { in amdgpu_xgmi_add_device()
928 ret = psp_xgmi_get_topology_info(&adev->psp, count, in amdgpu_xgmi_add_device()
929 &adev->psp.xgmi_context.top_info, false); in amdgpu_xgmi_add_device()
931 dev_err(adev->dev, in amdgpu_xgmi_add_device()
933 adev->gmc.xgmi.node_id, in amdgpu_xgmi_add_device()
934 adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_add_device()
940 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_add_device()
945 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_add_device()
946 ret = psp_xgmi_get_topology_info(&tmp_adev->psp, count, in amdgpu_xgmi_add_device()
947 &tmp_adev->psp.xgmi_context.top_info, false); in amdgpu_xgmi_add_device()
949 dev_err(tmp_adev->dev, in amdgpu_xgmi_add_device()
951 tmp_adev->gmc.xgmi.node_id, in amdgpu_xgmi_add_device()
952 tmp_adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_add_device()
960 if (adev->psp.xgmi_context.supports_extended_data) { in amdgpu_xgmi_add_device()
968 list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) { in amdgpu_xgmi_add_device()
969 ret = psp_xgmi_get_topology_info(&tmp_adev->psp, count, in amdgpu_xgmi_add_device()
970 &tmp_adev->psp.xgmi_context.top_info, true); in amdgpu_xgmi_add_device()
972 dev_err(tmp_adev->dev, in amdgpu_xgmi_add_device()
974 tmp_adev->gmc.xgmi.node_id, in amdgpu_xgmi_add_device()
975 tmp_adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_add_device()
980 /* initialize the hive to get non-extended data for the next round. */ in amdgpu_xgmi_add_device()
988 if (!ret && !adev->gmc.xgmi.pending_reset) in amdgpu_xgmi_add_device()
992 mutex_unlock(&hive->hive_lock); in amdgpu_xgmi_add_device()
995 adev->hive = hive; in amdgpu_xgmi_add_device()
996 dev_info(adev->dev, "XGMI: Add node %d, hive 0x%llx.\n", in amdgpu_xgmi_add_device()
997 adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id); in amdgpu_xgmi_add_device()
1000 dev_err(adev->dev, "XGMI: Failed to add node %d, hive 0x%llx ret: %d\n", in amdgpu_xgmi_add_device()
1001 adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id, in amdgpu_xgmi_add_device()
1010 struct amdgpu_hive_info *hive = adev->hive; in amdgpu_xgmi_remove_device()
1012 if (!adev->gmc.xgmi.supported) in amdgpu_xgmi_remove_device()
1013 return -EINVAL; in amdgpu_xgmi_remove_device()
1016 return -EINVAL; in amdgpu_xgmi_remove_device()
1018 mutex_lock(&hive->hive_lock); in amdgpu_xgmi_remove_device()
1019 task_barrier_rem_task(&hive->tb); in amdgpu_xgmi_remove_device()
1021 if (hive->hi_req_gpu == adev) in amdgpu_xgmi_remove_device()
1022 hive->hi_req_gpu = NULL; in amdgpu_xgmi_remove_device()
1023 list_del(&adev->gmc.xgmi.head); in amdgpu_xgmi_remove_device()
1024 mutex_unlock(&hive->hive_lock); in amdgpu_xgmi_remove_device()
1027 adev->hive = NULL; in amdgpu_xgmi_remove_device()
1029 if (atomic_dec_return(&hive->number_devices) == 0) { in amdgpu_xgmi_remove_device()
1032 list_del(&hive->node); in amdgpu_xgmi_remove_device()
1041 static int xgmi_v6_4_0_aca_bank_parser(struct aca_handle *handle, struct aca_bank *bank, in xgmi_v6_4_0_aca_bank_parser() argument
1044 struct amdgpu_device *adev = handle->adev; in xgmi_v6_4_0_aca_bank_parser()
1054 status = bank->regs[ACA_REG_IDX_STATUS]; in xgmi_v6_4_0_aca_bank_parser()
1060 dev_info(adev->dev, "%s detected\n", error_str); in xgmi_v6_4_0_aca_bank_parser()
1062 count = ACA_REG__MISC0__ERRCNT(bank->regs[ACA_REG_IDX_MISC0]); in xgmi_v6_4_0_aca_bank_parser()
1069 ret = aca_error_cache_log_bank_error(handle, &info, ACA_ERROR_TYPE_UE, count); in xgmi_v6_4_0_aca_bank_parser()
1073 ret = aca_error_cache_log_bank_error(handle, &info, ACA_ERROR_TYPE_CE, count); in xgmi_v6_4_0_aca_bank_parser()
1076 return -EINVAL; in xgmi_v6_4_0_aca_bank_parser()
1096 if (!adev->gmc.xgmi.supported || in amdgpu_xgmi_ras_late_init()
1097 adev->gmc.xgmi.num_physical_nodes == 0) in amdgpu_xgmi_ras_late_init()
1128 struct amdgpu_xgmi *xgmi = &adev->gmc.xgmi; in amdgpu_xgmi_get_relative_phy_addr()
1129 return (addr + xgmi->physical_node_id * xgmi->node_segment_size); in amdgpu_xgmi_get_relative_phy_addr()
1142 switch (adev->asic_type) { in amdgpu_xgmi_legacy_reset_ras_error_count()
1193 for_each_inst(i, adev->aid_mask) in xgmi_v6_4_0_reset_ras_error_count()
1241 /* query xgmi/walf pcs error status, in amdgpu_xgmi_query_pcs_error_status()
1248 dev_info(adev->dev, "%s detected\n", in amdgpu_xgmi_query_pcs_error_status()
1271 err_data->ue_count = 0; in amdgpu_xgmi_legacy_query_ras_error_count()
1272 err_data->ce_count = 0; in amdgpu_xgmi_legacy_query_ras_error_count()
1274 switch (adev->asic_type) { in amdgpu_xgmi_legacy_query_ras_error_count()
1276 /* check xgmi pcs error */ in amdgpu_xgmi_legacy_query_ras_error_count()
1283 /* check wafl pcs error */ in amdgpu_xgmi_legacy_query_ras_error_count()
1292 /* check xgmi pcs error */ in amdgpu_xgmi_legacy_query_ras_error_count()
1299 /* check wafl pcs error */ in amdgpu_xgmi_legacy_query_ras_error_count()
1308 /* check xgmi3x16 pcs error */ in amdgpu_xgmi_legacy_query_ras_error_count()
1317 /* check wafl pcs error */ in amdgpu_xgmi_legacy_query_ras_error_count()
1334 /* check xgmi3x16 pcs error */ in amdgpu_xgmi_legacy_query_ras_error_count()
1346 dev_warn(adev->dev, "XGMI RAS error query not supported"); in amdgpu_xgmi_legacy_query_ras_error_count()
1352 err_data->ue_count += ue_cnt; in amdgpu_xgmi_legacy_query_ras_error_count()
1353 err_data->ce_count += ce_cnt; in amdgpu_xgmi_legacy_query_ras_error_count()
1366 dev_info(adev->dev, "%s detected\n", error_str); in xgmi_v6_4_0_pcs_mca_get_error_type()
1374 return -EINVAL; in xgmi_v6_4_0_pcs_mca_get_error_type()
1377 return -EINVAL; in xgmi_v6_4_0_pcs_mca_get_error_type()
1383 int xgmi_inst = mcm_info->die_id; in __xgmi_v6_4_0_query_error_count()
1407 .socket_id = adev->smuio.funcs->get_socket_id(adev), in xgmi_v6_4_0_query_error_count()
1421 for_each_inst(i, adev->aid_mask) in xgmi_v6_4_0_query_ras_error_count()
1447 dev_warn(adev->dev, "Failed to disallow df cstate"); in amdgpu_ras_error_inject_xgmi()
1450 if (ret1 && ret1 != -EOPNOTSUPP) in amdgpu_ras_error_inject_xgmi()
1451 dev_warn(adev->dev, "Failed to disallow XGMI power down"); in amdgpu_ras_error_inject_xgmi()
1453 ret2 = psp_ras_trigger_error(&adev->psp, block_info, instance_mask); in amdgpu_ras_error_inject_xgmi()
1459 if (ret1 && ret1 != -EOPNOTSUPP) in amdgpu_ras_error_inject_xgmi()
1460 dev_warn(adev->dev, "Failed to allow XGMI power down"); in amdgpu_ras_error_inject_xgmi()
1463 dev_warn(adev->dev, "Failed to allow df cstate"); in amdgpu_ras_error_inject_xgmi()
1486 if (!adev->gmc.xgmi.ras) in amdgpu_xgmi_ras_sw_init()
1489 ras = adev->gmc.xgmi.ras; in amdgpu_xgmi_ras_sw_init()
1490 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_xgmi_ras_sw_init()
1492 dev_err(adev->dev, "Failed to register xgmi_wafl_pcs ras block!\n"); in amdgpu_xgmi_ras_sw_init()
1496 strcpy(ras->ras_block.ras_comm.name, "xgmi_wafl"); in amdgpu_xgmi_ras_sw_init()
1497 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL; in amdgpu_xgmi_ras_sw_init()
1498 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_xgmi_ras_sw_init()
1499 adev->gmc.xgmi.ras_if = &ras->ras_block.ras_comm; in amdgpu_xgmi_ras_sw_init()