Lines Matching +full:tmr +full:- +full:inject +full:- +full:1
58 struct amdgpu_device *adev = psp->adev; in psp_ring_init()
60 ring = &psp->km_ring; in psp_ring_init()
62 ring->ring_type = ring_type; in psp_ring_init()
65 ring->ring_size = 0x1000; in psp_ring_init()
66 ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE, in psp_ring_init()
69 &adev->firmware.rbuf, in psp_ring_init()
70 &ring->ring_mem_mc_addr, in psp_ring_init()
71 (void **)&ring->ring_mem); in psp_ring_init()
73 ring->ring_size = 0; in psp_ring_init()
83 * - Load KDB
84 * - Load SYS_DRV
85 * - Load tOS
86 * - Load PMFW
87 * - Setup TMR
88 * - Load other non-psp fw
89 * - Load ASD
90 * - Load XGMI/RAS/HDCP/DTM TA if any
93 * - Arcturus and onwards
97 struct amdgpu_device *adev = psp->adev; in psp_check_pmfw_centralized_cstate_management()
100 psp->pmfw_centralized_cstate_management = false; in psp_check_pmfw_centralized_cstate_management()
116 psp->pmfw_centralized_cstate_management = true; in psp_check_pmfw_centralized_cstate_management()
119 psp->pmfw_centralized_cstate_management = false; in psp_check_pmfw_centralized_cstate_management()
126 struct amdgpu_device *adev = psp->adev; in psp_init_sriov_microcode()
136 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; in psp_init_sriov_microcode()
140 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; in psp_init_sriov_microcode()
145 adev->virt.autoload_ucode_id = 0; in psp_init_sriov_microcode()
153 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MES1_DATA; in psp_init_sriov_microcode()
157 return -EINVAL; in psp_init_sriov_microcode()
165 struct psp_context *psp = &adev->psp; in psp_early_init()
167 psp->autoload_supported = true; in psp_early_init()
168 psp->boot_time_tmr = true; in psp_early_init()
173 psp->autoload_supported = false; in psp_early_init()
174 psp->boot_time_tmr = false; in psp_early_init()
177 case IP_VERSION(10, 0, 1): in psp_early_init()
179 psp->autoload_supported = false; in psp_early_init()
180 psp->boot_time_tmr = false; in psp_early_init()
185 psp->autoload_supported = false; in psp_early_init()
186 psp->boot_time_tmr = false; in psp_early_init()
190 adev->psp.sup_pd_fw_up = !amdgpu_sriov_vf(adev); in psp_early_init()
199 psp->boot_time_tmr = false; in psp_early_init()
202 case IP_VERSION(12, 0, 1): in psp_early_init()
204 psp->autoload_supported = false; in psp_early_init()
205 psp->boot_time_tmr = false; in psp_early_init()
208 psp->boot_time_tmr = false; in psp_early_init()
213 psp->autoload_supported = false; in psp_early_init()
215 case IP_VERSION(13, 0, 1): in psp_early_init()
221 case IP_VERSION(14, 0, 1): in psp_early_init()
224 psp->boot_time_tmr = false; in psp_early_init()
227 if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2) { in psp_early_init()
230 psp->autoload_supported = false; in psp_early_init()
231 psp->boot_time_tmr = false; in psp_early_init()
237 adev->psp.sup_ifwi_up = !amdgpu_sriov_vf(adev); in psp_early_init()
238 psp->boot_time_tmr = false; in psp_early_init()
242 psp->boot_time_tmr = false; in psp_early_init()
249 return -EINVAL; in psp_early_init()
252 psp->adev = adev; in psp_early_init()
254 adev->psp_timeout = 20000; in psp_early_init()
266 amdgpu_bo_free_kernel(&mem_ctx->shared_bo, &mem_ctx->shared_mc_addr, in psp_ta_free_shared_buf()
267 &mem_ctx->shared_buf); in psp_ta_free_shared_buf()
268 mem_ctx->shared_bo = NULL; in psp_ta_free_shared_buf()
276 /* free TMR memory buffer */ in psp_free_shared_bufs()
277 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_free_shared_bufs()
278 amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr); in psp_free_shared_bufs()
279 psp->tmr_bo = NULL; in psp_free_shared_bufs()
282 psp_ta_free_shared_buf(&psp->xgmi_context.context.mem_context); in psp_free_shared_bufs()
285 psp_ta_free_shared_buf(&psp->ras_context.context.mem_context); in psp_free_shared_bufs()
288 psp_ta_free_shared_buf(&psp->hdcp_context.context.mem_context); in psp_free_shared_bufs()
291 psp_ta_free_shared_buf(&psp->dtm_context.context.mem_context); in psp_free_shared_bufs()
294 psp_ta_free_shared_buf(&psp->rap_context.context.mem_context); in psp_free_shared_bufs()
297 psp_ta_free_shared_buf(&psp->securedisplay_context.context.mem_context); in psp_free_shared_bufs()
304 struct psp_memory_training_context *ctx = &psp->mem_train_ctx; in psp_memory_training_fini()
306 ctx->init = PSP_MEM_TRAIN_NOT_SUPPORT; in psp_memory_training_fini()
307 kfree(ctx->sys_cache); in psp_memory_training_fini()
308 ctx->sys_cache = NULL; in psp_memory_training_fini()
314 struct psp_memory_training_context *ctx = &psp->mem_train_ctx; in psp_memory_training_init()
316 if (ctx->init != PSP_MEM_TRAIN_RESERVE_SUCCESS) { in psp_memory_training_init()
317 dev_dbg(psp->adev->dev, "memory training is not supported!\n"); in psp_memory_training_init()
321 ctx->sys_cache = kzalloc(ctx->train_data_size, GFP_KERNEL); in psp_memory_training_init()
322 if (ctx->sys_cache == NULL) { in psp_memory_training_init()
323 dev_err(psp->adev->dev, "alloc mem_train_ctx.sys_cache failed!\n"); in psp_memory_training_init()
324 ret = -ENOMEM; in psp_memory_training_init()
328 dev_dbg(psp->adev->dev, in psp_memory_training_init()
330 ctx->train_data_size, in psp_memory_training_init()
331 ctx->p2c_train_data_offset, in psp_memory_training_init()
332 ctx->c2p_train_data_offset); in psp_memory_training_init()
333 ctx->init = PSP_MEM_TRAIN_INIT_SUCCESS; in psp_memory_training_init()
365 db_header_pos = adev->gmc.mc_vram_size - PSP_RUNTIME_DB_OFFSET; in psp_get_runtime_db_entry()
374 dev_dbg(adev->dev, "PSP runtime database doesn't exist\n"); in psp_get_runtime_db_entry()
384 dev_warn(adev->dev, "Invalid PSP runtime database entry count\n"); in psp_get_runtime_db_entry()
395 dev_warn(adev->dev, "Invalid PSP runtime database boot cfg entry size\n"); in psp_get_runtime_db_entry()
406 dev_warn(adev->dev, "Invalid PSP runtime database scpm entry size\n"); in psp_get_runtime_db_entry()
427 struct psp_context *psp = &adev->psp; in psp_sw_init()
430 struct psp_memory_training_context *mem_training_ctx = &psp->mem_train_ctx; in psp_sw_init()
433 psp->cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL); in psp_sw_init()
434 if (!psp->cmd) { in psp_sw_init()
435 dev_err(adev->dev, "Failed to allocate memory to command buffer!\n"); in psp_sw_init()
436 ret = -ENOMEM; in psp_sw_init()
439 adev->psp.xgmi_context.supports_extended_data = in psp_sw_init()
440 !adev->gmc.xgmi.connected_to_cpu && in psp_sw_init()
448 adev->scpm_enabled = true; in psp_sw_init()
449 adev->scpm_status = scpm_entry.scpm_status; in psp_sw_init()
451 adev->scpm_enabled = false; in psp_sw_init()
452 adev->scpm_status = SCPM_DISABLE; in psp_sw_init()
461 psp->boot_cfg_bitmask = boot_cfg_entry.boot_cfg_bitmask; in psp_sw_init()
462 if ((psp->boot_cfg_bitmask) & in psp_sw_init()
469 mem_training_ctx->enable_mem_training = true; in psp_sw_init()
476 mem_training_ctx->enable_mem_training = true; in psp_sw_init()
479 if (mem_training_ctx->enable_mem_training) { in psp_sw_init()
482 dev_err(adev->dev, "Failed to initialize memory training!\n"); in psp_sw_init()
488 dev_err(adev->dev, "Failed to process memory training!\n"); in psp_sw_init()
494 (amdgpu_sriov_vf(adev) || adev->debug_use_vram_fw_buf) ? in psp_sw_init()
496 &psp->fw_pri_bo, in psp_sw_init()
497 &psp->fw_pri_mc_addr, in psp_sw_init()
498 &psp->fw_pri_buf); in psp_sw_init()
505 &psp->fence_buf_bo, in psp_sw_init()
506 &psp->fence_buf_mc_addr, in psp_sw_init()
507 &psp->fence_buf); in psp_sw_init()
514 &psp->cmd_buf_bo, &psp->cmd_buf_mc_addr, in psp_sw_init()
515 (void **)&psp->cmd_buf_mem); in psp_sw_init()
522 amdgpu_bo_free_kernel(&psp->fence_buf_bo, in psp_sw_init()
523 &psp->fence_buf_mc_addr, &psp->fence_buf); in psp_sw_init()
525 amdgpu_bo_free_kernel(&psp->fw_pri_bo, in psp_sw_init()
526 &psp->fw_pri_mc_addr, &psp->fw_pri_buf); in psp_sw_init()
533 struct psp_context *psp = &adev->psp; in psp_sw_fini()
534 struct psp_gfx_cmd_resp *cmd = psp->cmd; in psp_sw_fini()
538 amdgpu_ucode_release(&psp->sos_fw); in psp_sw_fini()
539 amdgpu_ucode_release(&psp->asd_fw); in psp_sw_fini()
540 amdgpu_ucode_release(&psp->ta_fw); in psp_sw_fini()
541 amdgpu_ucode_release(&psp->cap_fw); in psp_sw_fini()
542 amdgpu_ucode_release(&psp->toc_fw); in psp_sw_fini()
549 if (psp->km_ring.ring_mem) in psp_sw_fini()
550 amdgpu_bo_free_kernel(&adev->firmware.rbuf, in psp_sw_fini()
551 &psp->km_ring.ring_mem_mc_addr, in psp_sw_fini()
552 (void **)&psp->km_ring.ring_mem); in psp_sw_fini()
554 amdgpu_bo_free_kernel(&psp->fw_pri_bo, in psp_sw_fini()
555 &psp->fw_pri_mc_addr, &psp->fw_pri_buf); in psp_sw_fini()
556 amdgpu_bo_free_kernel(&psp->fence_buf_bo, in psp_sw_fini()
557 &psp->fence_buf_mc_addr, &psp->fence_buf); in psp_sw_fini()
558 amdgpu_bo_free_kernel(&psp->cmd_buf_bo, &psp->cmd_buf_mc_addr, in psp_sw_fini()
559 (void **)&psp->cmd_buf_mem); in psp_sw_fini()
569 struct amdgpu_device *adev = psp->adev; in psp_wait_for()
571 if (psp->adev->no_hw_access) in psp_wait_for()
574 for (i = 0; i < adev->usec_timeout; i++) { in psp_wait_for()
583 udelay(1); in psp_wait_for()
586 return -ETIME; in psp_wait_for()
594 struct amdgpu_device *adev = psp->adev; in psp_wait_for_spirom_update()
596 if (psp->adev->no_hw_access) in psp_wait_for_spirom_update()
603 msleep(1); in psp_wait_for_spirom_update()
606 return -ETIME; in psp_wait_for_spirom_update()
649 struct psp_gfx_cmd_resp *cmd = psp->cmd_buf_mem; in psp_err_warn()
652 if (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 2) && in psp_err_warn()
653 cmd->cmd_id == GFX_CMD_ID_LOAD_IP_FW && in psp_err_warn()
654 cmd->cmd.cmd_load_ip_fw.fw_type == GFX_FW_TYPE_REG_LIST && in psp_err_warn()
655 cmd->resp.status == TEE_ERROR_CANCEL) in psp_err_warn()
668 int timeout = psp->adev->psp_timeout; in psp_cmd_submit_buf()
672 if (psp->adev->no_hw_access) in psp_cmd_submit_buf()
675 memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE); in psp_cmd_submit_buf()
677 memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp)); in psp_cmd_submit_buf()
679 index = atomic_inc_return(&psp->fence_value); in psp_cmd_submit_buf()
680 ret = psp_ring_cmd_submit(psp, psp->cmd_buf_mc_addr, fence_mc_addr, index); in psp_cmd_submit_buf()
682 atomic_dec(&psp->fence_value); in psp_cmd_submit_buf()
686 amdgpu_device_invalidate_hdp(psp->adev, NULL); in psp_cmd_submit_buf()
687 while (*((unsigned int *)psp->fence_buf) != index) { in psp_cmd_submit_buf()
688 if (--timeout == 0) in psp_cmd_submit_buf()
699 amdgpu_device_invalidate_hdp(psp->adev, NULL); in psp_cmd_submit_buf()
703 skip_unsupport = (psp->cmd_buf_mem->resp.status == TEE_ERROR_NOT_SUPPORTED || in psp_cmd_submit_buf()
704 psp->cmd_buf_mem->resp.status == PSP_ERR_UNKNOWN_COMMAND) && amdgpu_sriov_vf(psp->adev); in psp_cmd_submit_buf()
706 memcpy(&cmd->resp, &psp->cmd_buf_mem->resp, sizeof(struct psp_gfx_resp)); in psp_cmd_submit_buf()
713 * return -EINVAL. in psp_cmd_submit_buf()
715 if (!skip_unsupport && (psp->cmd_buf_mem->resp.status || !timeout) && !ras_intr) { in psp_cmd_submit_buf()
717 dev_warn(psp->adev->dev, in psp_cmd_submit_buf()
719 amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id); in psp_cmd_submit_buf()
722 psp->adev->dev, in psp_cmd_submit_buf()
724 psp_gfx_cmd_name(psp->cmd_buf_mem->cmd_id), in psp_cmd_submit_buf()
725 psp->cmd_buf_mem->cmd_id, in psp_cmd_submit_buf()
726 psp->cmd_buf_mem->resp.status); in psp_cmd_submit_buf()
731 if ((ucode && amdgpu_sriov_vf(psp->adev)) || !timeout) { in psp_cmd_submit_buf()
732 ret = -EINVAL; in psp_cmd_submit_buf()
738 ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo; in psp_cmd_submit_buf()
739 ucode->tmr_mc_addr_hi = psp->cmd_buf_mem->resp.fw_addr_hi; in psp_cmd_submit_buf()
748 struct psp_gfx_cmd_resp *cmd = psp->cmd; in acquire_psp_cmd_buf()
750 mutex_lock(&psp->mutex); in acquire_psp_cmd_buf()
759 mutex_unlock(&psp->mutex); in release_psp_cmd_buf()
766 struct amdgpu_device *adev = psp->adev; in psp_prep_tmr_cmd_buf()
775 if (amdgpu_sriov_vf(psp->adev)) in psp_prep_tmr_cmd_buf()
776 cmd->cmd_id = GFX_CMD_ID_SETUP_VMR; in psp_prep_tmr_cmd_buf()
778 cmd->cmd_id = GFX_CMD_ID_SETUP_TMR; in psp_prep_tmr_cmd_buf()
779 cmd->cmd.cmd_setup_tmr.buf_phy_addr_lo = lower_32_bits(tmr_mc); in psp_prep_tmr_cmd_buf()
780 cmd->cmd.cmd_setup_tmr.buf_phy_addr_hi = upper_32_bits(tmr_mc); in psp_prep_tmr_cmd_buf()
781 cmd->cmd.cmd_setup_tmr.buf_size = size; in psp_prep_tmr_cmd_buf()
782 cmd->cmd.cmd_setup_tmr.bitfield.virt_phy_addr = 1; in psp_prep_tmr_cmd_buf()
783 cmd->cmd.cmd_setup_tmr.system_phy_addr_lo = lower_32_bits(tmr_pa); in psp_prep_tmr_cmd_buf()
784 cmd->cmd.cmd_setup_tmr.system_phy_addr_hi = upper_32_bits(tmr_pa); in psp_prep_tmr_cmd_buf()
790 cmd->cmd_id = GFX_CMD_ID_LOAD_TOC; in psp_prep_load_toc_cmd_buf()
791 cmd->cmd.cmd_load_toc.toc_phy_addr_lo = lower_32_bits(pri_buf_mc); in psp_prep_load_toc_cmd_buf()
792 cmd->cmd.cmd_load_toc.toc_phy_addr_hi = upper_32_bits(pri_buf_mc); in psp_prep_load_toc_cmd_buf()
793 cmd->cmd.cmd_load_toc.toc_size = size; in psp_prep_load_toc_cmd_buf()
796 /* Issue LOAD TOC cmd to PSP to part toc and calculate tmr size needed */
804 psp_copy_fw(psp, psp->toc.start_addr, psp->toc.size_bytes); in psp_load_toc()
806 psp_prep_load_toc_cmd_buf(cmd, psp->fw_pri_mc_addr, psp->toc.size_bytes); in psp_load_toc()
809 psp->fence_buf_mc_addr); in psp_load_toc()
811 *tmr_size = psp->cmd_buf_mem->resp.tmr_size; in psp_load_toc()
827 * According to HW engineer, they prefer the TMR address be "naturally in psp_tmr_init()
828 * aligned" , e.g. the start address be an integer divide of TMR size. in psp_tmr_init()
833 tmr_size = PSP_TMR_SIZE(psp->adev); in psp_tmr_init()
836 * and calculate the total size of TMR needed in psp_tmr_init()
838 if (!amdgpu_sriov_vf(psp->adev) && in psp_tmr_init()
839 psp->toc.start_addr && in psp_tmr_init()
840 psp->toc.size_bytes && in psp_tmr_init()
841 psp->fw_pri_buf) { in psp_tmr_init()
844 dev_err(psp->adev->dev, "Failed to load toc\n"); in psp_tmr_init()
849 if (!psp->tmr_bo && !psp->boot_time_tmr) { in psp_tmr_init()
850 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_tmr_init()
851 ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, in psp_tmr_init()
853 AMDGPU_HAS_VRAM(psp->adev) ? in psp_tmr_init()
856 &psp->tmr_bo, &psp->tmr_mc_addr, in psp_tmr_init()
865 switch (amdgpu_ip_version(psp->adev, MP0_HWIP, 0)) { in psp_skip_tmr()
883 /* For Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR. in psp_tmr_load()
886 if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp)) in psp_tmr_load()
891 psp_prep_tmr_cmd_buf(psp, cmd, psp->tmr_mc_addr, psp->tmr_bo); in psp_tmr_load()
892 if (psp->tmr_bo) in psp_tmr_load()
893 dev_info(psp->adev->dev, "reserve 0x%lx from 0x%llx for PSP TMR\n", in psp_tmr_load()
894 amdgpu_bo_size(psp->tmr_bo), psp->tmr_mc_addr); in psp_tmr_load()
897 psp->fence_buf_mc_addr); in psp_tmr_load()
907 if (amdgpu_sriov_vf(psp->adev)) in psp_prep_tmr_unload_cmd_buf()
908 cmd->cmd_id = GFX_CMD_ID_DESTROY_VMR; in psp_prep_tmr_unload_cmd_buf()
910 cmd->cmd_id = GFX_CMD_ID_DESTROY_TMR; in psp_prep_tmr_unload_cmd_buf()
918 /* skip TMR unload for Navi12 and CHIP_SIENNA_CICHLID SRIOV, in psp_tmr_unload()
919 * as TMR is not loaded at all in psp_tmr_unload()
921 if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp)) in psp_tmr_unload()
927 dev_dbg(psp->adev->dev, "free PSP TMR buffer\n"); in psp_tmr_unload()
930 psp->fence_buf_mc_addr); in psp_tmr_unload()
949 return -EINVAL; in psp_get_fw_attestation_records_addr()
951 if (amdgpu_sriov_vf(psp->adev)) in psp_get_fw_attestation_records_addr()
956 cmd->cmd_id = GFX_CMD_ID_GET_FW_ATTESTATION; in psp_get_fw_attestation_records_addr()
959 psp->fence_buf_mc_addr); in psp_get_fw_attestation_records_addr()
962 *output_ptr = ((uint64_t)cmd->resp.uresp.fwar_db_info.fwar_db_addr_lo) + in psp_get_fw_attestation_records_addr()
963 ((uint64_t)cmd->resp.uresp.fwar_db_info.fwar_db_addr_hi << 32); in psp_get_fw_attestation_records_addr()
973 struct psp_context *psp = &adev->psp; in psp_boot_config_get()
982 cmd->cmd_id = GFX_CMD_ID_BOOT_CFG; in psp_boot_config_get()
983 cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_GET; in psp_boot_config_get()
985 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_boot_config_get()
988 (cmd->resp.uresp.boot_cfg.boot_cfg & BOOT_CONFIG_GECC) ? 1 : 0; in psp_boot_config_get()
999 struct psp_context *psp = &adev->psp; in psp_boot_config_set()
1007 cmd->cmd_id = GFX_CMD_ID_BOOT_CFG; in psp_boot_config_set()
1008 cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_SET; in psp_boot_config_set()
1009 cmd->cmd.boot_cfg.boot_config = boot_cfg; in psp_boot_config_set()
1010 cmd->cmd.boot_cfg.boot_config_valid = boot_cfg; in psp_boot_config_set()
1012 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_boot_config_set()
1022 struct psp_context *psp = &adev->psp; in psp_rl_load()
1025 if (!is_psp_fw_valid(psp->rl)) in psp_rl_load()
1030 memset(psp->fw_pri_buf, 0, PSP_1_MEG); in psp_rl_load()
1031 memcpy(psp->fw_pri_buf, psp->rl.start_addr, psp->rl.size_bytes); in psp_rl_load()
1033 cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW; in psp_rl_load()
1034 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(psp->fw_pri_mc_addr); in psp_rl_load()
1035 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_hi = upper_32_bits(psp->fw_pri_mc_addr); in psp_rl_load()
1036 cmd->cmd.cmd_load_ip_fw.fw_size = psp->rl.size_bytes; in psp_rl_load()
1037 cmd->cmd.cmd_load_ip_fw.fw_type = GFX_FW_TYPE_REG_LIST; in psp_rl_load()
1039 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_rl_load()
1051 if (amdgpu_sriov_vf(psp->adev)) in psp_spatial_partition()
1056 cmd->cmd_id = GFX_CMD_ID_SRIOV_SPATIAL_PART; in psp_spatial_partition()
1057 cmd->cmd.cmd_spatial_part.mode = mode; in psp_spatial_partition()
1059 dev_info(psp->adev->dev, "Requesting %d partitions through PSP", mode); in psp_spatial_partition()
1060 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_spatial_partition()
1075 if (amdgpu_sriov_vf(psp->adev) || !psp->asd_context.bin_desc.size_bytes) in psp_asd_initialize()
1079 if (!amdgpu_device_has_display_hardware(psp->adev) && in psp_asd_initialize()
1080 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) >= IP_VERSION(13, 0, 10)) in psp_asd_initialize()
1083 psp->asd_context.mem_context.shared_mc_addr = 0; in psp_asd_initialize()
1084 psp->asd_context.mem_context.shared_mem_size = PSP_ASD_SHARED_MEM_SIZE; in psp_asd_initialize()
1085 psp->asd_context.ta_load_type = GFX_CMD_ID_LOAD_ASD; in psp_asd_initialize()
1087 ret = psp_ta_load(psp, &psp->asd_context); in psp_asd_initialize()
1089 psp->asd_context.initialized = true; in psp_asd_initialize()
1097 cmd->cmd_id = GFX_CMD_ID_UNLOAD_TA; in psp_prep_ta_unload_cmd_buf()
1098 cmd->cmd.cmd_unload_ta.session_id = session_id; in psp_prep_ta_unload_cmd_buf()
1106 psp_prep_ta_unload_cmd_buf(cmd, context->session_id); in psp_ta_unload()
1108 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_ta_unload()
1110 context->resp_status = cmd->resp.status; in psp_ta_unload()
1121 if (amdgpu_sriov_vf(psp->adev)) in psp_asd_terminate()
1124 if (!psp->asd_context.initialized) in psp_asd_terminate()
1127 ret = psp_ta_unload(psp, &psp->asd_context); in psp_asd_terminate()
1129 psp->asd_context.initialized = false; in psp_asd_terminate()
1137 cmd->cmd_id = GFX_CMD_ID_PROG_REG; in psp_prep_reg_prog_cmd_buf()
1138 cmd->cmd.cmd_setup_reg_prog.reg_value = value; in psp_prep_reg_prog_cmd_buf()
1139 cmd->cmd.cmd_setup_reg_prog.reg_id = id; in psp_prep_reg_prog_cmd_buf()
1149 return -EINVAL; in psp_reg_program()
1154 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_reg_program()
1156 dev_err(psp->adev->dev, "PSP failed to program reg id %d\n", reg); in psp_reg_program()
1167 cmd->cmd_id = context->ta_load_type; in psp_prep_ta_load_cmd_buf()
1168 cmd->cmd.cmd_load_ta.app_phy_addr_lo = lower_32_bits(ta_bin_mc); in psp_prep_ta_load_cmd_buf()
1169 cmd->cmd.cmd_load_ta.app_phy_addr_hi = upper_32_bits(ta_bin_mc); in psp_prep_ta_load_cmd_buf()
1170 cmd->cmd.cmd_load_ta.app_len = context->bin_desc.size_bytes; in psp_prep_ta_load_cmd_buf()
1172 cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_lo = in psp_prep_ta_load_cmd_buf()
1173 lower_32_bits(context->mem_context.shared_mc_addr); in psp_prep_ta_load_cmd_buf()
1174 cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_hi = in psp_prep_ta_load_cmd_buf()
1175 upper_32_bits(context->mem_context.shared_mc_addr); in psp_prep_ta_load_cmd_buf()
1176 cmd->cmd.cmd_load_ta.cmd_buf_len = context->mem_context.shared_mem_size; in psp_prep_ta_load_cmd_buf()
1186 return amdgpu_bo_create_kernel(psp->adev, mem_ctx->shared_mem_size, in psp_ta_init_shared_buf()
1189 &mem_ctx->shared_bo, in psp_ta_init_shared_buf()
1190 &mem_ctx->shared_mc_addr, in psp_ta_init_shared_buf()
1191 &mem_ctx->shared_buf); in psp_ta_init_shared_buf()
1198 cmd->cmd_id = GFX_CMD_ID_INVOKE_CMD; in psp_prep_ta_invoke_cmd_buf()
1199 cmd->cmd.cmd_invoke_cmd.session_id = session_id; in psp_prep_ta_invoke_cmd_buf()
1200 cmd->cmd.cmd_invoke_cmd.ta_cmd_id = ta_cmd_id; in psp_prep_ta_invoke_cmd_buf()
1210 psp_prep_ta_invoke_cmd_buf(cmd, ta_cmd_id, context->session_id); in psp_ta_invoke()
1213 psp->fence_buf_mc_addr); in psp_ta_invoke()
1215 context->resp_status = cmd->resp.status; in psp_ta_invoke()
1229 psp_copy_fw(psp, context->bin_desc.start_addr, in psp_ta_load()
1230 context->bin_desc.size_bytes); in psp_ta_load()
1232 psp_prep_ta_load_cmd_buf(cmd, psp->fw_pri_mc_addr, context); in psp_ta_load()
1235 psp->fence_buf_mc_addr); in psp_ta_load()
1237 context->resp_status = cmd->resp.status; in psp_ta_load()
1240 context->session_id = cmd->resp.session_id; in psp_ta_load()
1249 return psp_ta_invoke(psp, ta_cmd_id, &psp->xgmi_context.context); in psp_xgmi_invoke()
1255 struct amdgpu_device *adev = psp->adev; in psp_xgmi_terminate()
1260 adev->gmc.xgmi.connected_to_cpu)) in psp_xgmi_terminate()
1263 if (!psp->xgmi_context.context.initialized) in psp_xgmi_terminate()
1266 ret = psp_ta_unload(psp, &psp->xgmi_context.context); in psp_xgmi_terminate()
1268 psp->xgmi_context.context.initialized = false; in psp_xgmi_terminate()
1278 if (!psp->ta_fw || in psp_xgmi_initialize()
1279 !psp->xgmi_context.context.bin_desc.size_bytes || in psp_xgmi_initialize()
1280 !psp->xgmi_context.context.bin_desc.start_addr) in psp_xgmi_initialize()
1281 return -ENOENT; in psp_xgmi_initialize()
1286 psp->xgmi_context.context.mem_context.shared_mem_size = PSP_XGMI_SHARED_MEM_SIZE; in psp_xgmi_initialize()
1287 psp->xgmi_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_xgmi_initialize()
1289 if (!psp->xgmi_context.context.mem_context.shared_buf) { in psp_xgmi_initialize()
1290 ret = psp_ta_init_shared_buf(psp, &psp->xgmi_context.context.mem_context); in psp_xgmi_initialize()
1296 ret = psp_ta_load(psp, &psp->xgmi_context.context); in psp_xgmi_initialize()
1298 psp->xgmi_context.context.initialized = true; in psp_xgmi_initialize()
1304 xgmi_cmd = (struct ta_xgmi_shared_memory *)(psp->xgmi_context.context.mem_context.shared_buf); in psp_xgmi_initialize()
1306 xgmi_cmd->flag_extend_link_record = set_extended_data; in psp_xgmi_initialize()
1307 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__INITIALIZE; in psp_xgmi_initialize()
1309 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_initialize()
1311 psp->xgmi_context.xgmi_ta_caps = xgmi_cmd->caps_flag; in psp_xgmi_initialize()
1321 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_hive_id()
1324 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_HIVE_ID; in psp_xgmi_get_hive_id()
1327 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_hive_id()
1331 *hive_id = xgmi_cmd->xgmi_out_message.get_hive_id.hive_id; in psp_xgmi_get_hive_id()
1341 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_node_id()
1344 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_NODE_ID; in psp_xgmi_get_node_id()
1347 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_node_id()
1351 *node_id = xgmi_cmd->xgmi_out_message.get_node_id.node_id; in psp_xgmi_get_node_id()
1358 return (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_peer_link_info_supported()
1360 psp->xgmi_context.context.bin_desc.fw_version >= 0x2000000b) || in psp_xgmi_peer_link_info_supported()
1361 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) >= in psp_xgmi_peer_link_info_supported()
1369 * TA holds bi-directional information, the driver would have to do
1377 uint64_t src_node_id = psp->adev->gmc.xgmi.node_id; in psp_xgmi_reflect_topology_info()
1382 hive = amdgpu_get_xgmi_hive(psp->adev); in psp_xgmi_reflect_topology_info()
1386 list_for_each_entry(mirror_adev, &hive->device_list, gmc.xgmi.head) { in psp_xgmi_reflect_topology_info()
1390 if (mirror_adev->gmc.xgmi.node_id != dst_node_id) in psp_xgmi_reflect_topology_info()
1393 mirror_top_info = &mirror_adev->psp.xgmi_context.top_info; in psp_xgmi_reflect_topology_info()
1394 for (j = 0; j < mirror_top_info->num_nodes; j++) { in psp_xgmi_reflect_topology_info()
1395 if (mirror_top_info->nodes[j].node_id != src_node_id) in psp_xgmi_reflect_topology_info()
1398 mirror_top_info->nodes[j].num_hops = dst_num_hops; in psp_xgmi_reflect_topology_info()
1400 * prevent 0 num_links value re-reflection since reflection in psp_xgmi_reflect_topology_info()
1405 mirror_top_info->nodes[j].num_links = dst_num_links; in psp_xgmi_reflect_topology_info()
1427 if (!topology || topology->num_nodes > TA_XGMI__MAX_CONNECTED_NODES) in psp_xgmi_get_topology_info()
1428 return -EINVAL; in psp_xgmi_get_topology_info()
1430 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_topology_info()
1432 xgmi_cmd->flag_extend_link_record = get_extended_data; in psp_xgmi_get_topology_info()
1435 topology_info_input = &xgmi_cmd->xgmi_in_message.get_topology_info; in psp_xgmi_get_topology_info()
1436 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_TOPOLOGY_INFO; in psp_xgmi_get_topology_info()
1437 topology_info_input->num_nodes = number_devices; in psp_xgmi_get_topology_info()
1439 for (i = 0; i < topology_info_input->num_nodes; i++) { in psp_xgmi_get_topology_info()
1440 topology_info_input->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_get_topology_info()
1441 topology_info_input->nodes[i].num_hops = topology->nodes[i].num_hops; in psp_xgmi_get_topology_info()
1442 topology_info_input->nodes[i].is_sharing_enabled = topology->nodes[i].is_sharing_enabled; in psp_xgmi_get_topology_info()
1443 topology_info_input->nodes[i].sdma_engine = topology->nodes[i].sdma_engine; in psp_xgmi_get_topology_info()
1452 topology_info_output = &xgmi_cmd->xgmi_out_message.get_topology_info; in psp_xgmi_get_topology_info()
1453 topology->num_nodes = xgmi_cmd->xgmi_out_message.get_topology_info.num_nodes; in psp_xgmi_get_topology_info()
1454 for (i = 0; i < topology->num_nodes; i++) { in psp_xgmi_get_topology_info()
1455 /* extended data will either be 0 or equal to non-extended data */ in psp_xgmi_get_topology_info()
1456 if (topology_info_output->nodes[i].num_hops) in psp_xgmi_get_topology_info()
1457 topology->nodes[i].num_hops = topology_info_output->nodes[i].num_hops; in psp_xgmi_get_topology_info()
1459 /* non-extended data gets everything here so no need to update */ in psp_xgmi_get_topology_info()
1461 topology->nodes[i].node_id = topology_info_output->nodes[i].node_id; in psp_xgmi_get_topology_info()
1462 topology->nodes[i].is_sharing_enabled = in psp_xgmi_get_topology_info()
1463 topology_info_output->nodes[i].is_sharing_enabled; in psp_xgmi_get_topology_info()
1464 topology->nodes[i].sdma_engine = in psp_xgmi_get_topology_info()
1465 topology_info_output->nodes[i].sdma_engine; in psp_xgmi_get_topology_info()
1475 (psp->xgmi_context.supports_extended_data && in psp_xgmi_get_topology_info()
1477 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_get_topology_info()
1479 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_get_topology_info()
1481 bool ta_port_num_support = amdgpu_sriov_vf(psp->adev) ? 0 : in psp_xgmi_get_topology_info()
1482 psp->xgmi_context.xgmi_ta_caps & EXTEND_PEER_LINK_INFO_CMD_FLAG; in psp_xgmi_get_topology_info()
1490 link_extend_info_output = &xgmi_cmd->xgmi_out_message.get_extend_link_info; in psp_xgmi_get_topology_info()
1492 for (i = 0; i < topology->num_nodes; i++) in psp_xgmi_get_topology_info()
1493 link_extend_info_output->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_get_topology_info()
1495 link_extend_info_output->num_nodes = topology->num_nodes; in psp_xgmi_get_topology_info()
1496 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_EXTEND_PEER_LINKS; in psp_xgmi_get_topology_info()
1498 link_info_output = &xgmi_cmd->xgmi_out_message.get_link_info; in psp_xgmi_get_topology_info()
1500 for (i = 0; i < topology->num_nodes; i++) in psp_xgmi_get_topology_info()
1501 link_info_output->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_get_topology_info()
1503 link_info_output->num_nodes = topology->num_nodes; in psp_xgmi_get_topology_info()
1504 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_PEER_LINKS; in psp_xgmi_get_topology_info()
1507 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_topology_info()
1511 for (i = 0; i < topology->num_nodes; i++) { in psp_xgmi_get_topology_info()
1513 link_extend_info_output->nodes[i].num_links : link_info_output->nodes[i].num_links; in psp_xgmi_get_topology_info()
1516 topology->nodes[i].num_links = topology->nodes[i].num_links + node_num_links; in psp_xgmi_get_topology_info()
1518 topology->nodes[i].num_links = (requires_reflection && topology->nodes[i].num_links) ? in psp_xgmi_get_topology_info()
1519 topology->nodes[i].num_links : node_num_links; in psp_xgmi_get_topology_info()
1522 if (ta_port_num_support && topology->nodes[i].num_links) { in psp_xgmi_get_topology_info()
1523 memcpy(topology->nodes[i].port_num, link_extend_info_output->nodes[i].port_num, in psp_xgmi_get_topology_info()
1527 /* reflect the topology information for bi-directionality */ in psp_xgmi_get_topology_info()
1528 if (requires_reflection && topology->nodes[i].num_hops) in psp_xgmi_get_topology_info()
1529 psp_xgmi_reflect_topology_info(psp, topology->nodes[i]); in psp_xgmi_get_topology_info()
1544 if (!topology || topology->num_nodes > TA_XGMI__MAX_CONNECTED_NODES) in psp_xgmi_set_topology_info()
1545 return -EINVAL; in psp_xgmi_set_topology_info()
1547 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_set_topology_info()
1550 topology_info_input = &xgmi_cmd->xgmi_in_message.get_topology_info; in psp_xgmi_set_topology_info()
1551 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__SET_TOPOLOGY_INFO; in psp_xgmi_set_topology_info()
1552 topology_info_input->num_nodes = number_devices; in psp_xgmi_set_topology_info()
1554 for (i = 0; i < topology_info_input->num_nodes; i++) { in psp_xgmi_set_topology_info()
1555 topology_info_input->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_set_topology_info()
1556 topology_info_input->nodes[i].num_hops = topology->nodes[i].num_hops; in psp_xgmi_set_topology_info()
1557 topology_info_input->nodes[i].is_sharing_enabled = 1; in psp_xgmi_set_topology_info()
1558 topology_info_input->nodes[i].sdma_engine = topology->nodes[i].sdma_engine; in psp_xgmi_set_topology_info()
1569 (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_ta_check_status()
1571 switch (ras_cmd->ras_status) { in psp_ras_ta_check_status()
1573 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1577 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1583 if (ras_cmd->cmd_id == TA_RAS_COMMAND__TRIGGER_ERROR) in psp_ras_ta_check_status()
1584 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1585 "RAS WARNING: Inject error to critical region is not allowed\n"); in psp_ras_ta_check_status()
1588 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1589 "RAS WARNING: ras status = 0x%X\n", ras_cmd->ras_status); in psp_ras_ta_check_status()
1602 return -EINVAL; in psp_ras_send_cmd()
1604 mutex_lock(&psp->ras_context.mutex); in psp_ras_send_cmd()
1605 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_send_cmd()
1611 memcpy(&ras_cmd->ras_in_message, in psp_ras_send_cmd()
1612 in, sizeof(ras_cmd->ras_in_message)); in psp_ras_send_cmd()
1615 memcpy(&ras_cmd->ras_in_message.trigger_error, in psp_ras_send_cmd()
1616 in, sizeof(ras_cmd->ras_in_message.trigger_error)); in psp_ras_send_cmd()
1619 memcpy(&ras_cmd->ras_in_message.address, in psp_ras_send_cmd()
1620 in, sizeof(ras_cmd->ras_in_message.address)); in psp_ras_send_cmd()
1623 dev_err(psp->adev->dev, "Invalid ras cmd id: %u\n", cmd); in psp_ras_send_cmd()
1624 ret = -EINVAL; in psp_ras_send_cmd()
1628 ras_cmd->cmd_id = cmd; in psp_ras_send_cmd()
1629 ret = psp_ras_invoke(psp, ras_cmd->cmd_id); in psp_ras_send_cmd()
1634 memcpy(out, &ras_cmd->ras_status, sizeof(ras_cmd->ras_status)); in psp_ras_send_cmd()
1637 if (ret || ras_cmd->ras_status || psp->cmd_buf_mem->resp.status) in psp_ras_send_cmd()
1638 ret = -EINVAL; in psp_ras_send_cmd()
1641 &ras_cmd->ras_out_message.address, in psp_ras_send_cmd()
1642 sizeof(ras_cmd->ras_out_message.address)); in psp_ras_send_cmd()
1649 mutex_unlock(&psp->ras_context.mutex); in psp_ras_send_cmd()
1659 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_invoke()
1664 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_invoke()
1667 ret = psp_ta_invoke(psp, ta_cmd_id, &psp->ras_context.context); in psp_ras_invoke()
1672 if (ras_cmd->if_version > RAS_TA_HOST_IF_VER) { in psp_ras_invoke()
1673 dev_warn(psp->adev->dev, "RAS: Unsupported Interface\n"); in psp_ras_invoke()
1674 return -EINVAL; in psp_ras_invoke()
1678 if (ras_cmd->ras_out_message.flags.err_inject_switch_disable_flag) { in psp_ras_invoke()
1679 dev_warn(psp->adev->dev, "ECC switch disabled\n"); in psp_ras_invoke()
1681 ras_cmd->ras_status = TA_RAS_STATUS__ERROR_RAS_NOT_AVAILABLE; in psp_ras_invoke()
1682 } else if (ras_cmd->ras_out_message.flags.reg_access_failure_flag) in psp_ras_invoke()
1683 dev_warn(psp->adev->dev, in psp_ras_invoke()
1698 if (!psp->ras_context.context.initialized || !info) in psp_ras_enable_features()
1699 return -EINVAL; in psp_ras_enable_features()
1705 return -EINVAL; in psp_ras_enable_features()
1717 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_terminate()
1720 if (!psp->ras_context.context.initialized) in psp_ras_terminate()
1723 ret = psp_ta_unload(psp, &psp->ras_context.context); in psp_ras_terminate()
1725 psp->ras_context.context.initialized = false; in psp_ras_terminate()
1727 mutex_destroy(&psp->ras_context.mutex); in psp_ras_terminate()
1736 struct amdgpu_device *adev = psp->adev; in psp_ras_initialize()
1745 if (!adev->psp.ras_context.context.bin_desc.size_bytes || in psp_ras_initialize()
1746 !adev->psp.ras_context.context.bin_desc.start_addr) { in psp_ras_initialize()
1747 dev_info(adev->dev, "RAS: optional ras ta ucode is not available\n"); in psp_ras_initialize()
1753 * boot_cfg: 1: GECC is enabled or 0: GECC is disabled in psp_ras_initialize()
1757 dev_warn(adev->dev, "PSP get boot config failed\n"); in psp_ras_initialize()
1759 if (!amdgpu_ras_is_supported(psp->adev, AMDGPU_RAS_BLOCK__UMC)) { in psp_ras_initialize()
1761 dev_info(adev->dev, "GECC is disabled\n"); in psp_ras_initialize()
1770 dev_warn(adev->dev, "PSP set boot config failed\n"); in psp_ras_initialize()
1772 …dev_warn(adev->dev, "GECC will be disabled in next boot cycle if set amdgpu_ras_enable and/or amdg… in psp_ras_initialize()
1775 if (boot_cfg == 1) { in psp_ras_initialize()
1776 dev_info(adev->dev, "GECC is enabled\n"); in psp_ras_initialize()
1784 dev_warn(adev->dev, "PSP set boot config failed\n"); in psp_ras_initialize()
1786 dev_warn(adev->dev, "GECC will be enabled in next boot cycle\n"); in psp_ras_initialize()
1791 psp->ras_context.context.mem_context.shared_mem_size = PSP_RAS_SHARED_MEM_SIZE; in psp_ras_initialize()
1792 psp->ras_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_ras_initialize()
1794 if (!psp->ras_context.context.mem_context.shared_buf) { in psp_ras_initialize()
1795 ret = psp_ta_init_shared_buf(psp, &psp->ras_context.context.mem_context); in psp_ras_initialize()
1800 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_initialize()
1804 ras_cmd->ras_in_message.init_flags.poison_mode_en = 1; in psp_ras_initialize()
1805 if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) in psp_ras_initialize()
1806 ras_cmd->ras_in_message.init_flags.dgpu_mode = 1; in psp_ras_initialize()
1807 ras_cmd->ras_in_message.init_flags.xcc_mask = in psp_ras_initialize()
1808 adev->gfx.xcc_mask; in psp_ras_initialize()
1809 ras_cmd->ras_in_message.init_flags.channel_dis_num = hweight32(adev->gmc.m_half_use) * 2; in psp_ras_initialize()
1811 ret = psp_ta_load(psp, &psp->ras_context.context); in psp_ras_initialize()
1813 if (!ret && !ras_cmd->ras_status) { in psp_ras_initialize()
1814 psp->ras_context.context.initialized = true; in psp_ras_initialize()
1815 mutex_init(&psp->ras_context.mutex); in psp_ras_initialize()
1817 if (ras_cmd->ras_status) in psp_ras_initialize()
1818 dev_warn(adev->dev, "RAS Init Status: 0x%X\n", ras_cmd->ras_status); in psp_ras_initialize()
1821 psp->ras_context.context.initialized = false; in psp_ras_initialize()
1830 struct amdgpu_device *adev = psp->adev; in psp_ras_trigger_error()
1835 if (!psp->ras_context.context.initialized || !info) in psp_ras_trigger_error()
1836 return -EINVAL; in psp_ras_trigger_error()
1838 switch (info->block_id) { in psp_ras_trigger_error()
1857 info->sub_block_index |= dev_mask; in psp_ras_trigger_error()
1862 return -EINVAL; in psp_ras_trigger_error()
1864 /* If err_event_athub occurs error inject was successful, however in psp_ras_trigger_error()
1871 return -EACCES; in psp_ras_trigger_error()
1873 return -EINVAL; in psp_ras_trigger_error()
1884 if (!psp->ras_context.context.initialized || in psp_ras_query_address()
1886 return -EINVAL; in psp_ras_query_address()
1903 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_initialize()
1907 if (!amdgpu_device_has_display_hardware(psp->adev)) in psp_hdcp_initialize()
1910 if (!psp->hdcp_context.context.bin_desc.size_bytes || in psp_hdcp_initialize()
1911 !psp->hdcp_context.context.bin_desc.start_addr) { in psp_hdcp_initialize()
1912 dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n"); in psp_hdcp_initialize()
1916 psp->hdcp_context.context.mem_context.shared_mem_size = PSP_HDCP_SHARED_MEM_SIZE; in psp_hdcp_initialize()
1917 psp->hdcp_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_hdcp_initialize()
1919 if (!psp->hdcp_context.context.mem_context.shared_buf) { in psp_hdcp_initialize()
1920 ret = psp_ta_init_shared_buf(psp, &psp->hdcp_context.context.mem_context); in psp_hdcp_initialize()
1925 ret = psp_ta_load(psp, &psp->hdcp_context.context); in psp_hdcp_initialize()
1927 psp->hdcp_context.context.initialized = true; in psp_hdcp_initialize()
1928 mutex_init(&psp->hdcp_context.mutex); in psp_hdcp_initialize()
1939 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_invoke()
1942 if (!psp->hdcp_context.context.initialized) in psp_hdcp_invoke()
1945 return psp_ta_invoke(psp, ta_cmd_id, &psp->hdcp_context.context); in psp_hdcp_invoke()
1955 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_terminate()
1958 if (!psp->hdcp_context.context.initialized) in psp_hdcp_terminate()
1961 ret = psp_ta_unload(psp, &psp->hdcp_context.context); in psp_hdcp_terminate()
1963 psp->hdcp_context.context.initialized = false; in psp_hdcp_terminate()
1977 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_initialize()
1981 if (!amdgpu_device_has_display_hardware(psp->adev)) in psp_dtm_initialize()
1984 if (!psp->dtm_context.context.bin_desc.size_bytes || in psp_dtm_initialize()
1985 !psp->dtm_context.context.bin_desc.start_addr) { in psp_dtm_initialize()
1986 dev_info(psp->adev->dev, "DTM: optional dtm ta ucode is not available\n"); in psp_dtm_initialize()
1990 psp->dtm_context.context.mem_context.shared_mem_size = PSP_DTM_SHARED_MEM_SIZE; in psp_dtm_initialize()
1991 psp->dtm_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_dtm_initialize()
1993 if (!psp->dtm_context.context.mem_context.shared_buf) { in psp_dtm_initialize()
1994 ret = psp_ta_init_shared_buf(psp, &psp->dtm_context.context.mem_context); in psp_dtm_initialize()
1999 ret = psp_ta_load(psp, &psp->dtm_context.context); in psp_dtm_initialize()
2001 psp->dtm_context.context.initialized = true; in psp_dtm_initialize()
2002 mutex_init(&psp->dtm_context.mutex); in psp_dtm_initialize()
2013 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_invoke()
2016 if (!psp->dtm_context.context.initialized) in psp_dtm_invoke()
2019 return psp_ta_invoke(psp, ta_cmd_id, &psp->dtm_context.context); in psp_dtm_invoke()
2029 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_terminate()
2032 if (!psp->dtm_context.context.initialized) in psp_dtm_terminate()
2035 ret = psp_ta_unload(psp, &psp->dtm_context.context); in psp_dtm_terminate()
2037 psp->dtm_context.context.initialized = false; in psp_dtm_terminate()
2052 if (amdgpu_sriov_vf(psp->adev)) in psp_rap_initialize()
2055 if (!psp->rap_context.context.bin_desc.size_bytes || in psp_rap_initialize()
2056 !psp->rap_context.context.bin_desc.start_addr) { in psp_rap_initialize()
2057 dev_info(psp->adev->dev, "RAP: optional rap ta ucode is not available\n"); in psp_rap_initialize()
2061 psp->rap_context.context.mem_context.shared_mem_size = PSP_RAP_SHARED_MEM_SIZE; in psp_rap_initialize()
2062 psp->rap_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_rap_initialize()
2064 if (!psp->rap_context.context.mem_context.shared_buf) { in psp_rap_initialize()
2065 ret = psp_ta_init_shared_buf(psp, &psp->rap_context.context.mem_context); in psp_rap_initialize()
2070 ret = psp_ta_load(psp, &psp->rap_context.context); in psp_rap_initialize()
2072 psp->rap_context.context.initialized = true; in psp_rap_initialize()
2073 mutex_init(&psp->rap_context.mutex); in psp_rap_initialize()
2081 psp_ta_free_shared_buf(&psp->rap_context.context.mem_context); in psp_rap_initialize()
2083 dev_warn(psp->adev->dev, "RAP TA initialize fail (%d) status %d.\n", in psp_rap_initialize()
2096 if (!psp->rap_context.context.initialized) in psp_rap_terminate()
2099 ret = psp_ta_unload(psp, &psp->rap_context.context); in psp_rap_terminate()
2101 psp->rap_context.context.initialized = false; in psp_rap_terminate()
2111 if (!psp->rap_context.context.initialized) in psp_rap_invoke()
2116 return -EINVAL; in psp_rap_invoke()
2118 mutex_lock(&psp->rap_context.mutex); in psp_rap_invoke()
2121 psp->rap_context.context.mem_context.shared_buf; in psp_rap_invoke()
2124 rap_cmd->cmd_id = ta_cmd_id; in psp_rap_invoke()
2125 rap_cmd->validation_method_id = METHOD_A; in psp_rap_invoke()
2127 ret = psp_ta_invoke(psp, rap_cmd->cmd_id, &psp->rap_context.context); in psp_rap_invoke()
2132 *status = rap_cmd->rap_status; in psp_rap_invoke()
2135 mutex_unlock(&psp->rap_context.mutex); in psp_rap_invoke()
2150 if (amdgpu_sriov_vf(psp->adev)) in psp_securedisplay_initialize()
2154 if (!amdgpu_device_has_display_hardware(psp->adev)) in psp_securedisplay_initialize()
2157 if (!psp->securedisplay_context.context.bin_desc.size_bytes || in psp_securedisplay_initialize()
2158 !psp->securedisplay_context.context.bin_desc.start_addr) { in psp_securedisplay_initialize()
2159 dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n"); in psp_securedisplay_initialize()
2163 psp->securedisplay_context.context.mem_context.shared_mem_size = in psp_securedisplay_initialize()
2165 psp->securedisplay_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_securedisplay_initialize()
2167 if (!psp->securedisplay_context.context.initialized) { in psp_securedisplay_initialize()
2169 &psp->securedisplay_context.context.mem_context); in psp_securedisplay_initialize()
2174 ret = psp_ta_load(psp, &psp->securedisplay_context.context); in psp_securedisplay_initialize()
2176 psp->securedisplay_context.context.initialized = true; in psp_securedisplay_initialize()
2177 mutex_init(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2181 mutex_lock(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2188 mutex_unlock(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2193 psp_ta_free_shared_buf(&psp->securedisplay_context.context.mem_context); in psp_securedisplay_initialize()
2194 dev_err(psp->adev->dev, "SECUREDISPLAY TA initialize fail.\n"); in psp_securedisplay_initialize()
2195 return -EINVAL; in psp_securedisplay_initialize()
2198 if (securedisplay_cmd->status != TA_SECUREDISPLAY_STATUS__SUCCESS) { in psp_securedisplay_initialize()
2199 psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status); in psp_securedisplay_initialize()
2200 dev_err(psp->adev->dev, "SECUREDISPLAY: query securedisplay TA failed. ret 0x%x\n", in psp_securedisplay_initialize()
2201 securedisplay_cmd->securedisplay_out_message.query_ta.query_cmd_ret); in psp_securedisplay_initialize()
2203 psp->securedisplay_context.context.bin_desc.size_bytes = 0; in psp_securedisplay_initialize()
2216 if (amdgpu_sriov_vf(psp->adev)) in psp_securedisplay_terminate()
2219 if (!psp->securedisplay_context.context.initialized) in psp_securedisplay_terminate()
2222 ret = psp_ta_unload(psp, &psp->securedisplay_context.context); in psp_securedisplay_terminate()
2224 psp->securedisplay_context.context.initialized = false; in psp_securedisplay_terminate()
2233 if (!psp->securedisplay_context.context.initialized) in psp_securedisplay_invoke()
2234 return -EINVAL; in psp_securedisplay_invoke()
2238 return -EINVAL; in psp_securedisplay_invoke()
2240 ret = psp_ta_invoke(psp, ta_cmd_id, &psp->securedisplay_context.context); in psp_securedisplay_invoke()
2248 struct psp_context *psp = &adev->psp; in amdgpu_psp_wait_for_bootloader()
2251 if (!amdgpu_sriov_vf(adev) && psp->funcs && psp->funcs->wait_for_bootloader != NULL) in amdgpu_psp_wait_for_bootloader()
2252 ret = psp->funcs->wait_for_bootloader(psp); in amdgpu_psp_wait_for_bootloader()
2259 if (psp->funcs && in amdgpu_psp_get_ras_capability()
2260 psp->funcs->get_ras_capability) { in amdgpu_psp_get_ras_capability()
2261 return psp->funcs->get_ras_capability(psp); in amdgpu_psp_get_ras_capability()
2269 struct amdgpu_device *adev = psp->adev; in psp_hw_start()
2273 if ((is_psp_fw_valid(psp->kdb)) && in psp_hw_start()
2274 (psp->funcs->bootloader_load_kdb != NULL)) { in psp_hw_start()
2277 dev_err(adev->dev, "PSP load kdb failed!\n"); in psp_hw_start()
2282 if ((is_psp_fw_valid(psp->spl)) && in psp_hw_start()
2283 (psp->funcs->bootloader_load_spl != NULL)) { in psp_hw_start()
2286 dev_err(adev->dev, "PSP load spl failed!\n"); in psp_hw_start()
2291 if ((is_psp_fw_valid(psp->sys)) && in psp_hw_start()
2292 (psp->funcs->bootloader_load_sysdrv != NULL)) { in psp_hw_start()
2295 dev_err(adev->dev, "PSP load sys drv failed!\n"); in psp_hw_start()
2300 if ((is_psp_fw_valid(psp->soc_drv)) && in psp_hw_start()
2301 (psp->funcs->bootloader_load_soc_drv != NULL)) { in psp_hw_start()
2304 dev_err(adev->dev, "PSP load soc drv failed!\n"); in psp_hw_start()
2309 if ((is_psp_fw_valid(psp->intf_drv)) && in psp_hw_start()
2310 (psp->funcs->bootloader_load_intf_drv != NULL)) { in psp_hw_start()
2313 dev_err(adev->dev, "PSP load intf drv failed!\n"); in psp_hw_start()
2318 if ((is_psp_fw_valid(psp->dbg_drv)) && in psp_hw_start()
2319 (psp->funcs->bootloader_load_dbg_drv != NULL)) { in psp_hw_start()
2322 dev_err(adev->dev, "PSP load dbg drv failed!\n"); in psp_hw_start()
2327 if ((is_psp_fw_valid(psp->ras_drv)) && in psp_hw_start()
2328 (psp->funcs->bootloader_load_ras_drv != NULL)) { in psp_hw_start()
2331 dev_err(adev->dev, "PSP load ras_drv failed!\n"); in psp_hw_start()
2336 if ((is_psp_fw_valid(psp->ipkeymgr_drv)) && in psp_hw_start()
2337 (psp->funcs->bootloader_load_ipkeymgr_drv != NULL)) { in psp_hw_start()
2340 dev_err(adev->dev, "PSP load ipkeymgr_drv failed!\n"); in psp_hw_start()
2345 if ((is_psp_fw_valid(psp->sos)) && in psp_hw_start()
2346 (psp->funcs->bootloader_load_sos != NULL)) { in psp_hw_start()
2349 dev_err(adev->dev, "PSP load sos failed!\n"); in psp_hw_start()
2357 dev_err(adev->dev, "PSP create ring failed!\n"); in psp_hw_start()
2364 if (!psp->boot_time_tmr || psp->autoload_supported) { in psp_hw_start()
2367 dev_err(adev->dev, "PSP tmr init failed!\n"); in psp_hw_start()
2375 * to PMFW, TMR setup should be performed after PMFW in psp_hw_start()
2376 * loaded and before other non-psp firmware loaded. in psp_hw_start()
2378 if (psp->pmfw_centralized_cstate_management) { in psp_hw_start()
2384 if (!psp->boot_time_tmr || !psp->autoload_supported) { in psp_hw_start()
2387 dev_err(adev->dev, "PSP load tmr failed!\n"); in psp_hw_start()
2398 switch (ucode->ucode_id) { in psp_get_fw_type()
2609 return -EINVAL; in psp_get_fw_type()
2618 struct amdgpu_device *adev = psp->adev; in psp_print_fw_hdr()
2621 switch (ucode->ucode_id) { in psp_print_fw_hdr()
2631 adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data; in psp_print_fw_hdr()
2635 hdr = (struct common_firmware_header *)adev->gfx.ce_fw->data; in psp_print_fw_hdr()
2639 hdr = (struct common_firmware_header *)adev->gfx.pfp_fw->data; in psp_print_fw_hdr()
2643 hdr = (struct common_firmware_header *)adev->gfx.me_fw->data; in psp_print_fw_hdr()
2647 hdr = (struct common_firmware_header *)adev->gfx.mec_fw->data; in psp_print_fw_hdr()
2651 hdr = (struct common_firmware_header *)adev->gfx.rlc_fw->data; in psp_print_fw_hdr()
2655 hdr = (struct common_firmware_header *)adev->pm.fw->data; in psp_print_fw_hdr()
2668 uint64_t fw_mem_mc_addr = ucode->mc_addr; in psp_prep_load_ip_fw_cmd_buf()
2670 cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW; in psp_prep_load_ip_fw_cmd_buf()
2671 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(fw_mem_mc_addr); in psp_prep_load_ip_fw_cmd_buf()
2672 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_hi = upper_32_bits(fw_mem_mc_addr); in psp_prep_load_ip_fw_cmd_buf()
2673 cmd->cmd.cmd_load_ip_fw.fw_size = ucode->ucode_size; in psp_prep_load_ip_fw_cmd_buf()
2675 ret = psp_get_fw_type(ucode, &cmd->cmd.cmd_load_ip_fw.fw_type); in psp_prep_load_ip_fw_cmd_buf()
2677 dev_err(psp->adev->dev, "Unknown firmware type\n"); in psp_prep_load_ip_fw_cmd_buf()
2691 psp->fence_buf_mc_addr); in psp_execute_ip_fw_load()
2702 struct amdgpu_device *adev = psp->adev; in psp_load_p2s_table()
2704 &adev->firmware.ucode[AMDGPU_UCODE_ID_P2S_TABLE]; in psp_load_p2s_table()
2706 if (adev->in_runpm && ((adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) || in psp_load_p2s_table()
2707 (adev->pm.rpm_mode == AMDGPU_RUNPM_BAMACO))) in psp_load_p2s_table()
2712 uint32_t supp_vers = adev->flags & AMD_IS_APU ? 0x0036013D : in psp_load_p2s_table()
2714 if (psp->sos.fw_version < supp_vers) in psp_load_p2s_table()
2718 if (!ucode->fw || amdgpu_sriov_vf(psp->adev)) in psp_load_p2s_table()
2729 struct amdgpu_device *adev = psp->adev; in psp_load_smu_fw()
2731 &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC]; in psp_load_smu_fw()
2732 struct amdgpu_ras *ras = psp->ras_context.ras; in psp_load_smu_fw()
2738 if (adev->in_runpm && ((adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) || in psp_load_smu_fw()
2739 (adev->pm.rpm_mode == AMDGPU_RUNPM_BAMACO))) in psp_load_smu_fw()
2742 if (!ucode->fw || amdgpu_sriov_vf(psp->adev)) in psp_load_smu_fw()
2745 if ((amdgpu_in_reset(adev) && ras && adev->ras_enabled && in psp_load_smu_fw()
2750 dev_err(adev->dev, "Failed to set MP1 state prepare for reload\n"); in psp_load_smu_fw()
2756 dev_err(adev->dev, "PSP load smu failed!\n"); in psp_load_smu_fw()
2764 if (!ucode->fw || !ucode->ucode_size) in fw_load_skip_check()
2767 if (ucode->ucode_id == AMDGPU_UCODE_ID_P2S_TABLE) in fw_load_skip_check()
2770 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in fw_load_skip_check()
2772 psp->autoload_supported || in fw_load_skip_check()
2773 psp->pmfw_centralized_cstate_management)) in fw_load_skip_check()
2776 if (amdgpu_sriov_vf(psp->adev) && in fw_load_skip_check()
2777 amdgpu_virt_fw_load_skip_check(psp->adev, ucode->ucode_id)) in fw_load_skip_check()
2780 if (psp->autoload_supported && in fw_load_skip_check()
2781 (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT || in fw_load_skip_check()
2782 ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT)) in fw_load_skip_check()
2809 struct amdgpu_device *adev = psp->adev; in psp_load_non_psp_fw()
2811 if (psp->autoload_supported && in psp_load_non_psp_fw()
2812 !psp->pmfw_centralized_cstate_management) { in psp_load_non_psp_fw()
2821 for (i = 0; i < adev->firmware.max_ucodes; i++) { in psp_load_non_psp_fw()
2822 ucode = &adev->firmware.ucode[i]; in psp_load_non_psp_fw()
2824 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in psp_load_non_psp_fw()
2835 if (psp->autoload_supported && in psp_load_non_psp_fw()
2842 (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1 || in psp_load_non_psp_fw()
2843 ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2 || in psp_load_non_psp_fw()
2844 ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3)) in psp_load_non_psp_fw()
2857 if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? in psp_load_non_psp_fw()
2858 adev->virt.autoload_ucode_id : AMDGPU_UCODE_ID_RLC_G)) { in psp_load_non_psp_fw()
2861 dev_err(adev->dev, "Failed to start rlc autoload\n"); in psp_load_non_psp_fw()
2873 struct psp_context *psp = &adev->psp; in psp_load_fw()
2879 memset(psp->fence_buf, 0, PSP_FENCE_BUFFER_SIZE); in psp_load_fw()
2883 dev_err(adev->dev, "PSP ring init failed!\n"); in psp_load_fw()
2898 dev_err(adev->dev, "PSP load asd failed!\n"); in psp_load_fw()
2904 dev_err(adev->dev, "PSP load RL failed!\n"); in psp_load_fw()
2909 if (adev->gmc.xgmi.num_physical_nodes > 1) { in psp_load_fw()
2915 dev_err(psp->adev->dev, in psp_load_fw()
2920 if (psp->ta_fw) { in psp_load_fw()
2923 dev_err(psp->adev->dev, in psp_load_fw()
2928 dev_err(psp->adev->dev, in psp_load_fw()
2933 dev_err(psp->adev->dev, in psp_load_fw()
2938 dev_err(psp->adev->dev, in psp_load_fw()
2943 dev_err(psp->adev->dev, in psp_load_fw()
2955 * psp->cmd destory) are delayed to psp_hw_fini in psp_load_fw()
2966 mutex_lock(&adev->firmware.mutex); in psp_hw_init()
2977 dev_err(adev->dev, "PSP firmware loading failed\n"); in psp_hw_init()
2981 mutex_unlock(&adev->firmware.mutex); in psp_hw_init()
2985 adev->firmware.load_type = AMDGPU_FW_LOAD_DIRECT; in psp_hw_init()
2986 mutex_unlock(&adev->firmware.mutex); in psp_hw_init()
2987 return -EINVAL; in psp_hw_init()
2993 struct psp_context *psp = &adev->psp; in psp_hw_fini()
2995 if (psp->ta_fw) { in psp_hw_fini()
3002 if (adev->gmc.xgmi.num_physical_nodes > 1) in psp_hw_fini()
3018 struct psp_context *psp = &adev->psp; in psp_suspend()
3020 if (adev->gmc.xgmi.num_physical_nodes > 1 && in psp_suspend()
3021 psp->xgmi_context.context.initialized) { in psp_suspend()
3024 dev_err(adev->dev, "Failed to terminate xgmi ta\n"); in psp_suspend()
3029 if (psp->ta_fw) { in psp_suspend()
3032 dev_err(adev->dev, "Failed to terminate ras ta\n"); in psp_suspend()
3037 dev_err(adev->dev, "Failed to terminate hdcp ta\n"); in psp_suspend()
3042 dev_err(adev->dev, "Failed to terminate dtm ta\n"); in psp_suspend()
3047 dev_err(adev->dev, "Failed to terminate rap ta\n"); in psp_suspend()
3052 dev_err(adev->dev, "Failed to terminate securedisplay ta\n"); in psp_suspend()
3059 dev_err(adev->dev, "Failed to terminate asd\n"); in psp_suspend()
3065 dev_err(adev->dev, "Failed to terminate tmr\n"); in psp_suspend()
3071 dev_err(adev->dev, "PSP ring stop failed\n"); in psp_suspend()
3081 struct psp_context *psp = &adev->psp; in psp_resume()
3083 dev_info(adev->dev, "PSP is resuming...\n"); in psp_resume()
3085 if (psp->mem_train_ctx.enable_mem_training) { in psp_resume()
3088 dev_err(adev->dev, "Failed to process memory training!\n"); in psp_resume()
3093 mutex_lock(&adev->firmware.mutex); in psp_resume()
3105 dev_err(adev->dev, "PSP load asd failed!\n"); in psp_resume()
3111 dev_err(adev->dev, "PSP load RL failed!\n"); in psp_resume()
3115 if (adev->gmc.xgmi.num_physical_nodes > 1) { in psp_resume()
3121 dev_err(psp->adev->dev, in psp_resume()
3125 if (psp->ta_fw) { in psp_resume()
3128 dev_err(psp->adev->dev, in psp_resume()
3133 dev_err(psp->adev->dev, in psp_resume()
3138 dev_err(psp->adev->dev, in psp_resume()
3143 dev_err(psp->adev->dev, in psp_resume()
3148 dev_err(psp->adev->dev, in psp_resume()
3152 mutex_unlock(&adev->firmware.mutex); in psp_resume()
3157 dev_err(adev->dev, "PSP resume failed\n"); in psp_resume()
3158 mutex_unlock(&adev->firmware.mutex); in psp_resume()
3166 if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) in psp_gpu_reset()
3169 mutex_lock(&adev->psp.mutex); in psp_gpu_reset()
3170 ret = psp_mode1_reset(&adev->psp); in psp_gpu_reset()
3171 mutex_unlock(&adev->psp.mutex); in psp_gpu_reset()
3181 cmd->cmd_id = GFX_CMD_ID_AUTOLOAD_RLC; in psp_rlc_autoload_start()
3184 psp->fence_buf_mc_addr); in psp_rlc_autoload_start()
3198 struct psp_ring *ring = &psp->km_ring; in psp_ring_cmd_submit()
3199 struct psp_gfx_rb_frame *ring_buffer_start = ring->ring_mem; in psp_ring_cmd_submit()
3201 ring->ring_size / sizeof(struct psp_gfx_rb_frame) - 1; in psp_ring_cmd_submit()
3202 struct amdgpu_device *adev = psp->adev; in psp_ring_cmd_submit()
3203 uint32_t ring_size_dw = ring->ring_size / 4; in psp_ring_cmd_submit()
3218 dev_err(adev->dev, in psp_ring_cmd_submit()
3221 dev_err(adev->dev, in psp_ring_cmd_submit()
3223 return -EINVAL; in psp_ring_cmd_submit()
3230 write_frame->cmd_buf_addr_hi = upper_32_bits(cmd_buf_mc_addr); in psp_ring_cmd_submit()
3231 write_frame->cmd_buf_addr_lo = lower_32_bits(cmd_buf_mc_addr); in psp_ring_cmd_submit()
3232 write_frame->fence_addr_hi = upper_32_bits(fence_mc_addr); in psp_ring_cmd_submit()
3233 write_frame->fence_addr_lo = lower_32_bits(fence_mc_addr); in psp_ring_cmd_submit()
3234 write_frame->fence_value = index; in psp_ring_cmd_submit()
3245 struct amdgpu_device *adev = psp->adev; in psp_init_asd_microcode()
3249 err = amdgpu_ucode_request(adev, &adev->psp.asd_fw, "amdgpu/%s_asd.bin", chip_name); in psp_init_asd_microcode()
3253 asd_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data; in psp_init_asd_microcode()
3254 adev->psp.asd_context.bin_desc.fw_version = le32_to_cpu(asd_hdr->header.ucode_version); in psp_init_asd_microcode()
3255 adev->psp.asd_context.bin_desc.feature_version = le32_to_cpu(asd_hdr->sos.fw_version); in psp_init_asd_microcode()
3256 adev->psp.asd_context.bin_desc.size_bytes = le32_to_cpu(asd_hdr->header.ucode_size_bytes); in psp_init_asd_microcode()
3257 adev->psp.asd_context.bin_desc.start_addr = (uint8_t *)asd_hdr + in psp_init_asd_microcode()
3258 le32_to_cpu(asd_hdr->header.ucode_array_offset_bytes); in psp_init_asd_microcode()
3261 amdgpu_ucode_release(&adev->psp.asd_fw); in psp_init_asd_microcode()
3267 struct amdgpu_device *adev = psp->adev; in psp_init_toc_microcode()
3271 err = amdgpu_ucode_request(adev, &adev->psp.toc_fw, "amdgpu/%s_toc.bin", chip_name); in psp_init_toc_microcode()
3275 toc_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.toc_fw->data; in psp_init_toc_microcode()
3276 adev->psp.toc.fw_version = le32_to_cpu(toc_hdr->header.ucode_version); in psp_init_toc_microcode()
3277 adev->psp.toc.feature_version = le32_to_cpu(toc_hdr->sos.fw_version); in psp_init_toc_microcode()
3278 adev->psp.toc.size_bytes = le32_to_cpu(toc_hdr->header.ucode_size_bytes); in psp_init_toc_microcode()
3279 adev->psp.toc.start_addr = (uint8_t *)toc_hdr + in psp_init_toc_microcode()
3280 le32_to_cpu(toc_hdr->header.ucode_array_offset_bytes); in psp_init_toc_microcode()
3283 amdgpu_ucode_release(&adev->psp.toc_fw); in psp_init_toc_microcode()
3294 return -EINVAL; in parse_sos_bin_descriptor()
3297 le32_to_cpu(desc->offset_bytes) + in parse_sos_bin_descriptor()
3298 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in parse_sos_bin_descriptor()
3300 switch (desc->fw_type) { in parse_sos_bin_descriptor()
3302 psp->sos.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3303 psp->sos.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3304 psp->sos.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3305 psp->sos.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3308 psp->sys.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3309 psp->sys.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3310 psp->sys.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3311 psp->sys.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3314 psp->kdb.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3315 psp->kdb.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3316 psp->kdb.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3317 psp->kdb.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3320 psp->toc.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3321 psp->toc.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3322 psp->toc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3323 psp->toc.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3326 psp->spl.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3327 psp->spl.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3328 psp->spl.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3329 psp->spl.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3332 psp->rl.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3333 psp->rl.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3334 psp->rl.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3335 psp->rl.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3338 psp->soc_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3339 psp->soc_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3340 psp->soc_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3341 psp->soc_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3344 psp->intf_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3345 psp->intf_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3346 psp->intf_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3347 psp->intf_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3350 psp->dbg_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3351 psp->dbg_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3352 psp->dbg_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3353 psp->dbg_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3356 psp->ras_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3357 psp->ras_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3358 psp->ras_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3359 psp->ras_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3362 psp->ipkeymgr_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3363 psp->ipkeymgr_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3364 psp->ipkeymgr_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3365 psp->ipkeymgr_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3368 dev_warn(psp->adev->dev, "Unsupported PSP FW type: %d\n", desc->fw_type); in parse_sos_bin_descriptor()
3381 sos_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; in psp_init_sos_base_fw()
3383 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_base_fw()
3385 if (adev->gmc.xgmi.connected_to_cpu || in psp_init_sos_base_fw()
3387 adev->psp.sos.fw_version = le32_to_cpu(sos_hdr->header.ucode_version); in psp_init_sos_base_fw()
3388 adev->psp.sos.feature_version = le32_to_cpu(sos_hdr->sos.fw_version); in psp_init_sos_base_fw()
3390 adev->psp.sys.size_bytes = le32_to_cpu(sos_hdr->sos.offset_bytes); in psp_init_sos_base_fw()
3391 adev->psp.sys.start_addr = ucode_array_start_addr; in psp_init_sos_base_fw()
3393 adev->psp.sos.size_bytes = le32_to_cpu(sos_hdr->sos.size_bytes); in psp_init_sos_base_fw()
3394 adev->psp.sos.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3395 le32_to_cpu(sos_hdr->sos.offset_bytes); in psp_init_sos_base_fw()
3398 sos_hdr_v1_3 = (const struct psp_firmware_header_v1_3 *)adev->psp.sos_fw->data; in psp_init_sos_base_fw()
3400 adev->psp.sos.fw_version = le32_to_cpu(sos_hdr_v1_3->sos_aux.fw_version); in psp_init_sos_base_fw()
3401 adev->psp.sos.feature_version = le32_to_cpu(sos_hdr_v1_3->sos_aux.fw_version); in psp_init_sos_base_fw()
3403 adev->psp.sys.size_bytes = le32_to_cpu(sos_hdr_v1_3->sys_drv_aux.size_bytes); in psp_init_sos_base_fw()
3404 adev->psp.sys.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3405 le32_to_cpu(sos_hdr_v1_3->sys_drv_aux.offset_bytes); in psp_init_sos_base_fw()
3407 adev->psp.sos.size_bytes = le32_to_cpu(sos_hdr_v1_3->sos_aux.size_bytes); in psp_init_sos_base_fw()
3408 adev->psp.sos.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3409 le32_to_cpu(sos_hdr_v1_3->sos_aux.offset_bytes); in psp_init_sos_base_fw()
3412 if ((adev->psp.sys.size_bytes == 0) || (adev->psp.sos.size_bytes == 0)) { in psp_init_sos_base_fw()
3413 dev_warn(adev->dev, "PSP SOS FW not available"); in psp_init_sos_base_fw()
3414 return -EINVAL; in psp_init_sos_base_fw()
3422 struct amdgpu_device *adev = psp->adev; in psp_init_sos_microcode()
3434 err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, "amdgpu/%s_sos.bin", chip_name); in psp_init_sos_microcode()
3438 sos_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3440 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_microcode()
3441 amdgpu_ucode_print_psp_hdr(&sos_hdr->header); in psp_init_sos_microcode()
3443 switch (sos_hdr->header.header_version_major) { in psp_init_sos_microcode()
3444 case 1: in psp_init_sos_microcode()
3449 if (sos_hdr->header.header_version_minor == 1) { in psp_init_sos_microcode()
3450 sos_hdr_v1_1 = (const struct psp_firmware_header_v1_1 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3451 adev->psp.toc.size_bytes = le32_to_cpu(sos_hdr_v1_1->toc.size_bytes); in psp_init_sos_microcode()
3452 adev->psp.toc.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3453 le32_to_cpu(sos_hdr_v1_1->toc.offset_bytes); in psp_init_sos_microcode()
3454 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_1->kdb.size_bytes); in psp_init_sos_microcode()
3455 adev->psp.kdb.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3456 le32_to_cpu(sos_hdr_v1_1->kdb.offset_bytes); in psp_init_sos_microcode()
3458 if (sos_hdr->header.header_version_minor == 2) { in psp_init_sos_microcode()
3459 sos_hdr_v1_2 = (const struct psp_firmware_header_v1_2 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3460 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_2->kdb.size_bytes); in psp_init_sos_microcode()
3461 adev->psp.kdb.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3462 le32_to_cpu(sos_hdr_v1_2->kdb.offset_bytes); in psp_init_sos_microcode()
3464 if (sos_hdr->header.header_version_minor == 3) { in psp_init_sos_microcode()
3465 sos_hdr_v1_3 = (const struct psp_firmware_header_v1_3 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3466 adev->psp.toc.size_bytes = le32_to_cpu(sos_hdr_v1_3->v1_1.toc.size_bytes); in psp_init_sos_microcode()
3467 adev->psp.toc.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3468 le32_to_cpu(sos_hdr_v1_3->v1_1.toc.offset_bytes); in psp_init_sos_microcode()
3469 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_3->v1_1.kdb.size_bytes); in psp_init_sos_microcode()
3470 adev->psp.kdb.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3471 le32_to_cpu(sos_hdr_v1_3->v1_1.kdb.offset_bytes); in psp_init_sos_microcode()
3472 adev->psp.spl.size_bytes = le32_to_cpu(sos_hdr_v1_3->spl.size_bytes); in psp_init_sos_microcode()
3473 adev->psp.spl.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3474 le32_to_cpu(sos_hdr_v1_3->spl.offset_bytes); in psp_init_sos_microcode()
3475 adev->psp.rl.size_bytes = le32_to_cpu(sos_hdr_v1_3->rl.size_bytes); in psp_init_sos_microcode()
3476 adev->psp.rl.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3477 le32_to_cpu(sos_hdr_v1_3->rl.offset_bytes); in psp_init_sos_microcode()
3481 sos_hdr_v2_0 = (const struct psp_firmware_header_v2_0 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3483 fw_bin_count = le32_to_cpu(sos_hdr_v2_0->psp_fw_bin_count); in psp_init_sos_microcode()
3486 dev_err(adev->dev, "packed SOS count exceeds maximum limit\n"); in psp_init_sos_microcode()
3487 err = -EINVAL; in psp_init_sos_microcode()
3491 if (sos_hdr_v2_0->header.header_version_minor == 1) { in psp_init_sos_microcode()
3492 sos_hdr_v2_1 = (const struct psp_firmware_header_v2_1 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3494 fw_bin = sos_hdr_v2_1->psp_fw_bin; in psp_init_sos_microcode()
3497 start_index = le32_to_cpu(sos_hdr_v2_1->psp_aux_fw_bin_index); in psp_init_sos_microcode()
3499 fw_bin_count -= le32_to_cpu(sos_hdr_v2_1->psp_aux_fw_bin_index); in psp_init_sos_microcode()
3502 fw_bin = sos_hdr_v2_0->psp_fw_bin; in psp_init_sos_microcode()
3513 dev_err(adev->dev, in psp_init_sos_microcode()
3515 err = -EINVAL; in psp_init_sos_microcode()
3521 amdgpu_ucode_release(&adev->psp.sos_fw); in psp_init_sos_microcode()
3533 return -EINVAL; in parse_ta_bin_descriptor()
3536 le32_to_cpu(desc->offset_bytes) + in parse_ta_bin_descriptor()
3537 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_bin_descriptor()
3539 switch (desc->fw_type) { in parse_ta_bin_descriptor()
3541 psp->asd_context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3542 psp->asd_context.bin_desc.feature_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3543 psp->asd_context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3544 psp->asd_context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3547 psp->xgmi_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3548 psp->xgmi_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3549 psp->xgmi_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3552 psp->ras_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3553 psp->ras_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3554 psp->ras_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3557 psp->hdcp_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3558 psp->hdcp_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3559 psp->hdcp_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3562 psp->dtm_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3563 psp->dtm_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3564 psp->dtm_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3567 psp->rap_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3568 psp->rap_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3569 psp->rap_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3572 psp->securedisplay_context.context.bin_desc.fw_version = in parse_ta_bin_descriptor()
3573 le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3574 psp->securedisplay_context.context.bin_desc.size_bytes = in parse_ta_bin_descriptor()
3575 le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3576 psp->securedisplay_context.context.bin_desc.start_addr = in parse_ta_bin_descriptor()
3580 dev_warn(psp->adev->dev, "Unsupported TA type: %d\n", desc->fw_type); in parse_ta_bin_descriptor()
3590 struct amdgpu_device *adev = psp->adev; in parse_ta_v1_microcode()
3592 ta_hdr = (const struct ta_firmware_header_v1_0 *) adev->psp.ta_fw->data; in parse_ta_v1_microcode()
3594 if (le16_to_cpu(ta_hdr->header.header_version_major) != 1) in parse_ta_v1_microcode()
3595 return -EINVAL; in parse_ta_v1_microcode()
3597 adev->psp.xgmi_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3598 le32_to_cpu(ta_hdr->xgmi.fw_version); in parse_ta_v1_microcode()
3599 adev->psp.xgmi_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3600 le32_to_cpu(ta_hdr->xgmi.size_bytes); in parse_ta_v1_microcode()
3601 adev->psp.xgmi_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3603 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()
3605 adev->psp.ras_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3606 le32_to_cpu(ta_hdr->ras.fw_version); in parse_ta_v1_microcode()
3607 adev->psp.ras_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3608 le32_to_cpu(ta_hdr->ras.size_bytes); in parse_ta_v1_microcode()
3609 adev->psp.ras_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3610 (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3611 le32_to_cpu(ta_hdr->ras.offset_bytes); in parse_ta_v1_microcode()
3613 adev->psp.hdcp_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3614 le32_to_cpu(ta_hdr->hdcp.fw_version); in parse_ta_v1_microcode()
3615 adev->psp.hdcp_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3616 le32_to_cpu(ta_hdr->hdcp.size_bytes); in parse_ta_v1_microcode()
3617 adev->psp.hdcp_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3619 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()
3621 adev->psp.dtm_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3622 le32_to_cpu(ta_hdr->dtm.fw_version); in parse_ta_v1_microcode()
3623 adev->psp.dtm_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3624 le32_to_cpu(ta_hdr->dtm.size_bytes); in parse_ta_v1_microcode()
3625 adev->psp.dtm_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3626 (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3627 le32_to_cpu(ta_hdr->dtm.offset_bytes); in parse_ta_v1_microcode()
3629 adev->psp.securedisplay_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3630 le32_to_cpu(ta_hdr->securedisplay.fw_version); in parse_ta_v1_microcode()
3631 adev->psp.securedisplay_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3632 le32_to_cpu(ta_hdr->securedisplay.size_bytes); in parse_ta_v1_microcode()
3633 adev->psp.securedisplay_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3634 (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3635 le32_to_cpu(ta_hdr->securedisplay.offset_bytes); in parse_ta_v1_microcode()
3637 adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version); in parse_ta_v1_microcode()
3645 struct amdgpu_device *adev = psp->adev; in parse_ta_v2_microcode()
3649 ta_hdr = (const struct ta_firmware_header_v2_0 *)adev->psp.ta_fw->data; in parse_ta_v2_microcode()
3651 if (le16_to_cpu(ta_hdr->header.header_version_major) != 2) in parse_ta_v2_microcode()
3652 return -EINVAL; in parse_ta_v2_microcode()
3654 if (le32_to_cpu(ta_hdr->ta_fw_bin_count) >= UCODE_MAX_PSP_PACKAGING) { in parse_ta_v2_microcode()
3655 dev_err(adev->dev, "packed TA count exceeds maximum limit\n"); in parse_ta_v2_microcode()
3656 return -EINVAL; in parse_ta_v2_microcode()
3659 for (ta_index = 0; ta_index < le32_to_cpu(ta_hdr->ta_fw_bin_count); ta_index++) { in parse_ta_v2_microcode()
3661 &ta_hdr->ta_fw_bin[ta_index], in parse_ta_v2_microcode()
3673 struct amdgpu_device *adev = psp->adev; in psp_init_ta_microcode()
3676 err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, "amdgpu/%s_ta.bin", chip_name); in psp_init_ta_microcode()
3680 hdr = (const struct common_firmware_header *)adev->psp.ta_fw->data; in psp_init_ta_microcode()
3681 switch (le16_to_cpu(hdr->header_version_major)) { in psp_init_ta_microcode()
3682 case 1: in psp_init_ta_microcode()
3689 dev_err(adev->dev, "unsupported TA header version\n"); in psp_init_ta_microcode()
3690 err = -EINVAL; in psp_init_ta_microcode()
3694 amdgpu_ucode_release(&adev->psp.ta_fw); in psp_init_ta_microcode()
3701 struct amdgpu_device *adev = psp->adev; in psp_init_cap_microcode()
3707 dev_err(adev->dev, "cap microcode should only be loaded under SRIOV\n"); in psp_init_cap_microcode()
3708 return -EINVAL; in psp_init_cap_microcode()
3711 err = amdgpu_ucode_request(adev, &adev->psp.cap_fw, "amdgpu/%s_cap.bin", chip_name); in psp_init_cap_microcode()
3713 if (err == -ENODEV) { in psp_init_cap_microcode()
3714 dev_warn(adev->dev, "cap microcode does not exist, skip\n"); in psp_init_cap_microcode()
3718 dev_err(adev->dev, "fail to initialize cap microcode\n"); in psp_init_cap_microcode()
3721 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CAP]; in psp_init_cap_microcode()
3722 info->ucode_id = AMDGPU_UCODE_ID_CAP; in psp_init_cap_microcode()
3723 info->fw = adev->psp.cap_fw; in psp_init_cap_microcode()
3725 adev->psp.cap_fw->data; in psp_init_cap_microcode()
3726 adev->firmware.fw_size += ALIGN( in psp_init_cap_microcode()
3727 le32_to_cpu(cap_hdr_v1_0->header.ucode_size_bytes), PAGE_SIZE); in psp_init_cap_microcode()
3728 adev->psp.cap_fw_version = le32_to_cpu(cap_hdr_v1_0->header.ucode_version); in psp_init_cap_microcode()
3729 adev->psp.cap_feature_version = le32_to_cpu(cap_hdr_v1_0->sos.fw_version); in psp_init_cap_microcode()
3730 adev->psp.cap_ucode_size = le32_to_cpu(cap_hdr_v1_0->header.ucode_size_bytes); in psp_init_cap_microcode()
3735 amdgpu_ucode_release(&adev->psp.cap_fw); in psp_init_cap_microcode()
3760 if (!adev->ip_blocks[AMD_IP_BLOCK_TYPE_PSP].status.late_initialized) { in psp_usbc_pd_fw_sysfs_read()
3761 dev_info(adev->dev, "PSP block is not ready yet\n."); in psp_usbc_pd_fw_sysfs_read()
3762 return -EBUSY; in psp_usbc_pd_fw_sysfs_read()
3765 mutex_lock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_read()
3766 ret = psp_read_usbc_pd_fw(&adev->psp, &fw_ver); in psp_usbc_pd_fw_sysfs_read()
3767 mutex_unlock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_read()
3770 dev_err(adev->dev, "Failed to read USBC PD FW, err = %d\n", ret); in psp_usbc_pd_fw_sysfs_read()
3790 if (!adev->ip_blocks[AMD_IP_BLOCK_TYPE_PSP].status.late_initialized) { in psp_usbc_pd_fw_sysfs_write()
3791 dev_err(adev->dev, "PSP block is not ready yet."); in psp_usbc_pd_fw_sysfs_write()
3792 return -EBUSY; in psp_usbc_pd_fw_sysfs_write()
3796 return -ENODEV; in psp_usbc_pd_fw_sysfs_write()
3802 /* LFB address which is aligned to 1MB boundary per PSP request */ in psp_usbc_pd_fw_sysfs_write()
3803 ret = amdgpu_bo_create_kernel(adev, usbc_pd_fw->size, 0x100000, in psp_usbc_pd_fw_sysfs_write()
3811 memcpy_toio(fw_pri_cpu_addr, usbc_pd_fw->data, usbc_pd_fw->size); in psp_usbc_pd_fw_sysfs_write()
3813 mutex_lock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_write()
3814 ret = psp_load_usbc_pd_fw(&adev->psp, fw_pri_mc_addr); in psp_usbc_pd_fw_sysfs_write()
3815 mutex_unlock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_write()
3823 dev_err(adev->dev, "Failed to load USBC PD FW, err = %d", ret); in psp_usbc_pd_fw_sysfs_write()
3835 if (!drm_dev_enter(adev_to_drm(psp->adev), &idx)) in psp_copy_fw()
3838 memset(psp->fw_pri_buf, 0, PSP_1_MEG); in psp_copy_fw()
3839 memcpy(psp->fw_pri_buf, start_addr, bin_size); in psp_copy_fw()
3846 * Reading from this file will retrieve the USB-C PD firmware version. Writing to
3866 adev->psp.vbflash_done = false; in amdgpu_psp_vbflash_write()
3869 if (adev->psp.vbflash_image_size > AMD_VBIOS_FILE_MAX_SIZE_B) { in amdgpu_psp_vbflash_write()
3870 dev_err(adev->dev, "File size cannot exceed %u\n", AMD_VBIOS_FILE_MAX_SIZE_B); in amdgpu_psp_vbflash_write()
3871 kvfree(adev->psp.vbflash_tmp_buf); in amdgpu_psp_vbflash_write()
3872 adev->psp.vbflash_tmp_buf = NULL; in amdgpu_psp_vbflash_write()
3873 adev->psp.vbflash_image_size = 0; in amdgpu_psp_vbflash_write()
3874 return -ENOMEM; in amdgpu_psp_vbflash_write()
3878 if (!adev->psp.vbflash_tmp_buf) { in amdgpu_psp_vbflash_write()
3879 adev->psp.vbflash_tmp_buf = kvmalloc(AMD_VBIOS_FILE_MAX_SIZE_B, GFP_KERNEL); in amdgpu_psp_vbflash_write()
3880 if (!adev->psp.vbflash_tmp_buf) in amdgpu_psp_vbflash_write()
3881 return -ENOMEM; in amdgpu_psp_vbflash_write()
3884 mutex_lock(&adev->psp.mutex); in amdgpu_psp_vbflash_write()
3885 memcpy(adev->psp.vbflash_tmp_buf + pos, buffer, count); in amdgpu_psp_vbflash_write()
3886 adev->psp.vbflash_image_size += count; in amdgpu_psp_vbflash_write()
3887 mutex_unlock(&adev->psp.mutex); in amdgpu_psp_vbflash_write()
3889 dev_dbg(adev->dev, "IFWI staged for update\n"); in amdgpu_psp_vbflash_write()
3906 if (adev->psp.vbflash_image_size == 0) in amdgpu_psp_vbflash_read()
3907 return -EINVAL; in amdgpu_psp_vbflash_read()
3909 dev_dbg(adev->dev, "PSP IFWI flash process initiated\n"); in amdgpu_psp_vbflash_read()
3911 ret = amdgpu_bo_create_kernel(adev, adev->psp.vbflash_image_size, in amdgpu_psp_vbflash_read()
3920 memcpy_toio(fw_pri_cpu_addr, adev->psp.vbflash_tmp_buf, adev->psp.vbflash_image_size); in amdgpu_psp_vbflash_read()
3922 mutex_lock(&adev->psp.mutex); in amdgpu_psp_vbflash_read()
3923 ret = psp_update_spirom(&adev->psp, fw_pri_mc_addr); in amdgpu_psp_vbflash_read()
3924 mutex_unlock(&adev->psp.mutex); in amdgpu_psp_vbflash_read()
3929 kvfree(adev->psp.vbflash_tmp_buf); in amdgpu_psp_vbflash_read()
3930 adev->psp.vbflash_tmp_buf = NULL; in amdgpu_psp_vbflash_read()
3931 adev->psp.vbflash_image_size = 0; in amdgpu_psp_vbflash_read()
3934 dev_err(adev->dev, "Failed to load IFWI, err = %d\n", ret); in amdgpu_psp_vbflash_read()
3938 dev_dbg(adev->dev, "PSP IFWI flash process done\n"); in amdgpu_psp_vbflash_read()
3958 * 1: IFWI flash complete.
3968 vbflash_status = psp_vbflash_status(&adev->psp); in amdgpu_psp_vbflash_status()
3969 if (!adev->psp.vbflash_done) in amdgpu_psp_vbflash_status()
3971 else if (adev->psp.vbflash_done && !(vbflash_status & 0x80000000)) in amdgpu_psp_vbflash_status()
3972 vbflash_status = 1; in amdgpu_psp_vbflash_status()
3996 return adev->psp.sup_pd_fw_up ? 0660 : 0; in amdgpu_flash_attr_is_visible()
3998 return adev->psp.sup_ifwi_up ? 0440 : 0; in amdgpu_flash_attr_is_visible()
4009 return adev->psp.sup_ifwi_up ? 0660 : 0; in amdgpu_bin_flash_attr_is_visible()
4040 .minor = 1,