1 // SPDX-License-Identifier: GPL-2.0-only
3  * GPIO driver for the ACCES PCIe-IDIO-24 family
6  * This driver supports the following ACCES devices: PCIe-IDIO-24,
7  * PCIe-IDI-24, PCIe-IDO-24, and PCIe-IDIO-12.
43  *  18: DMA Channel 0 Interrupt Enable
44  *  19: DMA Channel 1 Interrupt Enable
46  *  21: DMA Channel 0 Interrupt Active
47  *  22: DMA Channel 1 Interrupt Active
48  *  23: Built-In Self-Test (BIST) Interrupt Active
50  *  25: DMA Channel 0 was the Bus Master during a Master or Target Abort
51  *  26: DMA Channel 1 was the Bus Master during a Master or Target Abort
53  *  28: PCI Bus wrote data to LCS_MBOX0
54  *  29: PCI Bus wrote data to LCS_MBOX1
55  *  30: PCI Bus wrote data to LCS_MBOX2
56  *  31: PCI Bus wrote data to LCS_MBOX3
133 	IDIO_24_IIN_IRQ(0), IDIO_24_IIN_IRQ(1), IDIO_24_IIN_IRQ(2), /* IIN 0-2 */
134 	IDIO_24_IIN_IRQ(3), IDIO_24_IIN_IRQ(4), IDIO_24_IIN_IRQ(5), /* IIN 3-5 */
135 	IDIO_24_IIN_IRQ(6), IDIO_24_IIN_IRQ(7), IDIO_24_IIN_IRQ(8), /* IIN 6-8 */
136 	IDIO_24_IIN_IRQ(9), IDIO_24_IIN_IRQ(10), IDIO_24_IIN_IRQ(11), /* IIN 9-11 */
137 	IDIO_24_IIN_IRQ(12), IDIO_24_IIN_IRQ(13), IDIO_24_IIN_IRQ(14), /* IIN 12-14 */
138 	IDIO_24_IIN_IRQ(15), IDIO_24_IIN_IRQ(16), IDIO_24_IIN_IRQ(17), /* IIN 15-17 */
139 	IDIO_24_IIN_IRQ(18), IDIO_24_IIN_IRQ(19), IDIO_24_IIN_IRQ(20), /* IIN 18-20 */
140 	IDIO_24_IIN_IRQ(21), IDIO_24_IIN_IRQ(22), IDIO_24_IIN_IRQ(23), /* IIN 21-23 */
141 	IDIO_24_TTL_IRQ(0), IDIO_24_TTL_IRQ(1), IDIO_24_TTL_IRQ(2), /* TTL 0-2 */
142 	IDIO_24_TTL_IRQ(3), IDIO_24_TTL_IRQ(4), IDIO_24_TTL_IRQ(5), /* TTL 3-5 */
143 	IDIO_24_TTL_IRQ(6), IDIO_24_TTL_IRQ(7), /* TTL 6-7 */
147  * struct idio_24_gpio - GPIO device private data structure
148  * @map:	regmap for the device
149  * @lock:	synchronization lock to prevent I/O race conditions
153 	struct regmap *map;  member
166 	raw_spin_lock(&idio24gpio->lock);  in idio_24_handle_mask_sync()
168 	/* if all are masked, then disable interrupts, else set to type */  in idio_24_handle_mask_sync()
169 	type = (mask_buf == mask_buf_def) ? ~type_mask : idio24gpio->irq_type;  in idio_24_handle_mask_sync()
171 	ret = regmap_update_bits(idio24gpio->map, IDIO_24_COS_ENABLE, type_mask, type);  in idio_24_handle_mask_sync()
173 	raw_spin_unlock(&idio24gpio->lock);  in idio_24_handle_mask_sync()
182 	const unsigned int offset = irq_data->reg_offset;  in idio_24_set_type_config()
202 		return -EINVAL;  in idio_24_set_type_config()
205 	raw_spin_lock(&idio24gpio->lock);  in idio_24_set_type_config()
208 	idio24gpio->irq_type = (idio24gpio->irq_type & ~mask) | (new & mask);  in idio_24_set_type_config()
210 	ret = regmap_read(idio24gpio->map, IDIO_24_COS_ENABLE, &cos_enable);  in idio_24_set_type_config()
216 		ret = regmap_update_bits(idio24gpio->map, IDIO_24_COS_ENABLE, mask,  in idio_24_set_type_config()
217 					 idio24gpio->irq_type);  in idio_24_set_type_config()
223 	raw_spin_unlock(&idio24gpio->lock);  in idio_24_set_type_config()
233 	const unsigned int in_stride = (offset - 24) / IDIO_24_NGPIO_PER_REG;  in idio_24_reg_mask_xlate()
234 	struct regmap *const map = gpio_regmap_get_drvdata(gpio);  in idio_24_reg_mask_xlate()  local
254 		err = regmap_read(map, IDIO_24_CONTROL_REG, &ctrl_reg);  in idio_24_reg_mask_xlate()
270 			return -ENOTSUPP;  in idio_24_reg_mask_xlate()
277 		return -EINVAL;  in idio_24_reg_mask_xlate()
294 	struct device *const dev = &pdev->dev;  in idio_24_probe()
309 		dev_err(dev, "Failed to enable PCI device (%d)\n", err);  in idio_24_probe()
315 		dev_err(dev, "Unable to map PCI I/O addresses (%d)\n", err);  in idio_24_probe()
325 				     "Unable to initialize PEX8311 register map\n");  in idio_24_probe()
329 		return -ENOMEM;  in idio_24_probe()
331 	idio24gpio->map = devm_regmap_init_mmio(dev, idio_24_regs, &idio_24_regmap_config);  in idio_24_probe()
332 	if (IS_ERR(idio24gpio->map))  in idio_24_probe()
333 		return dev_err_probe(dev, PTR_ERR(idio24gpio->map),  in idio_24_probe()
334 				     "Unable to initialize register map\n");  in idio_24_probe()
336 	raw_spin_lock_init(&idio24gpio->lock);  in idio_24_probe()
338 	/* Initialize all IRQ type configuration to IRQ_TYPE_EDGE_BOTH */  in idio_24_probe()
339 	idio24gpio->irq_type = GENMASK(7, 0);  in idio_24_probe()
343 		return -ENOMEM;  in idio_24_probe()
345 	chip->name = name;  in idio_24_probe()
346 	chip->status_base = IDIO_24_COS_STATUS_BASE;  in idio_24_probe()
347 	chip->mask_base = IDIO_24_COS_ENABLE;  in idio_24_probe()
348 	chip->ack_base = IDIO_24_COS_STATUS_BASE;  in idio_24_probe()
349 	chip->num_regs = 4;  in idio_24_probe()
350 	chip->irqs = idio_24_regmap_irqs;  in idio_24_probe()
351 	chip->num_irqs = ARRAY_SIZE(idio_24_regmap_irqs);  in idio_24_probe()
352 	chip->handle_mask_sync = idio_24_handle_mask_sync;  in idio_24_probe()
353 	chip->set_type_config = idio_24_set_type_config;  in idio_24_probe()
354 	chip->irq_drv_data = idio24gpio;  in idio_24_probe()
357 	err = regmap_write(idio24gpio->map, IDIO_24_SOFT_RESET, 0);  in idio_24_probe()
368 	err = devm_regmap_add_irq_chip(dev, idio24gpio->map, pdev->irq, 0, 0, chip, &chip_data);  in idio_24_probe()
373 	gpio_config.regmap = idio24gpio->map;  in idio_24_probe()
382 	gpio_config.drvdata = idio24gpio->map;  in idio_24_probe()
395 	.name = "pcie-idio-24",
403 MODULE_DESCRIPTION("ACCES PCIe-IDIO-24 GPIO driver");