Lines Matching +full:mt7621 +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
8 #include <linux/gpio/driver.h>
43 * struct mtk - state container for
45 * separate gpio-chip each one with its
50 * @gc_map: array of the gpio chips
68 struct gpio_chip *gc = &rg->chip; in mtk_gpio_w32()
71 offset = (rg->bank * GPIO_BANK_STRIDE) + offset; in mtk_gpio_w32()
72 gc->write_reg(mtk->base + offset, val); in mtk_gpio_w32()
78 struct gpio_chip *gc = &rg->chip; in mtk_gpio_r32()
81 offset = (rg->bank * GPIO_BANK_STRIDE) + offset; in mtk_gpio_r32()
82 return gc->read_reg(mtk->base + offset); in mtk_gpio_r32()
97 generic_handle_domain_irq(gc->irq.domain, bit); in mediatek_gpio_irq_handler()
110 int pin = d->hwirq; in mediatek_gpio_irq_unmask()
114 gpiochip_enable_irq(gc, d->hwirq); in mediatek_gpio_irq_unmask()
116 spin_lock_irqsave(&rg->lock, flags); in mediatek_gpio_irq_unmask()
121 mtk_gpio_w32(rg, GPIO_REG_REDGE, rise | (BIT(pin) & rg->rising)); in mediatek_gpio_irq_unmask()
122 mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall | (BIT(pin) & rg->falling)); in mediatek_gpio_irq_unmask()
123 mtk_gpio_w32(rg, GPIO_REG_HLVL, high | (BIT(pin) & rg->hlevel)); in mediatek_gpio_irq_unmask()
124 mtk_gpio_w32(rg, GPIO_REG_LLVL, low | (BIT(pin) & rg->llevel)); in mediatek_gpio_irq_unmask()
125 spin_unlock_irqrestore(&rg->lock, flags); in mediatek_gpio_irq_unmask()
133 int pin = d->hwirq; in mediatek_gpio_irq_mask()
137 spin_lock_irqsave(&rg->lock, flags); in mediatek_gpio_irq_mask()
146 spin_unlock_irqrestore(&rg->lock, flags); in mediatek_gpio_irq_mask()
148 gpiochip_disable_irq(gc, d->hwirq); in mediatek_gpio_irq_mask()
156 int pin = d->hwirq; in mediatek_gpio_irq_type()
160 if ((rg->rising | rg->falling | in mediatek_gpio_irq_type()
161 rg->hlevel | rg->llevel) & mask) in mediatek_gpio_irq_type()
167 rg->rising &= ~mask; in mediatek_gpio_irq_type()
168 rg->falling &= ~mask; in mediatek_gpio_irq_type()
169 rg->hlevel &= ~mask; in mediatek_gpio_irq_type()
170 rg->llevel &= ~mask; in mediatek_gpio_irq_type()
174 rg->rising |= mask; in mediatek_gpio_irq_type()
175 rg->falling |= mask; in mediatek_gpio_irq_type()
178 rg->rising |= mask; in mediatek_gpio_irq_type()
181 rg->falling |= mask; in mediatek_gpio_irq_type()
184 rg->hlevel |= mask; in mediatek_gpio_irq_type()
187 rg->llevel |= mask; in mediatek_gpio_irq_type()
198 int gpio = spec->args[0]; in mediatek_gpio_xlate() local
201 if (rg->bank != gpio / MTK_BANK_WIDTH) in mediatek_gpio_xlate()
202 return -EINVAL; in mediatek_gpio_xlate()
205 *flags = spec->args[1]; in mediatek_gpio_xlate()
207 return gpio % MTK_BANK_WIDTH; in mediatek_gpio_xlate()
211 .name = "mt7621-gpio",
228 rg = &mtk->gc_map[bank]; in mediatek_gpio_bank_probe()
231 spin_lock_init(&rg->lock); in mediatek_gpio_bank_probe()
232 rg->bank = bank; in mediatek_gpio_bank_probe()
234 dat = mtk->base + GPIO_REG_DATA + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
235 set = mtk->base + GPIO_REG_DSET + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
236 ctrl = mtk->base + GPIO_REG_DCLR + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
237 diro = mtk->base + GPIO_REG_CTRL + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
239 ret = bgpio_init(&rg->chip, dev, 4, dat, set, ctrl, diro, NULL, in mediatek_gpio_bank_probe()
246 rg->chip.of_gpio_n_cells = 2; in mediatek_gpio_bank_probe()
247 rg->chip.of_xlate = mediatek_gpio_xlate; in mediatek_gpio_bank_probe()
248 rg->chip.label = devm_kasprintf(dev, GFP_KERNEL, "%s-bank%d", in mediatek_gpio_bank_probe()
250 if (!rg->chip.label) in mediatek_gpio_bank_probe()
251 return -ENOMEM; in mediatek_gpio_bank_probe()
253 rg->chip.offset = bank * MTK_BANK_WIDTH; in mediatek_gpio_bank_probe()
255 if (mtk->gpio_irq) { in mediatek_gpio_bank_probe()
260 * a flow-handler because the irq is shared. in mediatek_gpio_bank_probe()
262 ret = devm_request_irq(dev, mtk->gpio_irq, in mediatek_gpio_bank_probe()
264 rg->chip.label, &rg->chip); in mediatek_gpio_bank_probe()
268 mtk->gpio_irq, ret); in mediatek_gpio_bank_probe()
272 girq = &rg->chip.irq; in mediatek_gpio_bank_probe()
275 girq->parent_handler = NULL; in mediatek_gpio_bank_probe()
276 girq->num_parents = 0; in mediatek_gpio_bank_probe()
277 girq->parents = NULL; in mediatek_gpio_bank_probe()
278 girq->default_type = IRQ_TYPE_NONE; in mediatek_gpio_bank_probe()
279 girq->handler = handle_simple_irq; in mediatek_gpio_bank_probe()
282 ret = devm_gpiochip_add_data(dev, &rg->chip, mtk); in mediatek_gpio_bank_probe()
284 dev_err(dev, "Could not register gpio %d, ret=%d\n", in mediatek_gpio_bank_probe()
285 rg->chip.ngpio, ret); in mediatek_gpio_bank_probe()
292 dev_info(dev, "registering %d gpios\n", rg->chip.ngpio); in mediatek_gpio_bank_probe()
300 struct device *dev = &pdev->dev; in mediatek_gpio_probe()
307 return -ENOMEM; in mediatek_gpio_probe()
309 mtk->base = devm_platform_ioremap_resource(pdev, 0); in mediatek_gpio_probe()
310 if (IS_ERR(mtk->base)) in mediatek_gpio_probe()
311 return PTR_ERR(mtk->base); in mediatek_gpio_probe()
313 mtk->gpio_irq = platform_get_irq(pdev, 0); in mediatek_gpio_probe()
314 if (mtk->gpio_irq < 0) in mediatek_gpio_probe()
315 return mtk->gpio_irq; in mediatek_gpio_probe()
317 mtk->dev = dev; in mediatek_gpio_probe()
330 { .compatible = "mediatek,mt7621-gpio" },