Lines Matching full:gs
130 static int mlxbf2_gpio_lock_acquire(struct mlxbf2_gpio_context *gs) in mlxbf2_gpio_lock_acquire() argument
135 raw_spin_lock(&gs->gc.bgpio_lock); in mlxbf2_gpio_lock_acquire()
143 raw_spin_unlock(&gs->gc.bgpio_lock); in mlxbf2_gpio_lock_acquire()
156 static void mlxbf2_gpio_lock_release(struct mlxbf2_gpio_context *gs) in mlxbf2_gpio_lock_release() argument
157 __releases(&gs->gc.bgpio_lock) in mlxbf2_gpio_lock_release()
161 raw_spin_unlock(&gs->gc.bgpio_lock); in mlxbf2_gpio_lock_release()
186 struct mlxbf2_gpio_context *gs = gpiochip_get_data(chip); in mlxbf2_gpio_direction_input() local
193 ret = mlxbf2_gpio_lock_acquire(gs); in mlxbf2_gpio_direction_input()
197 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE0_CLEAR); in mlxbf2_gpio_direction_input()
198 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE1_CLEAR); in mlxbf2_gpio_direction_input()
200 mlxbf2_gpio_lock_release(gs); in mlxbf2_gpio_direction_input()
213 struct mlxbf2_gpio_context *gs = gpiochip_get_data(chip); in mlxbf2_gpio_direction_output() local
221 ret = mlxbf2_gpio_lock_acquire(gs); in mlxbf2_gpio_direction_output()
225 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE1_CLEAR); in mlxbf2_gpio_direction_output()
226 writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE0_SET); in mlxbf2_gpio_direction_output()
228 mlxbf2_gpio_lock_release(gs); in mlxbf2_gpio_direction_output()
236 struct mlxbf2_gpio_context *gs = gpiochip_get_data(gc); in mlxbf2_gpio_irq_enable() local
242 raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_enable()
243 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); in mlxbf2_gpio_irq_enable()
245 writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); in mlxbf2_gpio_irq_enable()
247 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_enable()
249 writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_enable()
250 raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_enable()
256 struct mlxbf2_gpio_context *gs = gpiochip_get_data(gc); in mlxbf2_gpio_irq_disable() local
261 raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_disable()
262 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_disable()
264 writel(val, gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0); in mlxbf2_gpio_irq_disable()
265 raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_disable()
271 struct mlxbf2_gpio_context *gs = ptr; in mlxbf2_gpio_irq_handler() local
272 struct gpio_chip *gc = &gs->gc; in mlxbf2_gpio_irq_handler()
276 pending = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CAUSE_EVTEN0); in mlxbf2_gpio_irq_handler()
277 writel(pending, gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE); in mlxbf2_gpio_irq_handler()
289 struct mlxbf2_gpio_context *gs = gpiochip_get_data(gc); in mlxbf2_gpio_irq_set_type() local
311 raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_set_type()
313 val = readl(gs->gpio_io + YU_GPIO_CAUSE_FALL_EN); in mlxbf2_gpio_irq_set_type()
315 writel(val, gs->gpio_io + YU_GPIO_CAUSE_FALL_EN); in mlxbf2_gpio_irq_set_type()
319 val = readl(gs->gpio_io + YU_GPIO_CAUSE_RISE_EN); in mlxbf2_gpio_irq_set_type()
321 writel(val, gs->gpio_io + YU_GPIO_CAUSE_RISE_EN); in mlxbf2_gpio_irq_set_type()
323 raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); in mlxbf2_gpio_irq_set_type()
332 struct mlxbf2_gpio_context *gs = gpiochip_get_data(gc); in mlxbf2_gpio_irq_print_chip() local
334 seq_printf(p, dev_name(gs->dev)); in mlxbf2_gpio_irq_print_chip()
350 struct mlxbf2_gpio_context *gs; in mlxbf2_gpio_probe() local
360 gs = devm_kzalloc(dev, sizeof(*gs), GFP_KERNEL); in mlxbf2_gpio_probe()
361 if (!gs) in mlxbf2_gpio_probe()
364 gs->dev = dev; in mlxbf2_gpio_probe()
367 gs->gpio_io = devm_platform_ioremap_resource(pdev, 0); in mlxbf2_gpio_probe()
368 if (IS_ERR(gs->gpio_io)) in mlxbf2_gpio_probe()
369 return PTR_ERR(gs->gpio_io); in mlxbf2_gpio_probe()
380 gc = &gs->gc; in mlxbf2_gpio_probe()
383 gs->gpio_io + YU_GPIO_DATAIN, in mlxbf2_gpio_probe()
384 gs->gpio_io + YU_GPIO_DATASET, in mlxbf2_gpio_probe()
385 gs->gpio_io + YU_GPIO_DATACLEAR, in mlxbf2_gpio_probe()
402 girq = &gs->gc.irq; in mlxbf2_gpio_probe()
416 IRQF_SHARED, name, gs); in mlxbf2_gpio_probe()
423 platform_set_drvdata(pdev, gs); in mlxbf2_gpio_probe()
425 ret = devm_gpiochip_add_data(dev, &gs->gc, gs); in mlxbf2_gpio_probe()
436 struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); in mlxbf2_gpio_suspend() local
438 gs->csave_regs->gpio_mode0 = readl(gs->gpio_io + in mlxbf2_gpio_suspend()
440 gs->csave_regs->gpio_mode1 = readl(gs->gpio_io + in mlxbf2_gpio_suspend()
448 struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); in mlxbf2_gpio_resume() local
450 writel(gs->csave_regs->gpio_mode0, gs->gpio_io + in mlxbf2_gpio_resume()
452 writel(gs->csave_regs->gpio_mode1, gs->gpio_io + in mlxbf2_gpio_resume()