Lines Matching +full:cortex +full:- +full:m4
1 // SPDX-License-Identifier: GPL-2.0
57 u32 val = readl_relaxed(ic->base + LPC18XX_GPIO_PIN_IC_ISEL); in lpc18xx_gpio_pin_ic_isel()
64 writel_relaxed(val, ic->base + LPC18XX_GPIO_PIN_IC_ISEL); in lpc18xx_gpio_pin_ic_isel()
70 writel_relaxed(BIT(pin), ic->base + reg); in lpc18xx_gpio_pin_ic_set()
75 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_mask()
78 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_mask()
81 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_mask()
85 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_mask()
88 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_mask()
95 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_unmask()
98 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_unmask()
101 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_unmask()
105 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_unmask()
108 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_unmask()
115 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_eoi()
118 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_eoi()
121 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_eoi()
124 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_eoi()
131 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_set_type()
133 raw_spin_lock(&ic->lock); in lpc18xx_gpio_pin_ic_set_type()
136 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); in lpc18xx_gpio_pin_ic_set_type()
137 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_set_type()
140 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); in lpc18xx_gpio_pin_ic_set_type()
141 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, in lpc18xx_gpio_pin_ic_set_type()
144 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, false); in lpc18xx_gpio_pin_ic_set_type()
147 raw_spin_unlock(&ic->lock); in lpc18xx_gpio_pin_ic_set_type()
166 struct lpc18xx_gpio_pin_ic *ic = domain->host_data; in lpc18xx_gpio_pin_ic_domain_alloc()
171 return -EINVAL; in lpc18xx_gpio_pin_ic_domain_alloc()
173 hwirq = fwspec->param[0]; in lpc18xx_gpio_pin_ic_domain_alloc()
175 return -EINVAL; in lpc18xx_gpio_pin_ic_domain_alloc()
179 * into edge interrupts 32...39 on parent Cortex-M3/M4 NVIC in lpc18xx_gpio_pin_ic_domain_alloc()
181 parent_fwspec.fwnode = domain->parent->fwnode; in lpc18xx_gpio_pin_ic_domain_alloc()
204 struct device *dev = gc->gpio.parent; in lpc18xx_gpio_pin_ic_probe()
211 parent_node = of_irq_find_parent(dev->of_node); in lpc18xx_gpio_pin_ic_probe()
213 return -ENXIO; in lpc18xx_gpio_pin_ic_probe()
218 return -ENXIO; in lpc18xx_gpio_pin_ic_probe()
222 return -ENOMEM; in lpc18xx_gpio_pin_ic_probe()
224 index = of_property_match_string(dev->of_node, "reg-names", in lpc18xx_gpio_pin_ic_probe()
225 "gpio-pin-ic"); in lpc18xx_gpio_pin_ic_probe()
227 ret = -ENODEV; in lpc18xx_gpio_pin_ic_probe()
231 ret = of_address_to_resource(dev->of_node, index, &res); in lpc18xx_gpio_pin_ic_probe()
235 ic->base = devm_ioremap_resource(dev, &res); in lpc18xx_gpio_pin_ic_probe()
236 if (IS_ERR(ic->base)) { in lpc18xx_gpio_pin_ic_probe()
237 ret = PTR_ERR(ic->base); in lpc18xx_gpio_pin_ic_probe()
241 raw_spin_lock_init(&ic->lock); in lpc18xx_gpio_pin_ic_probe()
243 ic->domain = irq_domain_add_hierarchy(parent_domain, 0, in lpc18xx_gpio_pin_ic_probe()
245 dev->of_node, in lpc18xx_gpio_pin_ic_probe()
248 if (!ic->domain) { in lpc18xx_gpio_pin_ic_probe()
250 ret = -ENODEV; in lpc18xx_gpio_pin_ic_probe()
254 gc->pin_ic = ic; in lpc18xx_gpio_pin_ic_probe()
259 devm_iounmap(dev, ic->base); in lpc18xx_gpio_pin_ic_probe()
269 writeb(value ? 1 : 0, gc->base + offset); in lpc18xx_gpio_set()
275 return !!readb(gc->base + offset); in lpc18xx_gpio_get()
288 spin_lock_irqsave(&gc->lock, flags); in lpc18xx_gpio_direction()
289 dir = readl(gc->base + LPC18XX_REG_DIR(port)); in lpc18xx_gpio_direction()
294 writel(dir, gc->base + LPC18XX_REG_DIR(port)); in lpc18xx_gpio_direction()
295 spin_unlock_irqrestore(&gc->lock, flags); in lpc18xx_gpio_direction()
314 .label = "lpc18xx/43xx-gpio",
327 struct device *dev = &pdev->dev; in lpc18xx_gpio_probe()
334 return -ENOMEM; in lpc18xx_gpio_probe()
336 gc->gpio = lpc18xx_chip; in lpc18xx_gpio_probe()
339 index = of_property_match_string(dev->of_node, "reg-names", "gpio"); in lpc18xx_gpio_probe()
342 gc->base = devm_platform_ioremap_resource(pdev, 0); in lpc18xx_gpio_probe()
346 ret = of_address_to_resource(dev->of_node, index, &res); in lpc18xx_gpio_probe()
350 gc->base = devm_ioremap_resource(dev, &res); in lpc18xx_gpio_probe()
352 if (IS_ERR(gc->base)) in lpc18xx_gpio_probe()
353 return PTR_ERR(gc->base); in lpc18xx_gpio_probe()
361 spin_lock_init(&gc->lock); in lpc18xx_gpio_probe()
363 gc->gpio.parent = dev; in lpc18xx_gpio_probe()
365 ret = devm_gpiochip_add_data(dev, &gc->gpio, gc); in lpc18xx_gpio_probe()
379 if (gc->pin_ic) in lpc18xx_gpio_remove()
380 irq_domain_remove(gc->pin_ic->domain); in lpc18xx_gpio_remove()
384 { .compatible = "nxp,lpc1850-gpio" },
393 .name = "lpc18xx-gpio",