1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/gpio/driver.h>
33 #define HISI_GPIO_DRIVER_NAME	"gpio-hisi"
48 	void __iomem *reg = hisi_gpio->reg_base + off;  in hisi_gpio_read_reg()
58 	void __iomem *reg = hisi_gpio->reg_base + off;  in hisi_gpio_write_reg()
84 		return -ENOTSUPP;  in hisi_gpio_set_config()
139 		return -EINVAL;  in hisi_gpio_irq_set_type()
143 	 * The dual-edge interrupt and other interrupt's registers do not  in hisi_gpio_irq_set_type()
144 	 * take effect at the same time. The registers of the two-edge  in hisi_gpio_irq_set_type()
146 	 * the dual-edge interrupts must be disabled before the configuration  in hisi_gpio_irq_set_type()
183 	unsigned long irq_msk = hisi_gpio_read_reg(&hisi_gpio->chip,  in hisi_gpio_irq_handler()
190 		generic_handle_domain_irq(hisi_gpio->chip.irq.domain,  in hisi_gpio_irq_handler()
196 	.name = "HISI-GPIO",
209 	struct gpio_chip *chip = &hisi_gpio->chip;  in hisi_gpio_init_irq()
210 	struct gpio_irq_chip *girq_chip = &chip->irq;  in hisi_gpio_init_irq()
213 	girq_chip->default_type = IRQ_TYPE_NONE;  in hisi_gpio_init_irq()
214 	girq_chip->num_parents = 1;  in hisi_gpio_init_irq()
215 	girq_chip->parents = &hisi_gpio->irq;  in hisi_gpio_init_irq()
216 	girq_chip->parent_handler = hisi_gpio_irq_handler;  in hisi_gpio_init_irq()
217 	girq_chip->parent_handler_data = hisi_gpio;  in hisi_gpio_init_irq()
219 	/* Clear Mask of GPIO controller combine IRQ */  in hisi_gpio_init_irq()
230 	{ .compatible = "hisilicon,ascend910-gpio", },
245 					     &hisi_gpio->line_num)) {  in hisi_gpio_get_pdata()
249 			hisi_gpio->line_num = HISI_GPIO_LINE_NUM_MAX;  in hisi_gpio_get_pdata()
252 		if (WARN_ON(hisi_gpio->line_num > HISI_GPIO_LINE_NUM_MAX))  in hisi_gpio_get_pdata()
253 			hisi_gpio->line_num = HISI_GPIO_LINE_NUM_MAX;  in hisi_gpio_get_pdata()
255 		hisi_gpio->irq = platform_get_irq(pdev, idx);  in hisi_gpio_get_pdata()
259 			 hisi_gpio->line_num);  in hisi_gpio_get_pdata()
267 	struct device *dev = &pdev->dev;  in hisi_gpio_probe()
273 	 * One GPIO controller own one port currently,  in hisi_gpio_probe()
278 		return -ENODEV;  in hisi_gpio_probe()
282 		return -ENOMEM;  in hisi_gpio_probe()
284 	hisi_gpio->reg_base = devm_platform_ioremap_resource(pdev, 0);  in hisi_gpio_probe()
285 	if (IS_ERR(hisi_gpio->reg_base))  in hisi_gpio_probe()
286 		return PTR_ERR(hisi_gpio->reg_base);  in hisi_gpio_probe()
290 	hisi_gpio->dev = dev;  in hisi_gpio_probe()
292 	ret = bgpio_init(&hisi_gpio->chip, hisi_gpio->dev, 0x4,  in hisi_gpio_probe()
293 			 hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX,  in hisi_gpio_probe()
294 			 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX,  in hisi_gpio_probe()
295 			 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX,  in hisi_gpio_probe()
296 			 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_SET_WX,  in hisi_gpio_probe()
297 			 hisi_gpio->reg_base + HISI_GPIO_SWPORT_DDR_CLR_WX,  in hisi_gpio_probe()
304 	hisi_gpio->chip.set_config = hisi_gpio_set_config;  in hisi_gpio_probe()
305 	hisi_gpio->chip.ngpio = hisi_gpio->line_num;  in hisi_gpio_probe()
306 	hisi_gpio->chip.bgpio_dir_unreadable = 1;  in hisi_gpio_probe()
307 	hisi_gpio->chip.base = -1;  in hisi_gpio_probe()
309 	if (hisi_gpio->irq > 0)  in hisi_gpio_probe()
312 	ret = devm_gpiochip_add_data(dev, &hisi_gpio->chip, hisi_gpio);  in hisi_gpio_probe()
334 MODULE_DESCRIPTION("HiSilicon GPIO controller driver");