Lines Matching +full:input +full:- +full:ngpios
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Emma Mobile GPIO Support - GIO
61 return ioread32(p->base0 + offs); in em_gio_read()
63 return ioread32(p->base1 + (offs - GIO_IDT0)); in em_gio_read()
70 iowrite32(value, p->base0 + offs); in em_gio_write()
72 iowrite32(value, p->base1 + (offs - GIO_IDT0)); in em_gio_write()
94 ret = gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d)); in em_gio_irq_reqres()
96 dev_err(p->gpio_chip.parent, in em_gio_irq_reqres()
108 gpiochip_unlock_as_irq(&p->gpio_chip, irqd_to_hwirq(d)); in em_gio_irq_relres()
131 return -EINVAL; in em_gio_irq_set_type()
141 spin_lock_irqsave(&p->sense_lock, flags); in em_gio_irq_set_type()
162 spin_unlock_irqrestore(&p->sense_lock, flags); in em_gio_irq_set_type()
176 generic_handle_domain_irq(p->irq_domain, offset); in em_gio_irq_handler()
213 __em_gio_set(chip, GIO_OH, offset - 16, value); in em_gio_set()
227 return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset); in em_gio_to_irq()
234 /* Set the GPIO as an input to ensure that the next GPIO request won't in em_gio_free()
243 struct em_gio_priv *p = h->host_data; in em_gio_irq_domain_map()
247 irq_set_chip_data(irq, h->host_data); in em_gio_irq_domain_map()
248 irq_set_chip_and_handler(irq, &p->irq_chip, handle_level_irq); in em_gio_irq_domain_map()
269 struct device *dev = &pdev->dev; in em_gio_probe()
271 unsigned int ngpios; in em_gio_probe() local
276 return -ENOMEM; in em_gio_probe()
278 p->pdev = pdev; in em_gio_probe()
280 spin_lock_init(&p->sense_lock); in em_gio_probe()
290 p->base0 = devm_platform_ioremap_resource(pdev, 0); in em_gio_probe()
291 if (IS_ERR(p->base0)) in em_gio_probe()
292 return PTR_ERR(p->base0); in em_gio_probe()
294 p->base1 = devm_platform_ioremap_resource(pdev, 1); in em_gio_probe()
295 if (IS_ERR(p->base1)) in em_gio_probe()
296 return PTR_ERR(p->base1); in em_gio_probe()
298 if (of_property_read_u32(dev->of_node, "ngpios", &ngpios)) { in em_gio_probe()
299 dev_err(dev, "Missing ngpios OF property\n"); in em_gio_probe()
300 return -EINVAL; in em_gio_probe()
303 gpio_chip = &p->gpio_chip; in em_gio_probe()
304 gpio_chip->direction_input = em_gio_direction_input; in em_gio_probe()
305 gpio_chip->get = em_gio_get; in em_gio_probe()
306 gpio_chip->direction_output = em_gio_direction_output; in em_gio_probe()
307 gpio_chip->set = em_gio_set; in em_gio_probe()
308 gpio_chip->to_irq = em_gio_to_irq; in em_gio_probe()
309 gpio_chip->request = pinctrl_gpio_request; in em_gio_probe()
310 gpio_chip->free = em_gio_free; in em_gio_probe()
311 gpio_chip->label = name; in em_gio_probe()
312 gpio_chip->parent = dev; in em_gio_probe()
313 gpio_chip->owner = THIS_MODULE; in em_gio_probe()
314 gpio_chip->base = -1; in em_gio_probe()
315 gpio_chip->ngpio = ngpios; in em_gio_probe()
317 irq_chip = &p->irq_chip; in em_gio_probe()
318 irq_chip->name = "gpio-em"; in em_gio_probe()
319 irq_chip->irq_mask = em_gio_irq_disable; in em_gio_probe()
320 irq_chip->irq_unmask = em_gio_irq_enable; in em_gio_probe()
321 irq_chip->irq_set_type = em_gio_irq_set_type; in em_gio_probe()
322 irq_chip->irq_request_resources = em_gio_irq_reqres; in em_gio_probe()
323 irq_chip->irq_release_resources = em_gio_irq_relres; in em_gio_probe()
324 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND; in em_gio_probe()
326 p->irq_domain = irq_domain_add_simple(dev->of_node, ngpios, 0, in em_gio_probe()
328 if (!p->irq_domain) { in em_gio_probe()
330 return -ENXIO; in em_gio_probe()
334 p->irq_domain); in em_gio_probe()
340 return -ENOENT; in em_gio_probe()
345 return -ENOENT; in em_gio_probe()
358 { .compatible = "renesas,em-gio", },