1 // SPDX-License-Identifier: GPL-2.0
5  * Copyright (c) 2012 Dmitry Eremin-Solenikov
72 	spinlock_t		lock; /* guards hw registers and orig table */  member
76 static int amd_gpio_request(struct gpio_chip *chip, unsigned offset)  in amd_gpio_request()  argument
80 	agp->orig[offset] = ioread8(agp->pm + AMD_REG_GPIO(offset)) &  in amd_gpio_request()
83 	dev_dbg(&agp->pdev->dev, "Requested gpio %d, data %x\n", offset, agp->orig[offset]);  in amd_gpio_request()
88 static void amd_gpio_free(struct gpio_chip *chip, unsigned offset)  in amd_gpio_free()  argument
92 	dev_dbg(&agp->pdev->dev, "Freed gpio %d, data %x\n", offset, agp->orig[offset]);  in amd_gpio_free()
94 	iowrite8(agp->orig[offset], agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_free()
97 static void amd_gpio_set(struct gpio_chip *chip, unsigned offset, int value)  in amd_gpio_set()  argument
103 	spin_lock_irqsave(&agp->lock, flags);  in amd_gpio_set()
104 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_set()
106 	iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_set()
107 	spin_unlock_irqrestore(&agp->lock, flags);  in amd_gpio_set()
109 	dev_dbg(&agp->pdev->dev, "Setting gpio %d, value %d, reg=%02x\n", offset, !!value, temp);  in amd_gpio_set()
112 static int amd_gpio_get(struct gpio_chip *chip, unsigned offset)  in amd_gpio_get()  argument
117 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_get()
119 	dev_dbg(&agp->pdev->dev, "Getting gpio %d, reg=%02x\n", offset, temp);  in amd_gpio_get()
124 static int amd_gpio_dirout(struct gpio_chip *chip, unsigned offset, int value)  in amd_gpio_dirout()  argument
130 	spin_lock_irqsave(&agp->lock, flags);  in amd_gpio_dirout()
131 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirout()
133 	iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirout()
134 	spin_unlock_irqrestore(&agp->lock, flags);  in amd_gpio_dirout()
136 	dev_dbg(&agp->pdev->dev, "Dirout gpio %d, value %d, reg=%02x\n", offset, !!value, temp);  in amd_gpio_dirout()
141 static int amd_gpio_dirin(struct gpio_chip *chip, unsigned offset)  in amd_gpio_dirin()  argument
147 	spin_lock_irqsave(&agp->lock, flags);  in amd_gpio_dirin()
148 	temp = ioread8(agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirin()
150 	iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));  in amd_gpio_dirin()
151 	spin_unlock_irqrestore(&agp->lock, flags);  in amd_gpio_dirin()
153 	dev_dbg(&agp->pdev->dev, "Dirin gpio %d, reg=%02x\n", offset, temp);  in amd_gpio_dirin()
162 		.base		= -1,
175 	int err = -ENODEV;  in amd_gpio_init()
179 	/* We look for our device - AMD South Bridge  in amd_gpio_init()
202 	err = -EIO;  in amd_gpio_init()
206 	if (!devm_request_region(&pdev->dev, gp.pmbase + PMBASE_OFFSET,  in amd_gpio_init()
208 		dev_err(&pdev->dev, "AMD GPIO region 0x%x already in use!\n",  in amd_gpio_init()
210 		err = -EBUSY;  in amd_gpio_init()
215 		dev_err(&pdev->dev, "Couldn't map io port into io memory\n");  in amd_gpio_init()
216 		err = -ENOMEM;  in amd_gpio_init()
220 	gp.chip.parent = &pdev->dev;  in amd_gpio_init()
222 	spin_lock_init(&gp.lock);  in amd_gpio_init()
224 	dev_info(&pdev->dev, "AMD-8111 GPIO detected\n");  in amd_gpio_init()
227 		dev_err(&pdev->dev, "GPIO registering failed (%d)\n", err);  in amd_gpio_init()