Lines Matching +full:0 +full:xb

32 module_param_hw_array(base, uint, ioport, &num_dio48e, 0);
37 module_param_hw_array(irq, uint, irq, &num_irq, 0);
40 #define DIO48E_ENABLE_INTERRUPT 0xB
42 #define DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING 0xD
44 #define DIO48E_CLEAR_INTERRUPT 0xF
49 regmap_reg_range(0x0, 0x9), regmap_reg_range(0xB, 0xB),
50 regmap_reg_range(0xD, 0xD), regmap_reg_range(0xF, 0xF),
53 regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x6),
54 regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
55 regmap_reg_range(0xF, 0xF),
58 i8255_volatile_regmap_range(0x0), i8255_volatile_regmap_range(0x4),
59 regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
60 regmap_reg_range(0xF, 0xF),
63 regmap_reg_range(0xB, 0xB), regmap_reg_range(0xD, 0xD),
64 regmap_reg_range(0xF, 0xF),
84 regmap_reg_range(0x0, 0x3),
87 regmap_reg_range(0x0, 0x2),
106 DIO48E_REGMAP_IRQ(0), DIO48E_REGMAP_IRQ(1),
149 iowrite8(0x00, dio48egpio->regs + DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING); in pit_regmap_lock()
173 return 0; in dio48e_handle_mask_sync()
180 err = regmap_write(dio48egpio->map, DIO48E_CLEAR_INTERRUPT, 0x00); in dio48e_handle_mask_sync()
183 return regmap_write(dio48egpio->map, DIO48E_ENABLE_INTERRUPT, 0x00); in dio48e_handle_mask_sync()
190 return 0; in dio48e_handle_mask_sync()
195 "PPI Group 0 Port A 0", "PPI Group 0 Port A 1", "PPI Group 0 Port A 2",
196 "PPI Group 0 Port A 3", "PPI Group 0 Port A 4", "PPI Group 0 Port A 5",
197 "PPI Group 0 Port A 6", "PPI Group 0 Port A 7", "PPI Group 0 Port B 0",
198 "PPI Group 0 Port B 1", "PPI Group 0 Port B 2", "PPI Group 0 Port B 3",
199 "PPI Group 0 Port B 4", "PPI Group 0 Port B 5", "PPI Group 0 Port B 6",
200 "PPI Group 0 Port B 7", "PPI Group 0 Port C 0", "PPI Group 0 Port C 1",
201 "PPI Group 0 Port C 2", "PPI Group 0 Port C 3", "PPI Group 0 Port C 4",
202 "PPI Group 0 Port C 5", "PPI Group 0 Port C 6", "PPI Group 0 Port C 7",
203 "PPI Group 1 Port A 0", "PPI Group 1 Port A 1", "PPI Group 1 Port A 2",
205 "PPI Group 1 Port A 6", "PPI Group 1 Port A 7", "PPI Group 1 Port B 0",
208 "PPI Group 1 Port B 7", "PPI Group 1 Port C 0", "PPI Group 1 Port C 1",
236 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", in dio48e_probe()
312 err = devm_regmap_add_irq_chip(dev, map, irq[id], 0, 0, chip, &chip_data); in dio48e_probe()