Lines Matching +full:axi +full:- +full:config

1 # SPDX-License-Identifier: GPL-2.0-only
15 config FPGA_MGR_SOCFPGA
21 config FPGA_MGR_SOCFPGA_A10
28 config ALTERA_PR_IP_CORE
33 config ALTERA_PR_IP_CORE_PLAT
40 config FPGA_MGR_ALTERA_PS_SPI
48 config FPGA_MGR_ALTERA_CVP
52 	  FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V,
55 config FPGA_MGR_ZYNQ_FPGA
61 config FPGA_MGR_STRATIX10_SOC
67 config FPGA_MGR_XILINX_CORE
70 config FPGA_MGR_XILINX_SELECTMAP
78 config FPGA_MGR_XILINX_SPI
86 config FPGA_MGR_ICE40_SPI
92 config FPGA_MGR_MACHXO2_SPI
99 config FPGA_MGR_TS73XX
100 	tristate "Technologic Systems TS-73xx SBC FPGA Manager"
104 	  present on the TS-73xx SBC boards.
106 config FPGA_BRIDGE
112 config SOCFPGA_FPGA_BRIDGE
119 config ALTERA_FREEZE_BRIDGE
128 config XILINX_PR_DECOUPLER
138 	  The Dynamic Function eXchange AXI shutdown manager prevents
139 	  AXI traffic from passing through the bridge. The controller
140 	  safely handles AXI4MM and AXI4-Lite interfaces on a
143 	  occur if AXI transactions are interrupted by DFX.
145 config FPGA_REGION
153 config OF_FPGA_REGION
160 config FPGA_DFL
173 	  Select this option to enable common support for Field-Programmable
177 config FPGA_DFL_FME
187 config FPGA_DFL_FME_MGR
193 config FPGA_DFL_FME_BRIDGE
199 config FPGA_DFL_FME_REGION
205 config FPGA_DFL_AFU
214 config FPGA_DFL_NIOS_INTEL_PAC_N3000
222 	  the card. It also instantiates the SPI master (spi-altera) for
225 config FPGA_DFL_PCI
229 	  Select this option to enable PCIe driver for PCIe-based
230 	  Field-Programmable Gate Array (FPGA) solutions which implement
240 config FPGA_MGR_ZYNQMP_FPGA
249 config FPGA_MGR_VERSAL_FPGA
259 config FPGA_M10_BMC_SEC_UPDATE
272 config FPGA_MGR_MICROCHIP_SPI
280 config FPGA_MGR_LATTICE_SYSCONFIG
283 config FPGA_MGR_LATTICE_SYSCONFIG_SPI