Lines Matching +full:packet +full:- +full:processor
1 /* SPDX-License-Identifier: BSD-3-Clause */
7 * See: https://software-dl.ti.com/tisci/esd/latest/index.html for details
9 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
53 /* PSI-L requests */
73 /* Processor Control requests */
82 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses
103 * struct ti_sci_msg_resp_version - Response for a message
125 * struct ti_sci_msg_req_reboot - Reboot the SoC
136 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device
143 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source.
147 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device.
148 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed
158 /* Additional hdr->flags options */
173 * struct ti_sci_msg_req_get_device_state - Request to get device.
186 * struct ti_sci_msg_resp_get_device_state - Response to get device request.
193 * - Uses the MSG_DEVICE_SW_* macros
210 * struct ti_sci_msg_req_set_device_resets - Set the desired resets
229 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state
237 * is only applicable to clock inputs on the SoC pseudo-device.
266 /* Additional hdr->flags options */
281 * struct ti_sci_msg_req_get_clock_state - Request for clock state
303 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state
322 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent
348 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent
368 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent
384 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents
406 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents
423 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency
457 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query
470 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency
495 * Calling set frequency on a clock input to the SoC pseudo-device will
499 * Calling set frequency on clock outputs from the SoC pseudo-device will
516 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency
537 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request
551 * struct ti_sci_msg_req_get_resource_range - Request to get a host's assigned
574 * struct ti_sci_msg_resp_get_resource_range - Response to resource get range.
592 * struct ti_sci_msg_req_manage_irq - Request to configure/release the route
599 * 0 - Valid bit for @dst_id
600 * 1 - Valid bit for @dst_host_irq
601 * 2 - Valid bit for @ia_id
602 * 3 - Valid bit for @vint
603 * 4 - Valid bit for @global_event
604 * 5 - Valid bit for @vint_status_bit_index
605 * 31 - Valid bit for @secondary_host
609 * IRQ controller or host processor ID.
648 * struct ti_sci_msg_rm_ring_cfg_req - Configure a Navigator Subsystem ring
650 * Configures the non-real-time registers of a Navigator Subsystem ring.
656 * 0 - Valid bit for @tisci_msg_rm_ring_cfg_req addr_lo
657 * 1 - Valid bit for @tisci_msg_rm_ring_cfg_req addr_hi
658 * 2 - Valid bit for @tisci_msg_rm_ring_cfg_req count
659 * 3 - Valid bit for @tisci_msg_rm_ring_cfg_req mode
660 * 4 - Valid bit for @tisci_msg_rm_ring_cfg_req size
661 * 5 - Valid bit for @tisci_msg_rm_ring_cfg_req order_id
662 * 6 - Valid bit for @tisci_msg_rm_ring_cfg_req virtid
663 * 7 - Valid bit for @tisci_msg_rm_ring_cfg_req ASEL
674 * the formula (log2(size_bytes) - 2), where size_bytes cannot be
697 * struct ti_sci_msg_psil_pair - Pairs a PSI-L source thread to a destination
700 * @nav_id: SoC Navigator Subsystem device ID whose PSI-L config proxy is
702 * @src_thread: PSI-L source thread ID within the PSI-L System thread map.
708 * @dst_thread: PSI-L destination thread ID within the PSI-L System thread map.
709 * PSI-L destination threads start at index 0x8000. The request is NACK'd if
727 * struct ti_sci_msg_psil_unpair - Unpairs a PSI-L source thread from a
730 * @nav_id: SoC Navigator Subsystem device ID whose PSI-L config proxy is
732 * @src_thread: PSI-L source thread ID within the PSI-L System thread map.
737 * @dst_thread: PSI-L destination thread ID within the PSI-L System thread map.
738 * PSI-L destination threads start at index 0x8000. The request is NACK'd if
755 * struct ti_sci_msg_udmap_rx_flow_cfg - UDMAP receive flow configuration
760 * @flow_index: UDMAP receive flow index for non-optional configuration.
762 * @rx_einfo_present: UDMAP receive flow extended packet info present.
768 * @rx_sop_offset: UDMAP receive flow start of packet offset.
771 * 0 - end of packet descriptor
772 * 1 - Beginning of the data buffer
781 * @rx_size_thresh_en: UDMAP receive flow packet size based free buffer queue
819 * struct rm_ti_sci_msg_udmap_rx_flow_opt_cfg - parameters for UDMAP receive
826 * @rx_size_thresh0: UDMAP receive flow packet size threshold 0.
827 * @rx_size_thresh1: UDMAP receive flow packet size threshold 1.
828 * @rx_size_thresh2: UDMAP receive flow packet size threshold 2.
854 * Configures the non-real-time registers of a Navigator Subsystem UDMAP
865 * 0 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_pause_on_err
866 * 1 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_atype
867 * 2 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_chan_type
868 * 3 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_fetch_size
869 * 4 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::txcq_qnum
870 * 5 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_priority
871 * 6 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_qos
872 * 7 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_orderid
873 * 8 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_sched_priority
874 * 9 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_filt_einfo
875 * 10 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_filt_pswords
876 * 11 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_supr_tdpkt
877 * 12 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_credit_count
878 * 13 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::fdepth
879 * 14 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_burst_size
880 * 15 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::tx_tdtype
881 * 16 - Valid bit for @ref ti_sci_msg_rm_udmap_tx_ch_cfg::extended_ch_type
891 * @tx_filt_einfo: UDMAP transmit channel extended packet information passing
907 * @tx_supr_tdpkt: UDMAP transmit channel teardown packet generation suppression
911 * @tx_fetch_size: UDMAP transmit channel number of 32-bit descriptor words to
948 * 0 - Return immediately
949 * 1 - Wait for completion message from remote peer
952 * 0 - the channel is split tx channel (tchan)
953 * 1 - the channel is block copy channel (bchan)
982 * Configures the non-real-time registers of a Navigator Subsystem UDMAP
994 * 0 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_pause_on_err
995 * 1 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_atype
996 * 2 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type
997 * 3 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_fetch_size
998 * 4 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rxcq_qnum
999 * 5 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_priority
1000 * 6 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_qos
1001 * 7 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_orderid
1002 * 8 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority
1003 * 9 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::flowid_start
1004 * 10 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::flowid_cnt
1005 * 11 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_short
1006 * 12 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_long
1007 * 14 - Valid bit for @ti_sci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size
1013 * @rx_fetch_size: UDMAP receive channel number of 32-bit descriptor words to
1068 * @rx_ignore_short: UDMAP receive channel short packet treatment configuration
1071 * @rx_ignore_long: UDMAP receive channel long packet treatment configuration to
1102 * Configuration does not include the flow registers which handle size-based
1114 * 0 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_einfo_present
1115 * 1 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_psinfo_present
1116 * 2 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_error_handling
1117 * 3 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_desc_type
1118 * 4 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_sop_offset
1119 * 5 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_qnum
1120 * 6 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_hi
1121 * 7 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_lo
1122 * 8 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi
1123 * 9 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo
1124 * 10 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_hi_sel
1125 * 11 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_src_tag_lo_sel
1126 * 12 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_hi_sel
1127 * 13 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_dest_tag_lo_sel
1128 * 14 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq0_sz0_qnum
1129 * 15 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq1_sz0_qnum
1130 * 16 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq2_sz0_qnum
1131 * 17 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_fdq3_sz0_qnum
1132 * 18 - Valid bit for @tisci_msg_rm_udmap_flow_cfg_req::rx_ps_location
1137 * @flow_index: UDMAP receive flow index for non-optional configuration.
1140 * UDMAP receive flow extended packet info present configuration to be
1156 * UDMAP receive flow start of packet offset configuration to be programmed
1159 * this field are 0-255 bytes.
1271 * struct ti_sci_msg_req_proc_request - Request a processor
1273 * @processor_id: ID of processor being requested
1284 * struct ti_sci_msg_req_proc_release - Release a processor
1286 * @processor_id: ID of processor being released
1297 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host
1299 * @processor_id: ID of processor being handed over
1317 * struct ti_sci_msg_req_set_config - Set Processor boot configuration
1319 * @processor_id: ID of processor being configured
1322 * @config_flags_set: Optional Processor specific Config Flags to set.
1325 * @config_flags_clear: Optional Processor specific Config Flags to clear.
1342 * struct ti_sci_msg_req_set_ctrl - Set Processor boot control flags
1344 * @processor_id: ID of processor being configured
1345 * @control_flags_set: Optional Processor specific Control Flags to set.
1348 * @control_flags_clear:Optional Processor specific Control Flags to clear.
1363 * struct ti_sci_msg_req_get_status - Processor boot status request
1365 * @processor_id: ID of processor whose status is being requested
1376 * struct ti_sci_msg_resp_get_status - Processor boot status response
1378 * @processor_id: ID of processor whose status is returned
1381 * @config_flags: Optional Processor specific Config Flags set currently
1382 * @control_flags: Optional Processor specific Control Flags set currently
1383 * @status_flags: Optional Processor specific Status Flags set currently