Lines Matching full:dsp
3 * cs_dsp.c -- Cirrus Logic DSP firmware support
286 bool (*validate_version)(struct cs_dsp *dsp, unsigned int version);
287 unsigned int (*parse_sizes)(struct cs_dsp *dsp,
291 int (*setup_algs)(struct cs_dsp *dsp);
295 void (*show_fw_status)(struct cs_dsp *dsp);
296 void (*stop_watchdog)(struct cs_dsp *dsp);
298 int (*enable_memory)(struct cs_dsp *dsp);
299 void (*disable_memory)(struct cs_dsp *dsp);
300 int (*lock_memory)(struct cs_dsp *dsp, unsigned int lock_regions);
302 int (*enable_core)(struct cs_dsp *dsp);
303 void (*disable_core)(struct cs_dsp *dsp);
305 int (*start_core)(struct cs_dsp *dsp);
306 void (*stop_core)(struct cs_dsp *dsp);
384 static void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, const char *s) in cs_dsp_debugfs_save_wmfwname() argument
388 kfree(dsp->wmfw_file_name); in cs_dsp_debugfs_save_wmfwname()
389 dsp->wmfw_file_name = tmp; in cs_dsp_debugfs_save_wmfwname()
392 static void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, const char *s) in cs_dsp_debugfs_save_binname() argument
396 kfree(dsp->bin_file_name); in cs_dsp_debugfs_save_binname()
397 dsp->bin_file_name = tmp; in cs_dsp_debugfs_save_binname()
400 static void cs_dsp_debugfs_clear(struct cs_dsp *dsp) in cs_dsp_debugfs_clear() argument
402 kfree(dsp->wmfw_file_name); in cs_dsp_debugfs_clear()
403 kfree(dsp->bin_file_name); in cs_dsp_debugfs_clear()
404 dsp->wmfw_file_name = NULL; in cs_dsp_debugfs_clear()
405 dsp->bin_file_name = NULL; in cs_dsp_debugfs_clear()
412 struct cs_dsp *dsp = file->private_data; in cs_dsp_debugfs_wmfw_read() local
415 mutex_lock(&dsp->pwr_lock); in cs_dsp_debugfs_wmfw_read()
417 if (!dsp->wmfw_file_name || !dsp->booted) in cs_dsp_debugfs_wmfw_read()
421 dsp->wmfw_file_name, in cs_dsp_debugfs_wmfw_read()
422 strlen(dsp->wmfw_file_name)); in cs_dsp_debugfs_wmfw_read()
424 mutex_unlock(&dsp->pwr_lock); in cs_dsp_debugfs_wmfw_read()
432 struct cs_dsp *dsp = file->private_data; in cs_dsp_debugfs_bin_read() local
435 mutex_lock(&dsp->pwr_lock); in cs_dsp_debugfs_bin_read()
437 if (!dsp->bin_file_name || !dsp->booted) in cs_dsp_debugfs_bin_read()
441 dsp->bin_file_name, in cs_dsp_debugfs_bin_read()
442 strlen(dsp->bin_file_name)); in cs_dsp_debugfs_bin_read()
444 mutex_unlock(&dsp->pwr_lock); in cs_dsp_debugfs_bin_read()
473 struct cs_dsp *dsp = s->private; in cs_dsp_debugfs_read_controls_show() local
477 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_debugfs_read_controls_show()
496 * cs_dsp_init_debugfs() - Create and populate DSP representation in debugfs
497 * @dsp: pointer to DSP structure
498 * @debugfs_root: pointer to debugfs directory in which to create this DSP
501 void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) in cs_dsp_init_debugfs() argument
506 root = debugfs_create_dir(dsp->name, debugfs_root); in cs_dsp_init_debugfs()
508 debugfs_create_bool("booted", 0444, root, &dsp->booted); in cs_dsp_init_debugfs()
509 debugfs_create_bool("running", 0444, root, &dsp->running); in cs_dsp_init_debugfs()
510 debugfs_create_x32("fw_id", 0444, root, &dsp->fw_id); in cs_dsp_init_debugfs()
511 debugfs_create_x32("fw_version", 0444, root, &dsp->fw_id_version); in cs_dsp_init_debugfs()
515 dsp, &cs_dsp_debugfs_fops[i].fops); in cs_dsp_init_debugfs()
517 debugfs_create_file("controls", 0444, root, dsp, in cs_dsp_init_debugfs()
520 dsp->debugfs_root = root; in cs_dsp_init_debugfs()
525 * cs_dsp_cleanup_debugfs() - Removes DSP representation from debugfs
526 * @dsp: pointer to DSP structure
528 void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) in cs_dsp_cleanup_debugfs() argument
530 cs_dsp_debugfs_clear(dsp); in cs_dsp_cleanup_debugfs()
531 debugfs_remove_recursive(dsp->debugfs_root); in cs_dsp_cleanup_debugfs()
532 dsp->debugfs_root = ERR_PTR(-ENODEV); in cs_dsp_cleanup_debugfs()
536 void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) in cs_dsp_init_debugfs() argument
541 void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) in cs_dsp_cleanup_debugfs() argument
546 static inline void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, in cs_dsp_debugfs_save_wmfwname() argument
551 static inline void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, in cs_dsp_debugfs_save_binname() argument
556 static inline void cs_dsp_debugfs_clear(struct cs_dsp *dsp) in cs_dsp_debugfs_clear() argument
561 static const struct cs_dsp_region *cs_dsp_find_region(struct cs_dsp *dsp, in cs_dsp_find_region() argument
566 for (i = 0; i < dsp->num_mems; i++) in cs_dsp_find_region()
567 if (dsp->mem[i].type == type) in cs_dsp_find_region()
568 return &dsp->mem[i]; in cs_dsp_find_region()
608 static void cs_dsp_read_fw_status(struct cs_dsp *dsp, in cs_dsp_read_fw_status() argument
615 ret = regmap_read(dsp->regmap, dsp->base + offs[i], &offs[i]); in cs_dsp_read_fw_status()
617 cs_dsp_err(dsp, "Failed to read SCRATCH%u: %d\n", i, ret); in cs_dsp_read_fw_status()
623 static void cs_dsp_adsp2_show_fw_status(struct cs_dsp *dsp) in cs_dsp_adsp2_show_fw_status() argument
629 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_adsp2_show_fw_status()
631 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_adsp2_show_fw_status()
635 static void cs_dsp_adsp2v2_show_fw_status(struct cs_dsp *dsp) in cs_dsp_adsp2v2_show_fw_status() argument
639 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_adsp2v2_show_fw_status()
641 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_adsp2v2_show_fw_status()
646 static void cs_dsp_halo_show_fw_status(struct cs_dsp *dsp) in cs_dsp_halo_show_fw_status() argument
652 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_halo_show_fw_status()
654 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_halo_show_fw_status()
662 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_base_reg() local
665 mem = cs_dsp_find_region(dsp, alg_region->type); in cs_dsp_coeff_base_reg()
667 cs_dsp_err(dsp, "No base for region %x\n", in cs_dsp_coeff_base_reg()
672 *reg = dsp->ops->region_to_reg(mem, ctl->alg_region.base + ctl->offset + off); in cs_dsp_coeff_base_reg()
691 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_write_acked_control() local
696 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_coeff_write_acked_control()
698 if (!dsp->running) in cs_dsp_coeff_write_acked_control()
705 cs_dsp_dbg(dsp, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n", in cs_dsp_coeff_write_acked_control()
709 ret = regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_coeff_write_acked_control()
711 cs_dsp_err(dsp, "Failed to write %x: %d\n", reg, ret); in cs_dsp_coeff_write_acked_control()
733 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_coeff_write_acked_control()
735 cs_dsp_err(dsp, "Failed to read %x: %d\n", reg, ret); in cs_dsp_coeff_write_acked_control()
740 cs_dsp_dbg(dsp, "Acked control ACKED at poll %u\n", i); in cs_dsp_coeff_write_acked_control()
745 cs_dsp_warn(dsp, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n", in cs_dsp_coeff_write_acked_control()
757 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_write_ctrl_raw() local
770 ret = regmap_raw_write(dsp->regmap, reg, scratch, in cs_dsp_coeff_write_ctrl_raw()
773 cs_dsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", in cs_dsp_coeff_write_ctrl_raw()
778 cs_dsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg); in cs_dsp_coeff_write_ctrl_raw()
804 lockdep_assert_held(&ctl->dsp->pwr_lock); in cs_dsp_coeff_write_ctrl()
822 if (ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_write_ctrl()
846 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_lock_and_write_ctrl() local
849 lockdep_assert_not_held(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_write_ctrl()
851 mutex_lock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_write_ctrl()
853 mutex_unlock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_write_ctrl()
862 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_read_ctrl_raw() local
875 ret = regmap_raw_read(dsp->regmap, reg, scratch, len); in cs_dsp_coeff_read_ctrl_raw()
877 cs_dsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", in cs_dsp_coeff_read_ctrl_raw()
882 cs_dsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg); in cs_dsp_coeff_read_ctrl_raw()
909 lockdep_assert_held(&ctl->dsp->pwr_lock); in cs_dsp_coeff_read_ctrl()
915 if (ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_read_ctrl()
920 if (!ctl->flags && ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_read_ctrl()
945 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_lock_and_read_ctrl() local
948 lockdep_assert_not_held(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_read_ctrl()
950 mutex_lock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_read_ctrl()
952 mutex_unlock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_read_ctrl()
958 static int cs_dsp_coeff_init_control_caches(struct cs_dsp *dsp) in cs_dsp_coeff_init_control_caches() argument
963 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_coeff_init_control_caches()
970 * For readable controls populate the cache from the DSP memory. in cs_dsp_coeff_init_control_caches()
984 static int cs_dsp_coeff_sync_controls(struct cs_dsp *dsp) in cs_dsp_coeff_sync_controls() argument
989 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_coeff_sync_controls()
1003 static void cs_dsp_signal_event_controls(struct cs_dsp *dsp, in cs_dsp_signal_event_controls() argument
1009 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_signal_event_controls()
1018 cs_dsp_warn(dsp, in cs_dsp_signal_event_controls()
1031 static int cs_dsp_create_control(struct cs_dsp *dsp, in cs_dsp_create_control() argument
1040 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_create_control()
1041 if (ctl->fw_name == dsp->fw_name && in cs_dsp_create_control()
1058 ctl->fw_name = dsp->fw_name; in cs_dsp_create_control()
1060 if (subname && dsp->wmfw_ver >= 2) { in cs_dsp_create_control()
1070 ctl->dsp = dsp; in cs_dsp_create_control()
1082 list_add(&ctl->list, &dsp->ctl_list); in cs_dsp_create_control()
1084 if (dsp->client_ops->control_add) { in cs_dsp_create_control()
1085 ret = dsp->client_ops->control_add(ctl); in cs_dsp_create_control()
1176 static int cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, in cs_dsp_coeff_parse_alg() argument
1187 switch (dsp->wmfw_ver) { in cs_dsp_coeff_parse_alg()
1231 cs_dsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); in cs_dsp_coeff_parse_alg()
1232 cs_dsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); in cs_dsp_coeff_parse_alg()
1233 cs_dsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); in cs_dsp_coeff_parse_alg()
1238 static int cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, in cs_dsp_coeff_parse_coeff() argument
1264 switch (dsp->wmfw_ver) { in cs_dsp_coeff_parse_coeff()
1307 cs_dsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type); in cs_dsp_coeff_parse_coeff()
1308 cs_dsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset); in cs_dsp_coeff_parse_coeff()
1309 cs_dsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name); in cs_dsp_coeff_parse_coeff()
1310 cs_dsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); in cs_dsp_coeff_parse_coeff()
1311 cs_dsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); in cs_dsp_coeff_parse_coeff()
1312 cs_dsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); in cs_dsp_coeff_parse_coeff()
1317 static int cs_dsp_check_coeff_flags(struct cs_dsp *dsp, in cs_dsp_check_coeff_flags() argument
1324 cs_dsp_err(dsp, "Illegal flags 0x%x for control type 0x%x\n", in cs_dsp_check_coeff_flags()
1332 static int cs_dsp_parse_coeff(struct cs_dsp *dsp, in cs_dsp_parse_coeff() argument
1340 pos = cs_dsp_coeff_parse_alg(dsp, region, &alg_blk); in cs_dsp_parse_coeff()
1345 pos = cs_dsp_coeff_parse_coeff(dsp, region, pos, &coeff_blk); in cs_dsp_parse_coeff()
1356 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1366 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1376 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1385 cs_dsp_err(dsp, "Unknown control type: %d\n", in cs_dsp_parse_coeff()
1393 ret = cs_dsp_create_control(dsp, &alg_region, in cs_dsp_parse_coeff()
1401 cs_dsp_err(dsp, "Failed to create control: %.*s, %d\n", in cs_dsp_parse_coeff()
1408 static unsigned int cs_dsp_adsp1_parse_sizes(struct cs_dsp *dsp, in cs_dsp_adsp1_parse_sizes() argument
1417 cs_dsp_err(dsp, "%s: file truncated\n", file); in cs_dsp_adsp1_parse_sizes()
1421 cs_dsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", file, in cs_dsp_adsp1_parse_sizes()
1428 static unsigned int cs_dsp_adsp2_parse_sizes(struct cs_dsp *dsp, in cs_dsp_adsp2_parse_sizes() argument
1437 cs_dsp_err(dsp, "%s: file truncated\n", file); in cs_dsp_adsp2_parse_sizes()
1441 cs_dsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", file, in cs_dsp_adsp2_parse_sizes()
1448 static bool cs_dsp_validate_version(struct cs_dsp *dsp, unsigned int version) in cs_dsp_validate_version() argument
1452 cs_dsp_warn(dsp, "Deprecated file format %d\n", version); in cs_dsp_validate_version()
1462 static bool cs_dsp_halo_validate_version(struct cs_dsp *dsp, unsigned int version) in cs_dsp_halo_validate_version() argument
1472 static int cs_dsp_load(struct cs_dsp *dsp, const struct firmware *firmware, in cs_dsp_load() argument
1476 struct regmap *regmap = dsp->regmap; in cs_dsp_load()
1501 cs_dsp_err(dsp, "%s: invalid magic\n", file); in cs_dsp_load()
1505 if (!dsp->ops->validate_version(dsp, header->ver)) { in cs_dsp_load()
1506 cs_dsp_err(dsp, "%s: unknown file format %d\n", in cs_dsp_load()
1511 dsp->wmfw_ver = header->ver; in cs_dsp_load()
1513 if (header->core != dsp->type) { in cs_dsp_load()
1514 cs_dsp_err(dsp, "%s: invalid core %d != %d\n", in cs_dsp_load()
1515 file, header->core, dsp->type); in cs_dsp_load()
1520 pos = dsp->ops->parse_sizes(dsp, file, pos, firmware); in cs_dsp_load()
1534 cs_dsp_info(dsp, "%s: format %d timestamp %#llx\n", file, header->ver, in cs_dsp_load()
1560 cs_dsp_info(dsp, "%s: %.*s\n", file, in cs_dsp_load()
1565 ret = cs_dsp_parse_coeff(dsp, region); in cs_dsp_load()
1581 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load()
1583 cs_dsp_err(dsp, "No region of type: %x\n", type); in cs_dsp_load()
1589 reg = dsp->ops->region_to_reg(mem, offset); in cs_dsp_load()
1592 cs_dsp_warn(dsp, in cs_dsp_load()
1598 cs_dsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file, in cs_dsp_load()
1607 cs_dsp_err(dsp, "Out of memory\n"); in cs_dsp_load()
1615 cs_dsp_err(dsp, in cs_dsp_load()
1630 cs_dsp_err(dsp, "Failed to complete async write: %d\n", ret); in cs_dsp_load()
1635 cs_dsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", in cs_dsp_load()
1638 cs_dsp_debugfs_save_wmfwname(dsp, file); in cs_dsp_load()
1645 cs_dsp_err(dsp, "%s: file content overflows file data\n", file); in cs_dsp_load()
1652 * @dsp: pointer to DSP structure
1661 struct cs_dsp_coeff_ctl *cs_dsp_get_ctl(struct cs_dsp *dsp, const char *name, int type, in cs_dsp_get_ctl() argument
1666 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_get_ctl()
1668 list_for_each_entry(pos, &dsp->ctl_list, list) { in cs_dsp_get_ctl()
1672 pos->fw_name == dsp->fw_name && in cs_dsp_get_ctl()
1684 static void cs_dsp_ctl_fixup_base(struct cs_dsp *dsp, in cs_dsp_ctl_fixup_base() argument
1689 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_ctl_fixup_base()
1690 if (ctl->fw_name == dsp->fw_name && in cs_dsp_ctl_fixup_base()
1698 static void *cs_dsp_read_algs(struct cs_dsp *dsp, size_t n_algs, in cs_dsp_read_algs() argument
1708 cs_dsp_err(dsp, "No algorithms\n"); in cs_dsp_read_algs()
1713 cs_dsp_err(dsp, "Algorithm count %zx excessive\n", n_algs); in cs_dsp_read_algs()
1718 reg = dsp->ops->region_to_reg(mem, pos + len); in cs_dsp_read_algs()
1720 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_read_algs()
1722 cs_dsp_err(dsp, "Failed to read algorithm list end: %d\n", in cs_dsp_read_algs()
1728 cs_dsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbedead\n", in cs_dsp_read_algs()
1731 /* Convert length from DSP words to bytes */ in cs_dsp_read_algs()
1738 reg = dsp->ops->region_to_reg(mem, pos); in cs_dsp_read_algs()
1740 ret = regmap_raw_read(dsp->regmap, reg, alg, len); in cs_dsp_read_algs()
1742 cs_dsp_err(dsp, "Failed to read algorithm list: %d\n", ret); in cs_dsp_read_algs()
1752 * @dsp: pointer to DSP structure
1758 struct cs_dsp_alg_region *cs_dsp_find_alg_region(struct cs_dsp *dsp, in cs_dsp_find_alg_region() argument
1763 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_find_alg_region()
1765 list_for_each_entry(alg_region, &dsp->alg_regions, list) { in cs_dsp_find_alg_region()
1774 static struct cs_dsp_alg_region *cs_dsp_create_region(struct cs_dsp *dsp, in cs_dsp_create_region() argument
1789 list_add_tail(&alg_region->list, &dsp->alg_regions); in cs_dsp_create_region()
1791 if (dsp->wmfw_ver > 0) in cs_dsp_create_region()
1792 cs_dsp_ctl_fixup_base(dsp, alg_region); in cs_dsp_create_region()
1797 static void cs_dsp_free_alg_regions(struct cs_dsp *dsp) in cs_dsp_free_alg_regions() argument
1801 while (!list_empty(&dsp->alg_regions)) { in cs_dsp_free_alg_regions()
1802 alg_region = list_first_entry(&dsp->alg_regions, in cs_dsp_free_alg_regions()
1810 static void cs_dsp_parse_wmfw_id_header(struct cs_dsp *dsp, in cs_dsp_parse_wmfw_id_header() argument
1813 dsp->fw_id = be32_to_cpu(fw->id); in cs_dsp_parse_wmfw_id_header()
1814 dsp->fw_id_version = be32_to_cpu(fw->ver); in cs_dsp_parse_wmfw_id_header()
1816 cs_dsp_info(dsp, "Firmware: %x v%d.%d.%d, %d algorithms\n", in cs_dsp_parse_wmfw_id_header()
1817 dsp->fw_id, (dsp->fw_id_version & 0xff0000) >> 16, in cs_dsp_parse_wmfw_id_header()
1818 (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff, in cs_dsp_parse_wmfw_id_header()
1822 static void cs_dsp_parse_wmfw_v3_id_header(struct cs_dsp *dsp, in cs_dsp_parse_wmfw_v3_id_header() argument
1825 dsp->fw_id = be32_to_cpu(fw->id); in cs_dsp_parse_wmfw_v3_id_header()
1826 dsp->fw_id_version = be32_to_cpu(fw->ver); in cs_dsp_parse_wmfw_v3_id_header()
1827 dsp->fw_vendor_id = be32_to_cpu(fw->vendor_id); in cs_dsp_parse_wmfw_v3_id_header()
1829 cs_dsp_info(dsp, "Firmware: %x vendor: 0x%x v%d.%d.%d, %d algorithms\n", in cs_dsp_parse_wmfw_v3_id_header()
1830 dsp->fw_id, dsp->fw_vendor_id, in cs_dsp_parse_wmfw_v3_id_header()
1831 (dsp->fw_id_version & 0xff0000) >> 16, in cs_dsp_parse_wmfw_v3_id_header()
1832 (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff, in cs_dsp_parse_wmfw_v3_id_header()
1836 static int cs_dsp_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, in cs_dsp_create_regions() argument
1843 alg_region = cs_dsp_create_region(dsp, type[i], id, ver, base[i]); in cs_dsp_create_regions()
1851 static int cs_dsp_adsp1_setup_algs(struct cs_dsp *dsp) in cs_dsp_adsp1_setup_algs() argument
1861 mem = cs_dsp_find_region(dsp, WMFW_ADSP1_DM); in cs_dsp_adsp1_setup_algs()
1865 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id, in cs_dsp_adsp1_setup_algs()
1868 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_adsp1_setup_algs()
1875 cs_dsp_parse_wmfw_id_header(dsp, &adsp1_id.fw, n_algs); in cs_dsp_adsp1_setup_algs()
1877 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_ZM, in cs_dsp_adsp1_setup_algs()
1883 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_DM, in cs_dsp_adsp1_setup_algs()
1889 /* Calculate offset and length in DSP words */ in cs_dsp_adsp1_setup_algs()
1893 adsp1_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_adsp1_setup_algs()
1898 cs_dsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", in cs_dsp_adsp1_setup_algs()
1906 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_DM, in cs_dsp_adsp1_setup_algs()
1914 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp1_setup_algs()
1919 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp1_setup_algs()
1923 cs_dsp_warn(dsp, "Missing length info for region DM with ID %x\n", in cs_dsp_adsp1_setup_algs()
1928 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_ZM, in cs_dsp_adsp1_setup_algs()
1936 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp1_setup_algs()
1941 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp1_setup_algs()
1945 cs_dsp_warn(dsp, "Missing length info for region ZM with ID %x\n", in cs_dsp_adsp1_setup_algs()
1956 static int cs_dsp_adsp2_setup_algs(struct cs_dsp *dsp) in cs_dsp_adsp2_setup_algs() argument
1966 mem = cs_dsp_find_region(dsp, WMFW_ADSP2_XM); in cs_dsp_adsp2_setup_algs()
1970 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id, in cs_dsp_adsp2_setup_algs()
1973 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_adsp2_setup_algs()
1980 cs_dsp_parse_wmfw_id_header(dsp, &adsp2_id.fw, n_algs); in cs_dsp_adsp2_setup_algs()
1982 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM, in cs_dsp_adsp2_setup_algs()
1988 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_YM, in cs_dsp_adsp2_setup_algs()
1994 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_ZM, in cs_dsp_adsp2_setup_algs()
2000 /* Calculate offset and length in DSP words */ in cs_dsp_adsp2_setup_algs()
2004 adsp2_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_adsp2_setup_algs()
2009 cs_dsp_dbg(dsp, in cs_dsp_adsp2_setup_algs()
2019 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM, in cs_dsp_adsp2_setup_algs()
2027 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2032 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2036 cs_dsp_warn(dsp, "Missing length info for region XM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2041 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_YM, in cs_dsp_adsp2_setup_algs()
2049 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2054 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2058 cs_dsp_warn(dsp, "Missing length info for region YM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2063 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_ZM, in cs_dsp_adsp2_setup_algs()
2071 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2076 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2080 cs_dsp_warn(dsp, "Missing length info for region ZM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2091 static int cs_dsp_halo_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, in cs_dsp_halo_create_regions() argument
2100 return cs_dsp_create_regions(dsp, id, ver, ARRAY_SIZE(types), types, bases); in cs_dsp_halo_create_regions()
2103 static int cs_dsp_halo_setup_algs(struct cs_dsp *dsp) in cs_dsp_halo_setup_algs() argument
2112 mem = cs_dsp_find_region(dsp, WMFW_ADSP2_XM); in cs_dsp_halo_setup_algs()
2116 ret = regmap_raw_read(dsp->regmap, mem->base, &halo_id, in cs_dsp_halo_setup_algs()
2119 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_halo_setup_algs()
2126 cs_dsp_parse_wmfw_v3_id_header(dsp, &halo_id.fw, n_algs); in cs_dsp_halo_setup_algs()
2128 ret = cs_dsp_halo_create_regions(dsp, halo_id.fw.id, halo_id.fw.ver, in cs_dsp_halo_setup_algs()
2133 /* Calculate offset and length in DSP words */ in cs_dsp_halo_setup_algs()
2137 halo_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_halo_setup_algs()
2142 cs_dsp_dbg(dsp, in cs_dsp_halo_setup_algs()
2151 ret = cs_dsp_halo_create_regions(dsp, halo_alg[i].alg.id, in cs_dsp_halo_setup_algs()
2164 static int cs_dsp_load_coeff(struct cs_dsp *dsp, const struct firmware *firmware, in cs_dsp_load_coeff() argument
2168 struct regmap *regmap = dsp->regmap; in cs_dsp_load_coeff()
2183 cs_dsp_err(dsp, "%s: coefficient file too short, %zu bytes\n", in cs_dsp_load_coeff()
2190 cs_dsp_err(dsp, "%s: invalid coefficient magic\n", file); in cs_dsp_load_coeff()
2199 cs_dsp_err(dsp, "%s: Unsupported coefficient file format %d\n", in cs_dsp_load_coeff()
2205 cs_dsp_info(dsp, "%s: v%d.%d.%d\n", file, in cs_dsp_load_coeff()
2231 cs_dsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n", in cs_dsp_load_coeff()
2236 cs_dsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n", in cs_dsp_load_coeff()
2243 cs_dsp_info(dsp, "%s: %.*s\n", dsp->fw_name, in cs_dsp_load_coeff()
2254 if (le32_to_cpu(blk->id) == dsp->fw_id && in cs_dsp_load_coeff()
2257 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load_coeff()
2259 cs_dsp_err(dsp, "No ZM\n"); in cs_dsp_load_coeff()
2262 reg = dsp->ops->region_to_reg(mem, 0); in cs_dsp_load_coeff()
2277 cs_dsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n", in cs_dsp_load_coeff()
2282 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load_coeff()
2284 cs_dsp_err(dsp, "No base for region %x\n", type); in cs_dsp_load_coeff()
2288 alg_region = cs_dsp_find_alg_region(dsp, type, in cs_dsp_load_coeff()
2292 cs_dsp_warn(dsp, in cs_dsp_load_coeff()
2302 reg = dsp->ops->region_to_reg(mem, reg); in cs_dsp_load_coeff()
2305 cs_dsp_err(dsp, "No %s for algorithm %x\n", in cs_dsp_load_coeff()
2311 cs_dsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", in cs_dsp_load_coeff()
2321 cs_dsp_err(dsp, "Out of memory\n"); in cs_dsp_load_coeff()
2326 cs_dsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", in cs_dsp_load_coeff()
2332 cs_dsp_err(dsp, in cs_dsp_load_coeff()
2344 cs_dsp_err(dsp, "Failed to complete async write: %d\n", ret); in cs_dsp_load_coeff()
2347 cs_dsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", in cs_dsp_load_coeff()
2350 cs_dsp_debugfs_save_binname(dsp, file); in cs_dsp_load_coeff()
2357 cs_dsp_err(dsp, "%s: file content overflows file data\n", file); in cs_dsp_load_coeff()
2362 static int cs_dsp_create_name(struct cs_dsp *dsp) in cs_dsp_create_name() argument
2364 if (!dsp->name) { in cs_dsp_create_name()
2365 dsp->name = devm_kasprintf(dsp->dev, GFP_KERNEL, "DSP%d", in cs_dsp_create_name()
2366 dsp->num); in cs_dsp_create_name()
2367 if (!dsp->name) in cs_dsp_create_name()
2374 static int cs_dsp_common_init(struct cs_dsp *dsp) in cs_dsp_common_init() argument
2378 ret = cs_dsp_create_name(dsp); in cs_dsp_common_init()
2382 INIT_LIST_HEAD(&dsp->alg_regions); in cs_dsp_common_init()
2383 INIT_LIST_HEAD(&dsp->ctl_list); in cs_dsp_common_init()
2385 mutex_init(&dsp->pwr_lock); in cs_dsp_common_init()
2389 dsp->debugfs_root = ERR_PTR(-ENODEV); in cs_dsp_common_init()
2397 * @dsp: pointer to DSP structure
2401 int cs_dsp_adsp1_init(struct cs_dsp *dsp) in cs_dsp_adsp1_init() argument
2403 dsp->ops = &cs_dsp_adsp1_ops; in cs_dsp_adsp1_init()
2405 return cs_dsp_common_init(dsp); in cs_dsp_adsp1_init()
2411 * @dsp: pointer to DSP structure
2420 int cs_dsp_adsp1_power_up(struct cs_dsp *dsp, in cs_dsp_adsp1_power_up() argument
2428 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2430 dsp->fw_name = fw_name; in cs_dsp_adsp1_power_up()
2432 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2436 * For simplicity set the DSP clock rate to be the in cs_dsp_adsp1_power_up()
2439 if (dsp->sysclk_reg) { in cs_dsp_adsp1_power_up()
2440 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); in cs_dsp_adsp1_power_up()
2442 cs_dsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); in cs_dsp_adsp1_power_up()
2446 val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift; in cs_dsp_adsp1_power_up()
2448 ret = regmap_update_bits(dsp->regmap, in cs_dsp_adsp1_power_up()
2449 dsp->base + ADSP1_CONTROL_31, in cs_dsp_adsp1_power_up()
2452 cs_dsp_err(dsp, "Failed to set clock rate: %d\n", ret); in cs_dsp_adsp1_power_up()
2457 ret = cs_dsp_load(dsp, wmfw_firmware, wmfw_filename); in cs_dsp_adsp1_power_up()
2461 ret = cs_dsp_adsp1_setup_algs(dsp); in cs_dsp_adsp1_power_up()
2465 ret = cs_dsp_load_coeff(dsp, coeff_firmware, coeff_filename); in cs_dsp_adsp1_power_up()
2470 ret = cs_dsp_coeff_init_control_caches(dsp); in cs_dsp_adsp1_power_up()
2475 ret = cs_dsp_coeff_sync_controls(dsp); in cs_dsp_adsp1_power_up()
2479 dsp->booted = true; in cs_dsp_adsp1_power_up()
2482 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2486 dsp->running = true; in cs_dsp_adsp1_power_up()
2488 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2493 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2496 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2502 * cs_dsp_adsp1_power_down() - Halts the DSP
2503 * @dsp: pointer to DSP structure
2505 void cs_dsp_adsp1_power_down(struct cs_dsp *dsp) in cs_dsp_adsp1_power_down() argument
2509 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp1_power_down()
2511 dsp->running = false; in cs_dsp_adsp1_power_down()
2512 dsp->booted = false; in cs_dsp_adsp1_power_down()
2515 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_down()
2518 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19, in cs_dsp_adsp1_power_down()
2521 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_down()
2524 list_for_each_entry(ctl, &dsp->ctl_list, list) in cs_dsp_adsp1_power_down()
2527 cs_dsp_free_alg_regions(dsp); in cs_dsp_adsp1_power_down()
2529 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_down()
2533 static int cs_dsp_adsp2v2_enable_core(struct cs_dsp *dsp) in cs_dsp_adsp2v2_enable_core() argument
2540 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val); in cs_dsp_adsp2v2_enable_core()
2551 cs_dsp_err(dsp, "Failed to start DSP RAM\n"); in cs_dsp_adsp2v2_enable_core()
2555 cs_dsp_dbg(dsp, "RAM ready after %d polls\n", count); in cs_dsp_adsp2v2_enable_core()
2560 static int cs_dsp_adsp2_enable_core(struct cs_dsp *dsp) in cs_dsp_adsp2_enable_core() argument
2564 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_enable_core()
2569 return cs_dsp_adsp2v2_enable_core(dsp); in cs_dsp_adsp2_enable_core()
2572 static int cs_dsp_adsp2_lock(struct cs_dsp *dsp, unsigned int lock_regions) in cs_dsp_adsp2_lock() argument
2574 struct regmap *regmap = dsp->regmap; in cs_dsp_adsp2_lock()
2581 lock_reg = dsp->base + ADSP2_LOCK_REGION_1_LOCK_REGION_0; in cs_dsp_adsp2_lock()
2602 static int cs_dsp_adsp2_enable_memory(struct cs_dsp *dsp) in cs_dsp_adsp2_enable_memory() argument
2604 return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_enable_memory()
2608 static void cs_dsp_adsp2_disable_memory(struct cs_dsp *dsp) in cs_dsp_adsp2_disable_memory() argument
2610 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_disable_memory()
2614 static void cs_dsp_adsp2_disable_core(struct cs_dsp *dsp) in cs_dsp_adsp2_disable_core() argument
2616 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); in cs_dsp_adsp2_disable_core()
2617 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); in cs_dsp_adsp2_disable_core()
2618 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); in cs_dsp_adsp2_disable_core()
2620 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_disable_core()
2624 static void cs_dsp_adsp2v2_disable_core(struct cs_dsp *dsp) in cs_dsp_adsp2v2_disable_core() argument
2626 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); in cs_dsp_adsp2v2_disable_core()
2627 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); in cs_dsp_adsp2v2_disable_core()
2628 regmap_write(dsp->regmap, dsp->base + ADSP2V2_WDMA_CONFIG_2, 0); in cs_dsp_adsp2v2_disable_core()
2631 static int cs_dsp_halo_configure_mpu(struct cs_dsp *dsp, unsigned int lock_regions) in cs_dsp_halo_configure_mpu() argument
2634 { dsp->base + HALO_MPU_LOCK_CONFIG, 0x5555 }, in cs_dsp_halo_configure_mpu()
2635 { dsp->base + HALO_MPU_LOCK_CONFIG, 0xAAAA }, in cs_dsp_halo_configure_mpu()
2636 { dsp->base + HALO_MPU_XMEM_ACCESS_0, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2637 { dsp->base + HALO_MPU_YMEM_ACCESS_0, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2638 { dsp->base + HALO_MPU_WINDOW_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2639 { dsp->base + HALO_MPU_XREG_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2640 { dsp->base + HALO_MPU_YREG_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2641 { dsp->base + HALO_MPU_XMEM_ACCESS_1, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2642 { dsp->base + HALO_MPU_YMEM_ACCESS_1, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2643 { dsp->base + HALO_MPU_WINDOW_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2644 { dsp->base + HALO_MPU_XREG_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2645 { dsp->base + HALO_MPU_YREG_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2646 { dsp->base + HALO_MPU_XMEM_ACCESS_2, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2647 { dsp->base + HALO_MPU_YMEM_ACCESS_2, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2648 { dsp->base + HALO_MPU_WINDOW_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2649 { dsp->base + HALO_MPU_XREG_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2650 { dsp->base + HALO_MPU_YREG_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2651 { dsp->base + HALO_MPU_XMEM_ACCESS_3, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2652 { dsp->base + HALO_MPU_YMEM_ACCESS_3, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2653 { dsp->base + HALO_MPU_WINDOW_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2654 { dsp->base + HALO_MPU_XREG_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2655 { dsp->base + HALO_MPU_YREG_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2656 { dsp->base + HALO_MPU_LOCK_CONFIG, 0 }, in cs_dsp_halo_configure_mpu()
2659 return regmap_multi_reg_write(dsp->regmap, config, ARRAY_SIZE(config)); in cs_dsp_halo_configure_mpu()
2664 * @dsp: pointer to DSP structure
2671 int cs_dsp_set_dspclk(struct cs_dsp *dsp, unsigned int freq) in cs_dsp_set_dspclk() argument
2675 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CLOCKING, in cs_dsp_set_dspclk()
2679 cs_dsp_err(dsp, "Failed to set clock rate: %d\n", ret); in cs_dsp_set_dspclk()
2685 static void cs_dsp_stop_watchdog(struct cs_dsp *dsp) in cs_dsp_stop_watchdog() argument
2687 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_WATCHDOG, in cs_dsp_stop_watchdog()
2691 static void cs_dsp_halo_stop_watchdog(struct cs_dsp *dsp) in cs_dsp_halo_stop_watchdog() argument
2693 regmap_update_bits(dsp->regmap, dsp->base + HALO_WDT_CONTROL, in cs_dsp_halo_stop_watchdog()
2698 * cs_dsp_power_up() - Downloads firmware to the DSP
2699 * @dsp: pointer to DSP structure
2706 * This function is used on ADSP2 and Halo DSP cores, it powers-up the DSP core
2714 int cs_dsp_power_up(struct cs_dsp *dsp, in cs_dsp_power_up() argument
2721 mutex_lock(&dsp->pwr_lock); in cs_dsp_power_up()
2723 dsp->fw_name = fw_name; in cs_dsp_power_up()
2725 if (dsp->ops->enable_memory) { in cs_dsp_power_up()
2726 ret = dsp->ops->enable_memory(dsp); in cs_dsp_power_up()
2731 if (dsp->ops->enable_core) { in cs_dsp_power_up()
2732 ret = dsp->ops->enable_core(dsp); in cs_dsp_power_up()
2737 ret = cs_dsp_load(dsp, wmfw_firmware, wmfw_filename); in cs_dsp_power_up()
2741 ret = dsp->ops->setup_algs(dsp); in cs_dsp_power_up()
2745 ret = cs_dsp_load_coeff(dsp, coeff_firmware, coeff_filename); in cs_dsp_power_up()
2750 ret = cs_dsp_coeff_init_control_caches(dsp); in cs_dsp_power_up()
2754 if (dsp->ops->disable_core) in cs_dsp_power_up()
2755 dsp->ops->disable_core(dsp); in cs_dsp_power_up()
2757 dsp->booted = true; in cs_dsp_power_up()
2759 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_up()
2763 if (dsp->ops->disable_core) in cs_dsp_power_up()
2764 dsp->ops->disable_core(dsp); in cs_dsp_power_up()
2766 if (dsp->ops->disable_memory) in cs_dsp_power_up()
2767 dsp->ops->disable_memory(dsp); in cs_dsp_power_up()
2769 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_up()
2776 * cs_dsp_power_down() - Powers-down the DSP
2777 * @dsp: pointer to DSP structure
2782 void cs_dsp_power_down(struct cs_dsp *dsp) in cs_dsp_power_down() argument
2786 mutex_lock(&dsp->pwr_lock); in cs_dsp_power_down()
2788 cs_dsp_debugfs_clear(dsp); in cs_dsp_power_down()
2790 dsp->fw_id = 0; in cs_dsp_power_down()
2791 dsp->fw_id_version = 0; in cs_dsp_power_down()
2793 dsp->booted = false; in cs_dsp_power_down()
2795 if (dsp->ops->disable_memory) in cs_dsp_power_down()
2796 dsp->ops->disable_memory(dsp); in cs_dsp_power_down()
2798 list_for_each_entry(ctl, &dsp->ctl_list, list) in cs_dsp_power_down()
2801 cs_dsp_free_alg_regions(dsp); in cs_dsp_power_down()
2803 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_down()
2805 cs_dsp_dbg(dsp, "Shutdown complete\n"); in cs_dsp_power_down()
2809 static int cs_dsp_adsp2_start_core(struct cs_dsp *dsp) in cs_dsp_adsp2_start_core() argument
2811 return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_start_core()
2816 static void cs_dsp_adsp2_stop_core(struct cs_dsp *dsp) in cs_dsp_adsp2_stop_core() argument
2818 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_stop_core()
2824 * @dsp: pointer to DSP structure
2830 int cs_dsp_run(struct cs_dsp *dsp) in cs_dsp_run() argument
2834 mutex_lock(&dsp->pwr_lock); in cs_dsp_run()
2836 if (!dsp->booted) { in cs_dsp_run()
2841 if (dsp->ops->enable_core) { in cs_dsp_run()
2842 ret = dsp->ops->enable_core(dsp); in cs_dsp_run()
2847 if (dsp->client_ops->pre_run) { in cs_dsp_run()
2848 ret = dsp->client_ops->pre_run(dsp); in cs_dsp_run()
2854 ret = cs_dsp_coeff_sync_controls(dsp); in cs_dsp_run()
2858 if (dsp->ops->lock_memory) { in cs_dsp_run()
2859 ret = dsp->ops->lock_memory(dsp, dsp->lock_regions); in cs_dsp_run()
2861 cs_dsp_err(dsp, "Error configuring MPU: %d\n", ret); in cs_dsp_run()
2866 if (dsp->ops->start_core) { in cs_dsp_run()
2867 ret = dsp->ops->start_core(dsp); in cs_dsp_run()
2872 dsp->running = true; in cs_dsp_run()
2874 if (dsp->client_ops->post_run) { in cs_dsp_run()
2875 ret = dsp->client_ops->post_run(dsp); in cs_dsp_run()
2880 mutex_unlock(&dsp->pwr_lock); in cs_dsp_run()
2885 if (dsp->ops->stop_core) in cs_dsp_run()
2886 dsp->ops->stop_core(dsp); in cs_dsp_run()
2887 if (dsp->ops->disable_core) in cs_dsp_run()
2888 dsp->ops->disable_core(dsp); in cs_dsp_run()
2889 mutex_unlock(&dsp->pwr_lock); in cs_dsp_run()
2897 * @dsp: pointer to DSP structure
2901 void cs_dsp_stop(struct cs_dsp *dsp) in cs_dsp_stop() argument
2904 cs_dsp_signal_event_controls(dsp, CS_DSP_FW_EVENT_SHUTDOWN); in cs_dsp_stop()
2906 if (dsp->ops->stop_watchdog) in cs_dsp_stop()
2907 dsp->ops->stop_watchdog(dsp); in cs_dsp_stop()
2910 if (dsp->ops->show_fw_status) in cs_dsp_stop()
2911 dsp->ops->show_fw_status(dsp); in cs_dsp_stop()
2913 mutex_lock(&dsp->pwr_lock); in cs_dsp_stop()
2915 if (dsp->client_ops->pre_stop) in cs_dsp_stop()
2916 dsp->client_ops->pre_stop(dsp); in cs_dsp_stop()
2918 dsp->running = false; in cs_dsp_stop()
2920 if (dsp->ops->stop_core) in cs_dsp_stop()
2921 dsp->ops->stop_core(dsp); in cs_dsp_stop()
2922 if (dsp->ops->disable_core) in cs_dsp_stop()
2923 dsp->ops->disable_core(dsp); in cs_dsp_stop()
2925 if (dsp->client_ops->post_stop) in cs_dsp_stop()
2926 dsp->client_ops->post_stop(dsp); in cs_dsp_stop()
2928 mutex_unlock(&dsp->pwr_lock); in cs_dsp_stop()
2930 cs_dsp_dbg(dsp, "Execution stopped\n"); in cs_dsp_stop()
2934 static int cs_dsp_halo_start_core(struct cs_dsp *dsp) in cs_dsp_halo_start_core() argument
2938 ret = regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_start_core()
2944 return regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_start_core()
2948 static void cs_dsp_halo_stop_core(struct cs_dsp *dsp) in cs_dsp_halo_stop_core() argument
2950 regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_stop_core()
2954 regmap_update_bits(dsp->regmap, dsp->base + HALO_CORE_SOFT_RESET, in cs_dsp_halo_stop_core()
2960 * @dsp: pointer to DSP structure
2964 int cs_dsp_adsp2_init(struct cs_dsp *dsp) in cs_dsp_adsp2_init() argument
2968 switch (dsp->rev) { in cs_dsp_adsp2_init()
2971 * Disable the DSP memory by default when in reset for a small in cs_dsp_adsp2_init()
2974 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_init()
2977 cs_dsp_err(dsp, in cs_dsp_adsp2_init()
2982 dsp->ops = &cs_dsp_adsp2_ops[0]; in cs_dsp_adsp2_init()
2985 dsp->ops = &cs_dsp_adsp2_ops[1]; in cs_dsp_adsp2_init()
2988 dsp->ops = &cs_dsp_adsp2_ops[2]; in cs_dsp_adsp2_init()
2992 return cs_dsp_common_init(dsp); in cs_dsp_adsp2_init()
2997 * cs_dsp_halo_init() - Initialise a cs_dsp structure representing a HALO Core DSP
2998 * @dsp: pointer to DSP structure
3002 int cs_dsp_halo_init(struct cs_dsp *dsp) in cs_dsp_halo_init() argument
3004 if (dsp->no_core_startstop) in cs_dsp_halo_init()
3005 dsp->ops = &cs_dsp_halo_ao_ops; in cs_dsp_halo_init()
3007 dsp->ops = &cs_dsp_halo_ops; in cs_dsp_halo_init()
3009 return cs_dsp_common_init(dsp); in cs_dsp_halo_init()
3015 * @dsp: pointer to DSP structure
3017 void cs_dsp_remove(struct cs_dsp *dsp) in cs_dsp_remove() argument
3021 while (!list_empty(&dsp->ctl_list)) { in cs_dsp_remove()
3022 ctl = list_first_entry(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list); in cs_dsp_remove()
3024 if (dsp->client_ops->control_remove) in cs_dsp_remove()
3025 dsp->client_ops->control_remove(ctl); in cs_dsp_remove()
3034 * cs_dsp_read_raw_data_block() - Reads a block of data from DSP memory
3035 * @dsp: pointer to DSP structure
3036 * @mem_type: the type of DSP memory containing the data to be read
3041 * If this is used to read unpacked 24-bit memory, each 24-bit DSP word will
3047 int cs_dsp_read_raw_data_block(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, in cs_dsp_read_raw_data_block() argument
3050 struct cs_dsp_region const *mem = cs_dsp_find_region(dsp, mem_type); in cs_dsp_read_raw_data_block()
3054 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_read_raw_data_block()
3059 reg = dsp->ops->region_to_reg(mem, mem_addr); in cs_dsp_read_raw_data_block()
3061 ret = regmap_raw_read(dsp->regmap, reg, data, in cs_dsp_read_raw_data_block()
3071 * cs_dsp_read_data_word() - Reads a word from DSP memory
3072 * @dsp: pointer to DSP structure
3073 * @mem_type: the type of DSP memory containing the data to be read
3079 int cs_dsp_read_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 *data) in cs_dsp_read_data_word() argument
3084 ret = cs_dsp_read_raw_data_block(dsp, mem_type, mem_addr, 1, &raw); in cs_dsp_read_data_word()
3095 * cs_dsp_write_data_word() - Writes a word to DSP memory
3096 * @dsp: pointer to DSP structure
3097 * @mem_type: the type of DSP memory containing the data to be written
3103 int cs_dsp_write_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 data) in cs_dsp_write_data_word() argument
3105 struct cs_dsp_region const *mem = cs_dsp_find_region(dsp, mem_type); in cs_dsp_write_data_word()
3109 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_write_data_word()
3114 reg = dsp->ops->region_to_reg(mem, mem_addr); in cs_dsp_write_data_word()
3116 return regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_write_data_word()
3122 * @buf: buffer containing DSP words read from DSP memory
3125 * DSP words from the register map have pad bytes and the data bytes
3145 * cs_dsp_adsp2_bus_error() - Handle a DSP bus error interrupt
3146 * @dsp: pointer to DSP structure
3148 * The firmware and DSP state will be logged for future analysis.
3150 void cs_dsp_adsp2_bus_error(struct cs_dsp *dsp) in cs_dsp_adsp2_bus_error() argument
3153 struct regmap *regmap = dsp->regmap; in cs_dsp_adsp2_bus_error()
3156 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp2_bus_error()
3158 ret = regmap_read(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, &val); in cs_dsp_adsp2_bus_error()
3160 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3166 cs_dsp_err(dsp, "watchdog timeout error\n"); in cs_dsp_adsp2_bus_error()
3167 dsp->ops->stop_watchdog(dsp); in cs_dsp_adsp2_bus_error()
3168 if (dsp->client_ops->watchdog_expired) in cs_dsp_adsp2_bus_error()
3169 dsp->client_ops->watchdog_expired(dsp); in cs_dsp_adsp2_bus_error()
3174 cs_dsp_err(dsp, "bus error: address error\n"); in cs_dsp_adsp2_bus_error()
3176 cs_dsp_err(dsp, "bus error: region lock error\n"); in cs_dsp_adsp2_bus_error()
3178 ret = regmap_read(regmap, dsp->base + ADSP2_BUS_ERR_ADDR, &val); in cs_dsp_adsp2_bus_error()
3180 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3186 cs_dsp_err(dsp, "bus error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3190 dsp->base + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR, in cs_dsp_adsp2_bus_error()
3193 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3199 cs_dsp_err(dsp, "xmem error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3201 cs_dsp_err(dsp, "pmem error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3206 regmap_update_bits(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, in cs_dsp_adsp2_bus_error()
3210 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp2_bus_error()
3215 * cs_dsp_halo_bus_error() - Handle a DSP bus error interrupt
3216 * @dsp: pointer to DSP structure
3218 * The firmware and DSP state will be logged for future analysis.
3220 void cs_dsp_halo_bus_error(struct cs_dsp *dsp) in cs_dsp_halo_bus_error() argument
3222 struct regmap *regmap = dsp->regmap; in cs_dsp_halo_bus_error()
3225 { dsp->base + HALO_MPU_XM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3226 { dsp->base + HALO_MPU_YM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3227 { dsp->base + HALO_MPU_PM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3231 mutex_lock(&dsp->pwr_lock); in cs_dsp_halo_bus_error()
3233 ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_1, in cs_dsp_halo_bus_error()
3236 cs_dsp_warn(dsp, "Failed to read AHB DEBUG_1: %d\n", ret); in cs_dsp_halo_bus_error()
3240 cs_dsp_warn(dsp, "AHB: STATUS: 0x%x ADDR: 0x%x\n", in cs_dsp_halo_bus_error()
3245 ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_0, in cs_dsp_halo_bus_error()
3248 cs_dsp_warn(dsp, "Failed to read AHB DEBUG_0: %d\n", ret); in cs_dsp_halo_bus_error()
3252 cs_dsp_warn(dsp, "AHB: SYS_ADDR: 0x%x\n", *fault); in cs_dsp_halo_bus_error()
3254 ret = regmap_bulk_read(regmap, dsp->base + HALO_MPU_XM_VIO_ADDR, in cs_dsp_halo_bus_error()
3257 cs_dsp_warn(dsp, "Failed to read MPU fault info: %d\n", ret); in cs_dsp_halo_bus_error()
3261 cs_dsp_warn(dsp, "XM: STATUS:0x%x ADDR:0x%x\n", fault[1], fault[0]); in cs_dsp_halo_bus_error()
3262 cs_dsp_warn(dsp, "YM: STATUS:0x%x ADDR:0x%x\n", fault[3], fault[2]); in cs_dsp_halo_bus_error()
3263 cs_dsp_warn(dsp, "PM: STATUS:0x%x ADDR:0x%x\n", fault[5], fault[4]); in cs_dsp_halo_bus_error()
3265 ret = regmap_multi_reg_write(dsp->regmap, clear, ARRAY_SIZE(clear)); in cs_dsp_halo_bus_error()
3267 cs_dsp_warn(dsp, "Failed to clear MPU status: %d\n", ret); in cs_dsp_halo_bus_error()
3270 mutex_unlock(&dsp->pwr_lock); in cs_dsp_halo_bus_error()
3275 * cs_dsp_halo_wdt_expire() - Handle DSP watchdog expiry
3276 * @dsp: pointer to DSP structure
3280 void cs_dsp_halo_wdt_expire(struct cs_dsp *dsp) in cs_dsp_halo_wdt_expire() argument
3282 mutex_lock(&dsp->pwr_lock); in cs_dsp_halo_wdt_expire()
3284 cs_dsp_warn(dsp, "WDT Expiry Fault\n"); in cs_dsp_halo_wdt_expire()
3286 dsp->ops->stop_watchdog(dsp); in cs_dsp_halo_wdt_expire()
3287 if (dsp->client_ops->watchdog_expired) in cs_dsp_halo_wdt_expire()
3288 dsp->client_ops->watchdog_expired(dsp); in cs_dsp_halo_wdt_expire()
3290 mutex_unlock(&dsp->pwr_lock); in cs_dsp_halo_wdt_expire()
3382 * cs_dsp_chunk_write() - Format data to a DSP memory chunk
3387 * This function sequentially writes values into the format required for DSP
3389 * big endian. Note that data is only committed to the chunk when a whole DSP
3428 * As cs_dsp_chunk_write only writes data when a whole DSP word is ready to
3430 * function will pad that data with zeros upto a whole DSP word and write out.
3444 * cs_dsp_chunk_read() - Parse data from a DSP memory chunk
3448 * This function sequentially reads values from a DSP memory formatted buffer,
3494 static void cs_dsp_wseq_clear(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) in cs_dsp_wseq_clear() argument
3500 devm_kfree(dsp->dev, op); in cs_dsp_wseq_clear()
3504 static int cs_dsp_populate_wseq(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) in cs_dsp_populate_wseq() argument
3512 cs_dsp_err(dsp, "No control for write sequence\n"); in cs_dsp_populate_wseq()
3522 cs_dsp_err(dsp, "Failed to read %s: %d\n", wseq->ctl->subname, ret); in cs_dsp_populate_wseq()
3531 op = devm_kzalloc(dsp->dev, sizeof(*op), GFP_KERNEL); in cs_dsp_populate_wseq()
3562 cs_dsp_err(dsp, "Unsupported op: %X\n", op->operation); in cs_dsp_populate_wseq()
3563 devm_kfree(dsp->dev, op); in cs_dsp_populate_wseq()
3574 cs_dsp_err(dsp, "%s missing end terminator\n", wseq->ctl->subname); in cs_dsp_populate_wseq()
3585 * cs_dsp_wseq_init() - Initialize write sequences contained within the loaded DSP firmware
3586 * @dsp: Pointer to DSP structure
3592 int cs_dsp_wseq_init(struct cs_dsp *dsp, struct cs_dsp_wseq *wseqs, unsigned int num_wseqs) in cs_dsp_wseq_init() argument
3596 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_wseq_init()
3599 ret = cs_dsp_populate_wseq(dsp, &wseqs[i]); in cs_dsp_wseq_init()
3601 cs_dsp_wseq_clear(dsp, &wseqs[i]); in cs_dsp_wseq_init()
3625 * @dsp: Pointer to a DSP structure
3642 int cs_dsp_wseq_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, in cs_dsp_wseq_write() argument
3657 cs_dsp_err(dsp, "Missing terminator for %s\n", wseq->ctl->subname); in cs_dsp_wseq_write()
3661 op_new = devm_kzalloc(dsp->dev, sizeof(*op_new), GFP_KERNEL); in cs_dsp_wseq_write()
3688 cs_dsp_err(dsp, "Operation %X not supported\n", op_code); in cs_dsp_wseq_write()
3696 cs_dsp_err(dsp, "Not enough memory in %s for entry\n", wseq->ctl->subname); in cs_dsp_wseq_write()
3719 devm_kfree(dsp->dev, op_new); in cs_dsp_wseq_write()
3727 * @dsp: Pointer to a DSP structure
3740 int cs_dsp_wseq_multi_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, in cs_dsp_wseq_multi_write() argument
3747 ret = cs_dsp_wseq_write(dsp, wseq, reg_seq[i].reg, in cs_dsp_wseq_multi_write()
3757 MODULE_DESCRIPTION("Cirrus Logic DSP Support");