617 static inline u32 reg_read(const struct fw_ohci *ohci, int offset)  in reg_read()  function
625 	reg_read(ohci, OHCI1394_Version);  in flush_writes()
641 		val = reg_read(ohci, OHCI1394_PhyControl);  in read_phy_reg()
668 		val = reg_read(ohci, OHCI1394_PhyControl);  in write_phy_reg()
775 	if (reg_read(ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) {  in ar_context_abort()
1371 		reg = reg_read(ohci, CONTROL_SET(ctx->regs));  in context_stop()
1685 		if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) {  in handle_local_lock()
1686 			lock_old = cpu_to_be32(reg_read(ohci,  in handle_local_lock()
1773 	ctl = reg_read(ohci, CONTROL_SET(regs));  in detect_dead_context()
1839 	c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer);  in get_cycle_time()
1844 		c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer);  in get_cycle_time()
1848 			c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer);  in get_cycle_time()
1985 	reg = reg_read(ohci, OHCI1394_NodeID);  in find_and_insert_self_id()
2039 	reg = reg_read(ohci, OHCI1394_NodeID);  in bus_reset_work()
2058 	reg = reg_read(ohci, OHCI1394_SelfIDCount);  in bus_reset_work()
2134 	reg = reg_read(ohci, OHCI1394_SelfIDCount);  in bus_reset_work()
2209 	event = reg_read(ohci, OHCI1394_IntEventClear);  in irq_handler()
2233 			u32 reg = reg_read(ohci, OHCI1394_SelfIDCount);  in irq_handler()
2254 		iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear);  in irq_handler()
2265 		iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear);  in irq_handler()
2279 		reg_read(ohci, OHCI1394_PostedWriteAddressHi);  in irq_handler()
2280 		reg_read(ohci, OHCI1394_PostedWriteAddressLo);  in irq_handler()
2321 		val = reg_read(ohci, OHCI1394_HCControlSet);  in software_reset()
2349 	if (!(reg_read(ohci, OHCI1394_HCControlSet) &  in configure_1394a_enhancements()
2449 		lps = reg_read(ohci, OHCI1394_HCControlSet) &  in ohci_enable()
2489 	version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;  in ohci_enable()
2498 	ohci->pri_req_max = reg_read(ohci, OHCI1394_FairnessControl) & 0x3f;  in ohci_enable()
2761 		    (reg_read(ohci, OHCI1394_LinkControlSet) &  in ohci_read_csr()
2772 		return reg_read(ohci, OHCI1394_NodeID) << 16;  in ohci_read_csr()
2787 		value = reg_read(ohci, OHCI1394_ATRetries);  in ohci_read_csr()
2791 		return (reg_read(ohci, OHCI1394_FairnessControl) & 0x3f) |  in ohci_read_csr()
3785 	ohci->ir_context_support = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet);  in pci_probe()
3795 	ohci->it_context_support = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet);  in pci_probe()
3812 	bus_options = reg_read(ohci, OHCI1394_BusOptions);  in pci_probe()
3815 	guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) |  in pci_probe()
3816 		reg_read(ohci, OHCI1394_GUIDLo);  in pci_probe()
3842 	version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;  in pci_probe()
3848 		    reg_read(ohci, OHCI1394_PhyUpperBound) ?  in pci_probe()
3870 	if (reg_read(ohci, OHCI1394_HCControlSet) & OHCI1394_HCControl_LPS) {  in pci_remove()
3927 	if (!reg_read(ohci, OHCI1394_GUIDLo) &&  in pci_resume()
3928 					!reg_read(ohci, OHCI1394_GUIDHi)) {  in pci_resume()