Lines Matching full:ohci
3 * Driver for OHCI 1394 controllers
42 #include "ohci.h"
53 #define ohci_notice(ohci, f, args...) dev_notice(ohci->card.device, f, ##args) argument
54 #define ohci_err(ohci, f, args...) dev_err(ohci->card.device, f, ##args) argument
96 struct fw_ohci *ohci; member
126 struct fw_ohci *ohci; member
291 static bool has_reboot_by_cycle_timer_read_quirk(const struct fw_ohci *ohci) in has_reboot_by_cycle_timer_read_quirk() argument
293 return !!(ohci->quirks & QUIRK_REBOOT_BY_CYCLE_TIMER_READ); in has_reboot_by_cycle_timer_read_quirk()
323 #define has_reboot_by_cycle_timer_read_quirk(ohci) false argument
409 static void log_irqs(struct fw_ohci *ohci, u32 evt) in log_irqs() argument
414 ohci_notice(ohci, "IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, in log_irqs()
439 static void log_selfids(struct fw_ohci *ohci, int generation, int self_id_count) in log_selfids() argument
455 .cursor = ohci->self_id_buffer, in log_selfids()
462 ohci_notice(ohci, "%d selfIDs, generation %d, local node ID %04x\n", in log_selfids()
463 self_id_count, generation, ohci->node_id); in log_selfids()
475 ohci_notice(ohci, in log_selfids()
488 ohci_notice(ohci, in log_selfids()
527 static void log_ar_at_event(struct fw_ohci *ohci, in log_ar_at_event() argument
558 ohci_notice(ohci, "A%c evt_bus_reset, generation %d\n", in log_ar_at_event()
585 ohci_notice(ohci, "A%c %s, %s\n", in log_ar_at_event()
589 ohci_notice(ohci, "A%c %s, PHY %08x %08x\n", in log_ar_at_event()
597 ohci_notice(ohci, in log_ar_at_event()
604 ohci_notice(ohci, in log_ar_at_event()
612 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) in reg_write() argument
614 writel(data, ohci->registers + offset); in reg_write()
617 static inline u32 reg_read(const struct fw_ohci *ohci, int offset) in reg_read() argument
619 return readl(ohci->registers + offset); in reg_read()
622 static inline void flush_writes(const struct fw_ohci *ohci) in flush_writes() argument
625 reg_read(ohci, OHCI1394_Version); in flush_writes()
630 * read_paged_phy_reg() require the caller to hold ohci->phy_reg_mutex.
634 static int read_phy_reg(struct fw_ohci *ohci, int addr) in read_phy_reg() argument
639 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
641 val = reg_read(ohci, OHCI1394_PhyControl); in read_phy_reg()
655 ohci_err(ohci, "failed to read phy reg %d\n", addr); in read_phy_reg()
661 static int write_phy_reg(const struct fw_ohci *ohci, int addr, u32 val) in write_phy_reg() argument
665 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
668 val = reg_read(ohci, OHCI1394_PhyControl); in write_phy_reg()
678 ohci_err(ohci, "failed to write phy reg %d, val %u\n", addr, val); in write_phy_reg()
684 static int update_phy_reg(struct fw_ohci *ohci, int addr, in update_phy_reg() argument
687 int ret = read_phy_reg(ohci, addr); in update_phy_reg()
698 return write_phy_reg(ohci, addr, (ret & ~clear_bits) | set_bits); in update_phy_reg()
701 static int read_paged_phy_reg(struct fw_ohci *ohci, int page, int addr) in read_paged_phy_reg() argument
705 ret = update_phy_reg(ohci, 7, PHY_PAGE_SELECT, page << 5); in read_paged_phy_reg()
709 return read_phy_reg(ohci, addr); in read_paged_phy_reg()
714 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_phy_reg() local
716 guard(mutex)(&ohci->phy_reg_mutex); in ohci_read_phy_reg()
718 return read_phy_reg(ohci, addr); in ohci_read_phy_reg()
724 struct fw_ohci *ohci = fw_ohci(card); in ohci_update_phy_reg() local
726 guard(mutex)(&ohci->phy_reg_mutex); in ohci_update_phy_reg()
728 return update_phy_reg(ohci, addr, clear_bits, set_bits); in ohci_update_phy_reg()
751 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
756 struct device *dev = ctx->ohci->card.device; in ar_context_release()
773 struct fw_ohci *ohci = ctx->ohci; in ar_context_abort() local
775 if (reg_read(ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { in ar_context_abort()
776 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
777 flush_writes(ohci); in ar_context_abort()
779 ohci_err(ohci, "AR error: %s; DMA stopped\n", error_msg); in ar_context_abort()
861 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
867 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
878 static bool has_be_header_quirk(const struct fw_ohci *ohci) in has_be_header_quirk() argument
880 return !!(ohci->quirks & QUIRK_BE_HEADERS); in has_be_header_quirk()
888 static bool has_be_header_quirk(const struct fw_ohci *ohci) in has_be_header_quirk() argument
896 struct fw_ohci *ohci = ctx->ohci; in handle_ar_packet() local
901 p.header[0] = cond_le32_to_cpu(buffer[0], has_be_header_quirk(ohci)); in handle_ar_packet()
902 p.header[1] = cond_le32_to_cpu(buffer[1], has_be_header_quirk(ohci)); in handle_ar_packet()
903 p.header[2] = cond_le32_to_cpu(buffer[2], has_be_header_quirk(ohci)); in handle_ar_packet()
915 p.header[3] = cond_le32_to_cpu(buffer[3], has_be_header_quirk(ohci)); in handle_ar_packet()
924 p.header[3] = cond_le32_to_cpu(buffer[3], has_be_header_quirk(ohci)); in handle_ar_packet()
949 status = cond_le32_to_cpu(buffer[length], has_be_header_quirk(ohci)); in handle_ar_packet()
955 p.generation = ohci->request_generation; in handle_ar_packet()
957 log_ar_at_event(ohci, 'R', p.speed, p.header, evt); in handle_ar_packet()
967 * The OHCI bus reset handler synthesizes a PHY packet with in handle_ar_packet()
980 if (!(ohci->quirks & QUIRK_RESET_PACKET)) in handle_ar_packet()
981 ohci->request_generation = (p.header[2] >> 16) & 0xff; in handle_ar_packet()
982 } else if (ctx == &ohci->ar_request_ctx) { in handle_ar_packet()
983 fw_core_handle_request(&ohci->card, &p); in handle_ar_packet()
985 fw_core_handle_response(&ohci->card, &p); in handle_ar_packet()
1011 dma_sync_single_for_device(ctx->ohci->card.device, in ar_recycle_buffers()
1065 static int ar_context_init(struct ar_context *ctx, struct fw_ohci *ohci, in ar_context_init() argument
1068 struct device *dev = ohci->card.device; in ar_context_init()
1075 ctx->ohci = ohci; in ar_context_init()
1096 ctx->descriptors = ohci->misc_buffer + descriptors_offset; in ar_context_init()
1097 ctx->descriptors_bus = ohci->misc_buffer_bus + descriptors_offset; in ar_context_init()
1127 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1128 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1177 guard(spinlock_irqsave)(&ctx->ohci->lock); in context_retire_descriptors()
1201 * context. Must be called with ohci->lock held.
1216 desc = dmam_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE, &bus_addr, GFP_ATOMIC); in context_add_buffer()
1237 static int context_init(struct context *ctx, struct fw_ohci *ohci, in context_init() argument
1240 ctx->ohci = ohci; in context_init()
1272 struct fw_card *card = &ctx->ohci->card; in context_release()
1281 /* Must be called with ohci->lock held */
1315 struct fw_ohci *ohci = ctx->ohci; in context_run() local
1317 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1319 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1320 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1322 flush_writes(ohci); in context_run()
1350 if (unlikely(ctx->ohci->quirks & QUIRK_IR_WAKE) && in context_append()
1363 struct fw_ohci *ohci = ctx->ohci; in context_stop() local
1367 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1371 reg = reg_read(ohci, CONTROL_SET(ctx->regs)); in context_stop()
1378 ohci_err(ohci, "DMA context still active (0x%08x)\n", reg); in context_stop()
1394 struct fw_ohci *ohci = ctx->ohci; in at_context_queue_packet() local
1431 if (ctx == &ctx->ohci->at_response_ctx) { in at_context_queue_packet()
1482 payload_bus = dma_map_single(ohci->card.device, in at_context_queue_packet()
1486 if (dma_mapping_error(ohci->card.device, payload_bus)) { in at_context_queue_packet()
1512 if (ohci->generation != packet->generation) { in at_context_queue_packet()
1514 dma_unmap_single(ohci->card.device, payload_bus, in at_context_queue_packet()
1523 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1547 struct fw_ohci *ohci = context->ohci; in handle_at_packet() local
1561 dma_unmap_single(ohci->card.device, packet->payload_bus, in handle_at_packet()
1567 log_ar_at_event(ohci, 'T', packet->speed, packet->header, evt); in handle_at_packet()
1617 packet->callback(packet, &ohci->card, packet->ack); in handle_at_packet()
1622 static u32 get_cycle_time(struct fw_ohci *ohci);
1624 static void handle_local_rom(struct fw_ohci *ohci, in handle_local_rom() argument
1645 (void *) ohci->config_rom + i, length); in handle_local_rom()
1649 response.timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci)); in handle_local_rom()
1650 fw_core_handle_response(&ohci->card, &response); in handle_local_rom()
1653 static void handle_local_lock(struct fw_ohci *ohci, in handle_local_lock() argument
1680 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1681 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1682 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1685 if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { in handle_local_lock()
1686 lock_old = cpu_to_be32(reg_read(ohci, in handle_local_lock()
1694 ohci_err(ohci, "swap not done (CSR lock timeout)\n"); in handle_local_lock()
1699 response.timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci)); in handle_local_lock()
1700 fw_core_handle_response(&ohci->card, &response); in handle_local_lock()
1707 if (ctx == &ctx->ohci->at_request_ctx) { in handle_local_request()
1709 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1717 handle_local_rom(ctx->ohci, packet, csr); in handle_local_request()
1723 handle_local_lock(ctx->ohci, packet, csr); in handle_local_request()
1726 if (ctx == &ctx->ohci->at_request_ctx) in handle_local_request()
1727 fw_core_handle_request(&ctx->ohci->card, packet); in handle_local_request()
1729 fw_core_handle_response(&ctx->ohci->card, packet); in handle_local_request()
1733 if (ctx == &ctx->ohci->at_response_ctx) { in handle_local_request()
1735 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1744 spin_lock_irqsave(&ctx->ohci->lock, flags); in at_context_transmit()
1746 if (async_header_get_destination(packet->header) == ctx->ohci->node_id && in at_context_transmit()
1747 ctx->ohci->generation == packet->generation) { in at_context_transmit()
1748 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1751 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ctx->ohci)); in at_context_transmit()
1758 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1762 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ctx->ohci)); in at_context_transmit()
1764 packet->callback(packet, &ctx->ohci->card, packet->ack); in at_context_transmit()
1768 static void detect_dead_context(struct fw_ohci *ohci, in detect_dead_context() argument
1773 ctl = reg_read(ohci, CONTROL_SET(regs)); in detect_dead_context()
1775 ohci_err(ohci, "DMA context %s has stopped, error code: %s\n", in detect_dead_context()
1779 static void handle_dead_contexts(struct fw_ohci *ohci) in handle_dead_contexts() argument
1784 detect_dead_context(ohci, "ATReq", OHCI1394_AsReqTrContextBase); in handle_dead_contexts()
1785 detect_dead_context(ohci, "ATRsp", OHCI1394_AsRspTrContextBase); in handle_dead_contexts()
1786 detect_dead_context(ohci, "ARReq", OHCI1394_AsReqRcvContextBase); in handle_dead_contexts()
1787 detect_dead_context(ohci, "ARRsp", OHCI1394_AsRspRcvContextBase); in handle_dead_contexts()
1789 if (!(ohci->it_context_support & (1 << i))) in handle_dead_contexts()
1792 detect_dead_context(ohci, name, OHCI1394_IsoXmitContextBase(i)); in handle_dead_contexts()
1795 if (!(ohci->ir_context_support & (1 << i))) in handle_dead_contexts()
1798 detect_dead_context(ohci, name, OHCI1394_IsoRcvContextBase(i)); in handle_dead_contexts()
1829 static u32 get_cycle_time(struct fw_ohci *ohci) in get_cycle_time() argument
1836 if (has_reboot_by_cycle_timer_read_quirk(ohci)) in get_cycle_time()
1839 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1841 if (ohci->quirks & QUIRK_CYCLE_TIMER) { in get_cycle_time()
1844 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1848 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1868 static u32 update_bus_time(struct fw_ohci *ohci) in update_bus_time() argument
1870 u32 cycle_time_seconds = get_cycle_time(ohci) >> 25; in update_bus_time()
1872 if (unlikely(!ohci->bus_time_running)) { in update_bus_time()
1873 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1874 ohci->bus_time = (lower_32_bits(ktime_get_seconds()) & ~0x7f) | in update_bus_time()
1876 ohci->bus_time_running = true; in update_bus_time()
1879 if ((ohci->bus_time & 0x40) != (cycle_time_seconds & 0x40)) in update_bus_time()
1880 ohci->bus_time += 0x40; in update_bus_time()
1882 return ohci->bus_time | cycle_time_seconds; in update_bus_time()
1885 static int get_status_for_port(struct fw_ohci *ohci, int port_index, in get_status_for_port() argument
1890 scoped_guard(mutex, &ohci->phy_reg_mutex) { in get_status_for_port()
1891 reg = write_phy_reg(ohci, 7, port_index); in get_status_for_port()
1895 reg = read_phy_reg(ohci, 8); in get_status_for_port()
1918 static int get_self_id_pos(struct fw_ohci *ohci, u32 self_id, in get_self_id_pos() argument
1925 u32 entry = ohci->self_id_buffer[i]; in get_self_id_pos()
1936 static int detect_initiated_reset(struct fw_ohci *ohci, bool *is_initiated_reset) in detect_initiated_reset() argument
1940 guard(mutex)(&ohci->phy_reg_mutex); in detect_initiated_reset()
1943 reg = write_phy_reg(ohci, 7, 0xe0); in detect_initiated_reset()
1947 reg = read_phy_reg(ohci, 8); in detect_initiated_reset()
1953 reg = write_phy_reg(ohci, 8, reg); in detect_initiated_reset()
1958 reg = read_phy_reg(ohci, 12); in detect_initiated_reset()
1973 static int find_and_insert_self_id(struct fw_ohci *ohci, int self_id_count) in find_and_insert_self_id() argument
1985 reg = reg_read(ohci, OHCI1394_NodeID); in find_and_insert_self_id()
1987 ohci_notice(ohci, in find_and_insert_self_id()
1993 reg = ohci_read_phy_reg(&ohci->card, 4); in find_and_insert_self_id()
1998 reg = ohci_read_phy_reg(&ohci->card, 1); in find_and_insert_self_id()
2006 err = get_status_for_port(ohci, i, &status); in find_and_insert_self_id()
2013 err = detect_initiated_reset(ohci, &is_initiated_reset); in find_and_insert_self_id()
2018 pos = get_self_id_pos(ohci, self_id, self_id_count); in find_and_insert_self_id()
2020 memmove(&(ohci->self_id_buffer[pos+1]), in find_and_insert_self_id()
2021 &(ohci->self_id_buffer[pos]), in find_and_insert_self_id()
2022 (self_id_count - pos) * sizeof(*ohci->self_id_buffer)); in find_and_insert_self_id()
2023 ohci->self_id_buffer[pos] = self_id; in find_and_insert_self_id()
2031 struct fw_ohci *ohci = in bus_reset_work() local
2039 reg = reg_read(ohci, OHCI1394_NodeID); in bus_reset_work()
2041 ohci_notice(ohci, in bus_reset_work()
2046 ohci_notice(ohci, "malconfigured bus\n"); in bus_reset_work()
2049 ohci->node_id = reg & (OHCI1394_NodeID_busNumber | in bus_reset_work()
2053 if (!(ohci->is_root && is_new_root)) in bus_reset_work()
2054 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
2056 ohci->is_root = is_new_root; in bus_reset_work()
2058 reg = reg_read(ohci, OHCI1394_SelfIDCount); in bus_reset_work()
2060 ohci_notice(ohci, "self ID receive error\n"); in bus_reset_work()
2072 ohci_notice(ohci, "bad selfIDSize (%08x)\n", reg); in bus_reset_work()
2076 quadlet = cond_le32_to_cpu(ohci->self_id[0], has_be_header_quirk(ohci)); in bus_reset_work()
2081 u32 id = cond_le32_to_cpu(ohci->self_id[i], has_be_header_quirk(ohci)); in bus_reset_work()
2082 u32 id2 = cond_le32_to_cpu(ohci->self_id[i + 1], has_be_header_quirk(ohci)); in bus_reset_work()
2093 ohci_notice(ohci, "ignoring spurious self IDs\n"); in bus_reset_work()
2098 ohci_notice(ohci, "bad self ID %d/%d (%08x != ~%08x)\n", in bus_reset_work()
2102 ohci->self_id_buffer[j] = id; in bus_reset_work()
2105 if (ohci->quirks & QUIRK_TI_SLLZ059) { in bus_reset_work()
2106 self_id_count = find_and_insert_self_id(ohci, self_id_count); in bus_reset_work()
2108 ohci_notice(ohci, in bus_reset_work()
2115 ohci_notice(ohci, "no self IDs\n"); in bus_reset_work()
2125 * will read out inconsistent data. The OHCI specification in bus_reset_work()
2134 reg = reg_read(ohci, OHCI1394_SelfIDCount); in bus_reset_work()
2137 ohci_notice(ohci, "new bus reset, discarding self ids\n"); in bus_reset_work()
2142 scoped_guard(spinlock_irq, &ohci->lock) { in bus_reset_work()
2143 ohci->generation = -1; // prevent AT packet queueing in bus_reset_work()
2144 context_stop(&ohci->at_request_ctx); in bus_reset_work()
2145 context_stop(&ohci->at_response_ctx); in bus_reset_work()
2149 * Per OHCI 1.2 draft, clause 7.2.3.3, hardware may leave unsent in bus_reset_work()
2151 * Some OHCI 1.1 controllers (JMicron) apparently require this too. in bus_reset_work()
2153 at_context_flush(&ohci->at_request_ctx); in bus_reset_work()
2154 at_context_flush(&ohci->at_response_ctx); in bus_reset_work()
2156 scoped_guard(spinlock_irq, &ohci->lock) { in bus_reset_work()
2157 ohci->generation = generation; in bus_reset_work()
2158 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2159 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset); in bus_reset_work()
2161 if (ohci->quirks & QUIRK_RESET_PACKET) in bus_reset_work()
2162 ohci->request_generation = generation; in bus_reset_work()
2169 if (ohci->next_config_rom != NULL) { in bus_reset_work()
2170 if (ohci->next_config_rom != ohci->config_rom) { in bus_reset_work()
2171 free_rom = ohci->config_rom; in bus_reset_work()
2172 free_rom_bus = ohci->config_rom_bus; in bus_reset_work()
2174 ohci->config_rom = ohci->next_config_rom; in bus_reset_work()
2175 ohci->config_rom_bus = ohci->next_config_rom_bus; in bus_reset_work()
2176 ohci->next_config_rom = NULL; in bus_reset_work()
2181 reg_write(ohci, OHCI1394_BusOptions, be32_to_cpu(ohci->config_rom[2])); in bus_reset_work()
2182 ohci->config_rom[0] = ohci->next_header; in bus_reset_work()
2183 reg_write(ohci, OHCI1394_ConfigROMhdr, be32_to_cpu(ohci->next_header)); in bus_reset_work()
2187 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2188 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2193 dmam_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, free_rom, free_rom_bus); in bus_reset_work()
2195 log_selfids(ohci, generation, self_id_count); in bus_reset_work()
2197 fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, in bus_reset_work()
2198 self_id_count, ohci->self_id_buffer, in bus_reset_work()
2199 ohci->csr_state_setclear_abdicate); in bus_reset_work()
2200 ohci->csr_state_setclear_abdicate = false; in bus_reset_work()
2205 struct fw_ohci *ohci = data; in irq_handler() local
2209 event = reg_read(ohci, OHCI1394_IntEventClear); in irq_handler()
2215 dev_notice_ratelimited(ohci->card.device, in irq_handler()
2221 * (OHCI 1.1 clauses 7.2.3.2 and 13.2.8.1) in irq_handler()
2223 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2225 trace_irqs(ohci->card.index, event); in irq_handler()
2226 log_irqs(ohci, event); in irq_handler()
2229 reg_write(ohci, OHCI1394_IntMaskClear, OHCI1394_busReset); in irq_handler()
2233 u32 reg = reg_read(ohci, OHCI1394_SelfIDCount); in irq_handler()
2235 trace_self_id_complete(ohci->card.index, reg, ohci->self_id, in irq_handler()
2236 has_be_header_quirk(ohci)); in irq_handler()
2238 queue_work(selfid_workqueue, &ohci->bus_reset_work); in irq_handler()
2242 tasklet_schedule(&ohci->ar_request_ctx.tasklet); in irq_handler()
2245 tasklet_schedule(&ohci->ar_response_ctx.tasklet); in irq_handler()
2248 tasklet_schedule(&ohci->at_request_ctx.tasklet); in irq_handler()
2251 tasklet_schedule(&ohci->at_response_ctx.tasklet); in irq_handler()
2254 iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear); in irq_handler()
2255 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2259 fw_iso_context_schedule_flush_completions(&ohci->ir_context_list[i].base); in irq_handler()
2265 iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear); in irq_handler()
2266 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2270 fw_iso_context_schedule_flush_completions(&ohci->it_context_list[i].base); in irq_handler()
2276 ohci_err(ohci, "register access failure\n"); in irq_handler()
2279 reg_read(ohci, OHCI1394_PostedWriteAddressHi); in irq_handler()
2280 reg_read(ohci, OHCI1394_PostedWriteAddressLo); in irq_handler()
2281 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2283 dev_err_ratelimited(ohci->card.device, "PCI posted write error\n"); in irq_handler()
2287 dev_notice_ratelimited(ohci->card.device, "isochronous cycle too long\n"); in irq_handler()
2288 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2299 dev_notice_ratelimited(ohci->card.device, "isochronous cycle inconsistent\n"); in irq_handler()
2303 handle_dead_contexts(ohci); in irq_handler()
2306 guard(spinlock)(&ohci->lock); in irq_handler()
2307 update_bus_time(ohci); in irq_handler()
2309 flush_writes(ohci); in irq_handler()
2314 static int software_reset(struct fw_ohci *ohci) in software_reset() argument
2319 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2321 val = reg_read(ohci, OHCI1394_HCControlSet); in software_reset()
2343 static int configure_1394a_enhancements(struct fw_ohci *ohci) in configure_1394a_enhancements() argument
2349 if (!(reg_read(ohci, OHCI1394_HCControlSet) & in configure_1394a_enhancements()
2355 ret = read_phy_reg(ohci, 2); in configure_1394a_enhancements()
2359 ret = read_paged_phy_reg(ohci, 1, 8); in configure_1394a_enhancements()
2366 if (ohci->quirks & QUIRK_NO_1394A) in configure_1394a_enhancements()
2377 ret = update_phy_reg(ohci, 5, clear, set); in configure_1394a_enhancements()
2385 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2388 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2394 static int probe_tsb41ba3d(struct fw_ohci *ohci) in probe_tsb41ba3d() argument
2400 reg = read_phy_reg(ohci, 2); in probe_tsb41ba3d()
2407 reg = read_paged_phy_reg(ohci, 1, i + 10); in probe_tsb41ba3d()
2419 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable() local
2423 ret = software_reset(ohci); in ohci_enable()
2425 ohci_err(ohci, "failed to reset ohci card\n"); in ohci_enable()
2442 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2445 flush_writes(ohci); in ohci_enable()
2449 lps = reg_read(ohci, OHCI1394_HCControlSet) & in ohci_enable()
2454 ohci_err(ohci, "failed to set Link Power Status\n"); in ohci_enable()
2458 if (ohci->quirks & QUIRK_TI_SLLZ059) { in ohci_enable()
2459 ret = probe_tsb41ba3d(ohci); in ohci_enable()
2463 ohci_notice(ohci, "local TSB41BA3D phy\n"); in ohci_enable()
2465 ohci->quirks &= ~QUIRK_TI_SLLZ059; in ohci_enable()
2468 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2471 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2472 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2476 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2482 ohci->bus_time_running = false; in ohci_enable()
2485 if (ohci->ir_context_support & (1 << i)) in ohci_enable()
2486 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2489 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in ohci_enable()
2491 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2497 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2498 ohci->pri_req_max = reg_read(ohci, OHCI1394_FairnessControl) & 0x3f; in ohci_enable()
2499 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2500 card->priority_budget_implemented = ohci->pri_req_max != 0; in ohci_enable()
2502 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2503 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2504 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2506 ret = configure_1394a_enhancements(ohci); in ohci_enable()
2522 * OHCI requires that ConfigROMhdr and BusOptions have valid in ohci_enable()
2535 ohci->next_config_rom = dmam_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_enable()
2536 &ohci->next_config_rom_bus, GFP_KERNEL); in ohci_enable()
2537 if (ohci->next_config_rom == NULL) in ohci_enable()
2540 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_enable()
2546 ohci->next_config_rom = ohci->config_rom; in ohci_enable()
2547 ohci->next_config_rom_bus = ohci->config_rom_bus; in ohci_enable()
2550 ohci->next_header = ohci->next_config_rom[0]; in ohci_enable()
2551 ohci->next_config_rom[0] = 0; in ohci_enable()
2552 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2553 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2554 be32_to_cpu(ohci->next_config_rom[2])); in ohci_enable()
2555 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2557 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2570 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2572 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2576 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2580 ar_context_run(&ohci->ar_request_ctx); in ohci_enable()
2581 ar_context_run(&ohci->ar_response_ctx); in ohci_enable()
2583 flush_writes(ohci); in ohci_enable()
2586 fw_schedule_bus_reset(&ohci->card, false, true); in ohci_enable()
2594 struct fw_ohci *ohci; in ohci_set_config_rom() local
2598 ohci = fw_ohci(card); in ohci_set_config_rom()
2601 * When the OHCI controller is enabled, the config rom update in ohci_set_config_rom()
2603 * section 5.5.6 in the OHCI specification. in ohci_set_config_rom()
2605 * The OHCI controller caches the new config rom address in a in ohci_set_config_rom()
2623 * We use ohci->lock to avoid racing with the code that sets in ohci_set_config_rom()
2624 * ohci->next_config_rom to NULL (see bus_reset_work). in ohci_set_config_rom()
2627 next_config_rom = dmam_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_set_config_rom()
2632 scoped_guard(spinlock_irq, &ohci->lock) { in ohci_set_config_rom()
2634 // into the ohci->next_config_rom and then mark the local variable as null so that in ohci_set_config_rom()
2639 if (ohci->next_config_rom == NULL) { in ohci_set_config_rom()
2640 ohci->next_config_rom = next_config_rom; in ohci_set_config_rom()
2641 ohci->next_config_rom_bus = next_config_rom_bus; in ohci_set_config_rom()
2645 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_set_config_rom()
2647 ohci->next_header = config_rom[0]; in ohci_set_config_rom()
2648 ohci->next_config_rom[0] = 0; in ohci_set_config_rom()
2650 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2655 dmam_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, next_config_rom, in ohci_set_config_rom()
2662 * mappings in the bus reset tasklet, since the OHCI in ohci_set_config_rom()
2667 fw_schedule_bus_reset(&ohci->card, true, true); in ohci_set_config_rom()
2674 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_request() local
2676 at_context_transmit(&ohci->at_request_ctx, packet); in ohci_send_request()
2681 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_response() local
2683 at_context_transmit(&ohci->at_response_ctx, packet); in ohci_send_response()
2688 struct fw_ohci *ohci = fw_ohci(card); in ohci_cancel_packet() local
2689 struct context *ctx = &ohci->at_request_ctx; in ohci_cancel_packet()
2699 dma_unmap_single(ohci->card.device, packet->payload_bus, in ohci_cancel_packet()
2702 log_ar_at_event(ohci, 'T', packet->speed, packet->header, 0x20); in ohci_cancel_packet()
2707 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci)); in ohci_cancel_packet()
2709 packet->callback(packet, &ohci->card, packet->ack); in ohci_cancel_packet()
2720 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable_phys_dma() local
2731 guard(spinlock_irqsave)(&ohci->lock); in ohci_enable_phys_dma()
2733 if (ohci->generation != generation) in ohci_enable_phys_dma()
2743 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2745 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2747 flush_writes(ohci); in ohci_enable_phys_dma()
2754 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_csr() local
2760 if (ohci->is_root && in ohci_read_csr()
2761 (reg_read(ohci, OHCI1394_LinkControlSet) & in ohci_read_csr()
2766 if (ohci->csr_state_setclear_abdicate) in ohci_read_csr()
2772 return reg_read(ohci, OHCI1394_NodeID) << 16; in ohci_read_csr()
2775 return get_cycle_time(ohci); in ohci_read_csr()
2783 guard(spinlock_irqsave)(&ohci->lock); in ohci_read_csr()
2784 return update_bus_time(ohci); in ohci_read_csr()
2787 value = reg_read(ohci, OHCI1394_ATRetries); in ohci_read_csr()
2791 return (reg_read(ohci, OHCI1394_FairnessControl) & 0x3f) | in ohci_read_csr()
2792 (ohci->pri_req_max << 8); in ohci_read_csr()
2802 struct fw_ohci *ohci = fw_ohci(card); in ohci_write_csr() local
2806 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2807 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2809 flush_writes(ohci); in ohci_write_csr()
2812 ohci->csr_state_setclear_abdicate = false; in ohci_write_csr()
2816 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2817 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2819 flush_writes(ohci); in ohci_write_csr()
2822 ohci->csr_state_setclear_abdicate = true; in ohci_write_csr()
2826 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2827 flush_writes(ohci); in ohci_write_csr()
2831 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2832 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2834 flush_writes(ohci); in ohci_write_csr()
2839 guard(spinlock_irqsave)(&ohci->lock); in ohci_write_csr()
2840 ohci->bus_time = (update_bus_time(ohci) & 0x40) | (value & ~0x7f); in ohci_write_csr()
2846 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2847 flush_writes(ohci); in ohci_write_csr()
2851 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2852 flush_writes(ohci); in ohci_write_csr()
2920 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_packet_per_buffer()
2959 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_buffer_fill()
2979 dma_sync_single_range_for_cpu(ctx->context.ohci->card.device, in flush_ir_buffer_fill()
3020 dma_sync_single_range_for_cpu(context->ohci->card.device, in sync_it_packet_for_cpu()
3067 static void set_multichannel_mask(struct fw_ohci *ohci, u64 channels) in set_multichannel_mask() argument
3071 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
3072 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
3073 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
3074 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
3075 ohci->mc_channels = channels; in set_multichannel_mask()
3081 struct fw_ohci *ohci = fw_ohci(card); in ohci_allocate_iso_context() local
3088 scoped_guard(spinlock_irq, &ohci->lock) { in ohci_allocate_iso_context()
3091 mask = &ohci->it_context_mask; in ohci_allocate_iso_context()
3097 ctx = &ohci->it_context_list[index]; in ohci_allocate_iso_context()
3102 channels = &ohci->ir_context_channels; in ohci_allocate_iso_context()
3103 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
3110 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
3115 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
3117 index = !ohci->mc_allocated ? ffs(*mask) - 1 : -1; in ohci_allocate_iso_context()
3119 ohci->mc_allocated = true; in ohci_allocate_iso_context()
3122 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
3142 ret = context_init(&ctx->context, ohci, regs, callback); in ohci_allocate_iso_context()
3148 set_multichannel_mask(ohci, 0); in ohci_allocate_iso_context()
3157 scoped_guard(spinlock_irq, &ohci->lock) { in ohci_allocate_iso_context()
3164 ohci->mc_allocated = false; in ohci_allocate_iso_context()
3177 struct fw_ohci *ohci = ctx->context.ohci; in ohci_start_iso() local
3187 index = ctx - ohci->it_context_list; in ohci_start_iso()
3193 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3194 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3202 index = ctx - ohci->ir_context_list; in ohci_start_iso()
3209 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3210 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3211 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3225 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_stop_iso() local
3231 index = ctx - ohci->it_context_list; in ohci_stop_iso()
3232 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3237 index = ctx - ohci->ir_context_list; in ohci_stop_iso()
3238 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3241 flush_writes(ohci); in ohci_stop_iso()
3249 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_free_iso_context() local
3257 guard(spinlock_irqsave)(&ohci->lock); in ohci_free_iso_context()
3261 index = ctx - ohci->it_context_list; in ohci_free_iso_context()
3262 ohci->it_context_mask |= 1 << index; in ohci_free_iso_context()
3266 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3267 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3268 ohci->ir_context_channels |= 1ULL << base->channel; in ohci_free_iso_context()
3272 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3273 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3274 ohci->ir_context_channels |= ohci->mc_channels; in ohci_free_iso_context()
3275 ohci->mc_channels = 0; in ohci_free_iso_context()
3276 ohci->mc_allocated = false; in ohci_free_iso_context()
3283 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_set_iso_channels() local
3288 guard(spinlock_irqsave)(&ohci->lock); in ohci_set_iso_channels()
3291 if (~ohci->ir_context_channels & ~ohci->mc_channels & *channels) { in ohci_set_iso_channels()
3292 *channels = ohci->ir_context_channels; in ohci_set_iso_channels()
3295 set_multichannel_mask(ohci, *channels); in ohci_set_iso_channels()
3305 static void ohci_resume_iso_dma(struct fw_ohci *ohci) in ohci_resume_iso_dma() argument
3310 for (i = 0 ; i < ohci->n_ir ; i++) { in ohci_resume_iso_dma()
3311 ctx = &ohci->ir_context_list[i]; in ohci_resume_iso_dma()
3316 for (i = 0 ; i < ohci->n_it ; i++) { in ohci_resume_iso_dma()
3317 ctx = &ohci->it_context_list[i]; in ohci_resume_iso_dma()
3405 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_transmit()
3433 struct device *device = ctx->context.ohci->card.device; in queue_iso_packet_per_buffer()
3441 * The OHCI controller puts the isochronous header and trailer in the in queue_iso_packet_per_buffer()
3551 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_buffer_fill()
3572 guard(spinlock_irqsave)(&ctx->context.ohci->lock); in ohci_queue_iso()
3591 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3677 struct fw_ohci *ohci = pci_get_drvdata(pdev); in release_ohci() local
3681 ar_context_release(&ohci->ar_response_ctx); in release_ohci()
3682 ar_context_release(&ohci->ar_request_ctx); in release_ohci()
3684 dev_notice(dev, "removed fw-ohci device\n"); in release_ohci()
3690 struct fw_ohci *ohci; in pci_probe() local
3701 ohci = devres_alloc(release_ohci, sizeof(*ohci), GFP_KERNEL); in pci_probe()
3702 if (ohci == NULL) in pci_probe()
3704 fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev); in pci_probe()
3705 pci_set_drvdata(dev, ohci); in pci_probe()
3707 devres_add(&dev->dev, ohci); in pci_probe()
3711 dev_err(&dev->dev, "failed to enable OHCI hardware\n"); in pci_probe()
3718 spin_lock_init(&ohci->lock); in pci_probe()
3719 mutex_init(&ohci->phy_reg_mutex); in pci_probe()
3721 INIT_WORK(&ohci->bus_reset_work, bus_reset_work); in pci_probe()
3725 ohci_err(ohci, "invalid MMIO resource\n"); in pci_probe()
3731 ohci_err(ohci, "request and map MMIO resource unavailable\n"); in pci_probe()
3734 ohci->registers = pcim_iomap_table(dev)[0]; in pci_probe()
3742 ohci->quirks = ohci_quirks[i].flags; in pci_probe()
3746 ohci->quirks = param_quirks; in pci_probe()
3749 ohci->quirks |= QUIRK_REBOOT_BY_CYCLE_TIMER_READ; in pci_probe()
3758 ohci->misc_buffer = dmam_alloc_coherent(&dev->dev, PAGE_SIZE, &ohci->misc_buffer_bus, in pci_probe()
3760 if (!ohci->misc_buffer) in pci_probe()
3763 err = ar_context_init(&ohci->ar_request_ctx, ohci, 0, in pci_probe()
3768 err = ar_context_init(&ohci->ar_response_ctx, ohci, PAGE_SIZE/4, in pci_probe()
3773 err = context_init(&ohci->at_request_ctx, ohci, in pci_probe()
3778 err = context_init(&ohci->at_response_ctx, ohci, in pci_probe()
3783 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3784 ohci->ir_context_channels = ~0ULL; in pci_probe()
3785 ohci->ir_context_support = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); in pci_probe()
3786 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3787 ohci->ir_context_mask = ohci->ir_context_support; in pci_probe()
3788 ohci->n_ir = hweight32(ohci->ir_context_mask); in pci_probe()
3789 size = sizeof(struct iso_context) * ohci->n_ir; in pci_probe()
3790 ohci->ir_context_list = devm_kzalloc(&dev->dev, size, GFP_KERNEL); in pci_probe()
3791 if (!ohci->ir_context_list) in pci_probe()
3794 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3795 ohci->it_context_support = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); in pci_probe()
3797 if (!ohci->it_context_support) { in pci_probe()
3798 ohci_notice(ohci, "overriding IsoXmitIntMask\n"); in pci_probe()
3799 ohci->it_context_support = 0xf; in pci_probe()
3801 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3802 ohci->it_context_mask = ohci->it_context_support; in pci_probe()
3803 ohci->n_it = hweight32(ohci->it_context_mask); in pci_probe()
3804 size = sizeof(struct iso_context) * ohci->n_it; in pci_probe()
3805 ohci->it_context_list = devm_kzalloc(&dev->dev, size, GFP_KERNEL); in pci_probe()
3806 if (!ohci->it_context_list) in pci_probe()
3809 ohci->self_id = ohci->misc_buffer + PAGE_SIZE/2; in pci_probe()
3810 ohci->self_id_bus = ohci->misc_buffer_bus + PAGE_SIZE/2; in pci_probe()
3812 bus_options = reg_read(ohci, OHCI1394_BusOptions); in pci_probe()
3815 guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) | in pci_probe()
3816 reg_read(ohci, OHCI1394_GUIDLo); in pci_probe()
3819 if (!(ohci->quirks & QUIRK_NO_MSI)) in pci_probe()
3832 ohci); in pci_probe()
3834 ohci_err(ohci, "failed to allocate interrupt %d\n", irq); in pci_probe()
3838 err = fw_card_add(&ohci->card, max_receive, link_speed, guid, ohci->n_it + ohci->n_ir); in pci_probe()
3842 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in pci_probe()
3843 ohci_notice(ohci, in pci_probe()
3844 "added OHCI v%x.%x device as card %d, " in pci_probe()
3846 version >> 16, version & 0xff, ohci->card.index, in pci_probe()
3847 ohci->n_ir, ohci->n_it, ohci->quirks, in pci_probe()
3848 reg_read(ohci, OHCI1394_PhyUpperBound) ? in pci_probe()
3854 free_irq(irq, ohci); in pci_probe()
3863 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_remove() local
3870 if (reg_read(ohci, OHCI1394_HCControlSet) & OHCI1394_HCControl_LPS) { in pci_remove()
3871 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3872 flush_writes(ohci); in pci_remove()
3874 cancel_work_sync(&ohci->bus_reset_work); in pci_remove()
3875 fw_core_remove_card(&ohci->card); in pci_remove()
3882 software_reset(ohci); in pci_remove()
3886 free_irq(irq, ohci); in pci_remove()
3889 dev_notice(&dev->dev, "removing fw-ohci device\n"); in pci_remove()
3895 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_suspend() local
3898 software_reset(ohci); in pci_suspend()
3901 ohci_err(ohci, "pci_save_state failed\n"); in pci_suspend()
3906 ohci_err(ohci, "pci_set_power_state failed with %d\n", err); in pci_suspend()
3914 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_resume() local
3922 ohci_err(ohci, "pci_enable_device failed\n"); in pci_resume()
3927 if (!reg_read(ohci, OHCI1394_GUIDLo) && in pci_resume()
3928 !reg_read(ohci, OHCI1394_GUIDHi)) { in pci_resume()
3929 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3930 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()
3933 err = ohci_enable(&ohci->card, NULL, 0); in pci_resume()
3937 ohci_resume_iso_dma(ohci); in pci_resume()
3980 MODULE_DESCRIPTION("Driver for PCI OHCI IEEE1394 controllers");