Lines Matching +full:ras +full:- +full:to +full:- +full:cas
12 * Intel 5000X Chipset Memory Controller Hub (MCH) - Datasheet
102 /* Non-Retry or redundant Retry errors */
276 /* Defines to extract the various fields from the
277 * MTRx - Memory Technology Registers
290 /* enables the report of miscellaneous messages as CE errors - default off */
363 u32 ferr_nf_fbd; /* First Errors Non-Fatal */
364 u32 nerr_nf_fbd; /* Next Errors Non-Fatal */
372 * Non-Recoverable Error */
373 u16 nrecmema; /* Non-Recoverable Mem log A */
374 u32 nrecmemb; /* Non-Recoverable Mem log B */
391 pvt = mci->pvt_info; in i5000_get_error_info()
394 pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value); in i5000_get_error_info()
403 info->ferr_fat_fbd = value; in i5000_get_error_info()
406 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
407 NERR_FAT_FBD, &info->nerr_fat_fbd); in i5000_get_error_info()
408 pci_read_config_word(pvt->branchmap_werrors, in i5000_get_error_info()
409 NRECMEMA, &info->nrecmema); in i5000_get_error_info()
410 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
411 NRECMEMB, &info->nrecmemb); in i5000_get_error_info()
414 pci_write_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
417 info->ferr_fat_fbd = 0; in i5000_get_error_info()
418 info->nerr_fat_fbd = 0; in i5000_get_error_info()
419 info->nrecmema = 0; in i5000_get_error_info()
420 info->nrecmemb = 0; in i5000_get_error_info()
423 /* read in the 1st NON-FATAL error register */ in i5000_get_error_info()
424 pci_read_config_dword(pvt->branchmap_werrors, FERR_NF_FBD, &value); in i5000_get_error_info()
426 /* If there is an error, then read in the 1st NON-FATAL error in i5000_get_error_info()
429 info->ferr_nf_fbd = value; in i5000_get_error_info()
432 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
433 NERR_NF_FBD, &info->nerr_nf_fbd); in i5000_get_error_info()
434 pci_read_config_word(pvt->branchmap_werrors, in i5000_get_error_info()
435 RECMEMA, &info->recmema); in i5000_get_error_info()
436 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
437 RECMEMB, &info->recmemb); in i5000_get_error_info()
438 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
439 REDMEMB, &info->redmemb); in i5000_get_error_info()
442 pci_write_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
445 info->ferr_nf_fbd = 0; in i5000_get_error_info()
446 info->nerr_nf_fbd = 0; in i5000_get_error_info()
447 info->recmema = 0; in i5000_get_error_info()
448 info->recmemb = 0; in i5000_get_error_info()
449 info->redmemb = 0; in i5000_get_error_info()
471 int ras, cas; in i5000_process_fatal_error_info() local
474 allErrors = (info->ferr_fat_fbd & FERR_FAT_MASK); in i5000_process_fatal_error_info()
478 channel = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd); in i5000_process_fatal_error_info()
480 /* Use the NON-Recoverable macros to extract data */ in i5000_process_fatal_error_info()
481 bank = NREC_BANK(info->nrecmema); in i5000_process_fatal_error_info()
482 rank = NREC_RANK(info->nrecmema); in i5000_process_fatal_error_info()
483 rdwr = NREC_RDWR(info->nrecmema); in i5000_process_fatal_error_info()
484 ras = NREC_RAS(info->nrecmemb); in i5000_process_fatal_error_info()
485 cas = NREC_CAS(info->nrecmemb); in i5000_process_fatal_error_info()
487 edac_dbg(0, "\t\tCSROW= %d Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_fatal_error_info()
489 rdwr ? "Write" : "Read", ras, cas); in i5000_process_fatal_error_info()
494 specific = "Alert on non-redundant retry or fast " in i5000_process_fatal_error_info()
498 specific = "Northbound CRC error on non-redundant " in i5000_process_fatal_error_info()
506 * This error is generated to inform that the intelligent in i5000_process_fatal_error_info()
509 * should take care of, we'll warn only once to avoid in i5000_process_fatal_error_info()
524 "Bank=%d RAS=%d CAS=%d FATAL Err=0x%x (%s)", in i5000_process_fatal_error_info()
525 bank, ras, cas, allErrors, specific); in i5000_process_fatal_error_info()
527 /* Call the helper to output message */ in i5000_process_fatal_error_info()
539 * handle the Intel NON-FATAL errors, if any
556 int ras, cas; in i5000_process_nonfatal_error_info() local
559 allErrors = (info->ferr_nf_fbd & FERR_NF_MASK); in i5000_process_nonfatal_error_info()
568 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); in i5000_process_nonfatal_error_info()
572 * for errors M4Err-M12Err and M17Err-M21Err, on FERR_NF_FBD in i5000_process_nonfatal_error_info()
576 bank = NREC_BANK(info->nrecmema); in i5000_process_nonfatal_error_info()
577 rank = NREC_RANK(info->nrecmema); in i5000_process_nonfatal_error_info()
578 rdwr = NREC_RDWR(info->nrecmema); in i5000_process_nonfatal_error_info()
579 ras = NREC_RAS(info->nrecmemb); in i5000_process_nonfatal_error_info()
580 cas = NREC_CAS(info->nrecmemb); in i5000_process_nonfatal_error_info()
582 …edac_dbg(0, "\t\tCSROW= %d Channels= %d,%d (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n… in i5000_process_nonfatal_error_info()
584 rdwr ? "Write" : "Read", ras, cas); in i5000_process_nonfatal_error_info()
588 specific = "Non-Aliased Uncorrectable Patrol Data ECC"; in i5000_process_nonfatal_error_info()
591 specific = "Non-Aliased Uncorrectable Spare-Copy " in i5000_process_nonfatal_error_info()
595 specific = "Non-Aliased Uncorrectable Mirrored Demand " in i5000_process_nonfatal_error_info()
599 specific = "Non-Aliased Uncorrectable Non-Mirrored " in i5000_process_nonfatal_error_info()
606 specific = "Aliased Uncorrectable Spare-Copy Data ECC"; in i5000_process_nonfatal_error_info()
613 specific = "Aliased Uncorrectable Non-Mirrored Demand " in i5000_process_nonfatal_error_info()
623 "Rank=%d Bank=%d RAS=%d CAS=%d, UE Err=0x%x (%s)", in i5000_process_nonfatal_error_info()
624 rank, bank, ras, cas, ue_errors, specific); in i5000_process_nonfatal_error_info()
626 /* Call the helper to output message */ in i5000_process_nonfatal_error_info()
628 channel >> 1, -1, rank, in i5000_process_nonfatal_error_info()
638 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); in i5000_process_nonfatal_error_info()
641 if (REC_ECC_LOCATOR_ODD(info->redmemb)) in i5000_process_nonfatal_error_info()
644 /* Convert channel to be based from zero, instead of in i5000_process_nonfatal_error_info()
648 bank = REC_BANK(info->recmema); in i5000_process_nonfatal_error_info()
649 rank = REC_RANK(info->recmema); in i5000_process_nonfatal_error_info()
650 rdwr = REC_RDWR(info->recmema); in i5000_process_nonfatal_error_info()
651 ras = REC_RAS(info->recmemb); in i5000_process_nonfatal_error_info()
652 cas = REC_CAS(info->recmemb); in i5000_process_nonfatal_error_info()
654 edac_dbg(0, "\t\tCSROW= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
656 rdwr ? "Write" : "Read", ras, cas); in i5000_process_nonfatal_error_info()
660 specific = "Correctable Non-Mirrored Demand Data ECC"; in i5000_process_nonfatal_error_info()
666 specific = "Correctable Spare-Copy Data ECC"; in i5000_process_nonfatal_error_info()
675 "Rank=%d Bank=%d RDWR=%s RAS=%d " in i5000_process_nonfatal_error_info()
676 "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank, in i5000_process_nonfatal_error_info()
677 rdwr ? "Write" : "Read", ras, cas, ce_errors, in i5000_process_nonfatal_error_info()
680 /* Call the helper to output message */ in i5000_process_nonfatal_error_info()
695 specific = "Non-Retry or Redundant Retry FBD Memory " in i5000_process_nonfatal_error_info()
699 specific = "Non-Retry or Redundant Retry FBD " in i5000_process_nonfatal_error_info()
703 specific = "Non-Retry or Redundant Retry FBD " in i5000_process_nonfatal_error_info()
714 specific = "DIMM-spare copy started"; in i5000_process_nonfatal_error_info()
717 specific = "DIMM-spare copy completed"; in i5000_process_nonfatal_error_info()
720 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); in i5000_process_nonfatal_error_info()
726 /* Call the helper to output message */ in i5000_process_nonfatal_error_info()
728 branch >> 1, -1, -1, in i5000_process_nonfatal_error_info()
744 /* now handle any non-fatal errors that occurred */ in i5000_process_error_info()
775 * device/functions we want to reference for this driver
777 * Need to 'get' device 16 func 1 and func 2
785 pvt = mci->pvt_info; in i5000_get_devices()
787 /* Attempt to 'get' the MCH register we want */ in i5000_get_devices()
807 if (PCI_FUNC(pdev->devfn) == 1) in i5000_get_devices()
811 pvt->branchmap_werrors = pdev; in i5000_get_devices()
813 /* Attempt to 'get' the MCH register we want */ in i5000_get_devices()
828 pci_dev_put(pvt->branchmap_werrors); in i5000_get_devices()
833 if (PCI_FUNC(pdev->devfn) == 2) in i5000_get_devices()
837 pvt->fsb_error_regs = pdev; in i5000_get_devices()
839 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
840 pci_name(pvt->system_address), in i5000_get_devices()
841 pvt->system_address->vendor, pvt->system_address->device); in i5000_get_devices()
842 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
843 pci_name(pvt->branchmap_werrors), in i5000_get_devices()
844 pvt->branchmap_werrors->vendor, in i5000_get_devices()
845 pvt->branchmap_werrors->device); in i5000_get_devices()
846 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
847 pci_name(pvt->fsb_error_regs), in i5000_get_devices()
848 pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device); in i5000_get_devices()
860 pci_dev_put(pvt->branchmap_werrors); in i5000_get_devices()
861 pci_dev_put(pvt->fsb_error_regs); in i5000_get_devices()
865 pvt->branch_0 = pdev; in i5000_get_devices()
867 /* If this device claims to have more than 2 channels then in i5000_get_devices()
870 if (pvt->maxch >= CHANNELS_PER_BRANCH) { in i5000_get_devices()
883 pci_dev_put(pvt->branchmap_werrors); in i5000_get_devices()
884 pci_dev_put(pvt->fsb_error_regs); in i5000_get_devices()
885 pci_dev_put(pvt->branch_0); in i5000_get_devices()
889 pvt->branch_1 = pdev; in i5000_get_devices()
903 pvt = mci->pvt_info; in i5000_put_devices()
905 pci_dev_put(pvt->branchmap_werrors); /* FUNC 1 */ in i5000_put_devices()
906 pci_dev_put(pvt->fsb_error_regs); /* FUNC 2 */ in i5000_put_devices()
907 pci_dev_put(pvt->branch_0); /* DEV 21 */ in i5000_put_devices()
910 if (pvt->maxch >= CHANNELS_PER_BRANCH) in i5000_put_devices()
911 pci_dev_put(pvt->branch_1); /* DEV 22 */ in i5000_put_devices()
933 amb_present = pvt->b0_ambpresent1; in determine_amb_present_reg()
935 amb_present = pvt->b0_ambpresent0; in determine_amb_present_reg()
938 amb_present = pvt->b1_ambpresent1; in determine_amb_present_reg()
940 amb_present = pvt->b1_ambpresent0; in determine_amb_present_reg()
956 mtr = pvt->b0_mtr[slot]; in determine_mtr()
958 mtr = pvt->b1_mtr[slot]; in determine_mtr()
981 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" : in decode_mtr()
982 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" : in decode_mtr()
983 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" : in decode_mtr()
986 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" : in decode_mtr()
987 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" : in decode_mtr()
988 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" : in decode_mtr()
1005 dinfo->dual_rank = MTR_DIMM_RANK(mtr); in handle_channel()
1015 /* Dual-rank memories have twice the size */ in handle_channel()
1016 if (dinfo->dual_rank) in handle_channel()
1020 addrBits -= 20; /* divide by 2^^20 */ in handle_channel()
1021 addrBits -= 3; /* 8 bits per bytes */ in handle_channel()
1023 dinfo->megabytes = 1 << addrBits; in handle_channel()
1052 * Start with the highest slot first, to display it first in calculate_dimm_size()
1055 for (slot = pvt->maxdimmperch - 1; slot >= 0; slot--) { in calculate_dimm_size()
1060 n = snprintf(p, space, "--------------------------" in calculate_dimm_size()
1061 "--------------------------------"); in calculate_dimm_size()
1063 space -= n; in calculate_dimm_size()
1070 space -= n; in calculate_dimm_size()
1072 for (channel = 0; channel < pvt->maxch; channel++) { in calculate_dimm_size()
1073 dinfo = &pvt->dimm_info[slot][channel]; in calculate_dimm_size()
1075 if (dinfo->megabytes) in calculate_dimm_size()
1077 dinfo->megabytes, dinfo->dual_rank + 1); in calculate_dimm_size()
1081 space -= n; in calculate_dimm_size()
1084 space -= n; in calculate_dimm_size()
1091 n = snprintf(p, space, "--------------------------" in calculate_dimm_size()
1092 "--------------------------------"); in calculate_dimm_size()
1094 space -= n; in calculate_dimm_size()
1102 space -= n; in calculate_dimm_size()
1103 for (channel = 0; channel < pvt->maxch; channel++) { in calculate_dimm_size()
1106 space -= n; in calculate_dimm_size()
1117 space -= n; in calculate_dimm_size()
1139 pvt = mci->pvt_info; in i5000_get_mc_regs()
1141 pci_read_config_dword(pvt->system_address, AMBASE, in i5000_get_mc_regs()
1142 &pvt->u.ambase_bottom); in i5000_get_mc_regs()
1143 pci_read_config_dword(pvt->system_address, AMBASE + sizeof(u32), in i5000_get_mc_regs()
1144 &pvt->u.ambase_top); in i5000_get_mc_regs()
1146 edac_dbg(2, "AMBASE= 0x%lx MAXCH= %d MAX-DIMM-Per-CH= %d\n", in i5000_get_mc_regs()
1147 (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch); in i5000_get_mc_regs()
1150 pci_read_config_word(pvt->branchmap_werrors, TOLM, &pvt->tolm); in i5000_get_mc_regs()
1151 pvt->tolm >>= 12; in i5000_get_mc_regs()
1153 pvt->tolm, pvt->tolm); in i5000_get_mc_regs()
1155 actual_tolm = pvt->tolm << 28; in i5000_get_mc_regs()
1159 pci_read_config_word(pvt->branchmap_werrors, MIR0, &pvt->mir0); in i5000_get_mc_regs()
1160 pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1); in i5000_get_mc_regs()
1161 pci_read_config_word(pvt->branchmap_werrors, MIR2, &pvt->mir2); in i5000_get_mc_regs()
1163 /* Get the MIR[0-2] regs */ in i5000_get_mc_regs()
1164 limit = (pvt->mir0 >> 4) & 0x0FFF; in i5000_get_mc_regs()
1165 way0 = pvt->mir0 & 0x1; in i5000_get_mc_regs()
1166 way1 = pvt->mir0 & 0x2; in i5000_get_mc_regs()
1169 limit = (pvt->mir1 >> 4) & 0x0FFF; in i5000_get_mc_regs()
1170 way0 = pvt->mir1 & 0x1; in i5000_get_mc_regs()
1171 way1 = pvt->mir1 & 0x2; in i5000_get_mc_regs()
1174 limit = (pvt->mir2 >> 4) & 0x0FFF; in i5000_get_mc_regs()
1175 way0 = pvt->mir2 & 0x1; in i5000_get_mc_regs()
1176 way1 = pvt->mir2 & 0x2; in i5000_get_mc_regs()
1180 /* Get the MTR[0-3] regs */ in i5000_get_mc_regs()
1184 pci_read_config_word(pvt->branch_0, where, in i5000_get_mc_regs()
1185 &pvt->b0_mtr[slot_row]); in i5000_get_mc_regs()
1188 slot_row, where, pvt->b0_mtr[slot_row]); in i5000_get_mc_regs()
1190 if (pvt->maxch >= CHANNELS_PER_BRANCH) { in i5000_get_mc_regs()
1191 pci_read_config_word(pvt->branch_1, where, in i5000_get_mc_regs()
1192 &pvt->b1_mtr[slot_row]); in i5000_get_mc_regs()
1194 slot_row, where, pvt->b1_mtr[slot_row]); in i5000_get_mc_regs()
1196 pvt->b1_mtr[slot_row] = 0; in i5000_get_mc_regs()
1204 decode_mtr(slot_row, pvt->b0_mtr[slot_row]); in i5000_get_mc_regs()
1206 pci_read_config_word(pvt->branch_0, AMB_PRESENT_0, in i5000_get_mc_regs()
1207 &pvt->b0_ambpresent0); in i5000_get_mc_regs()
1208 edac_dbg(2, "\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0); in i5000_get_mc_regs()
1209 pci_read_config_word(pvt->branch_0, AMB_PRESENT_1, in i5000_get_mc_regs()
1210 &pvt->b0_ambpresent1); in i5000_get_mc_regs()
1211 edac_dbg(2, "\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1); in i5000_get_mc_regs()
1214 if (pvt->maxch < CHANNELS_PER_BRANCH) { in i5000_get_mc_regs()
1215 pvt->b1_ambpresent0 = 0; in i5000_get_mc_regs()
1216 pvt->b1_ambpresent1 = 0; in i5000_get_mc_regs()
1221 decode_mtr(slot_row, pvt->b1_mtr[slot_row]); in i5000_get_mc_regs()
1223 pci_read_config_word(pvt->branch_1, AMB_PRESENT_0, in i5000_get_mc_regs()
1224 &pvt->b1_ambpresent0); in i5000_get_mc_regs()
1225 edac_dbg(2, "\t\tAMB-Branch 1-present0 0x%x:\n", in i5000_get_mc_regs()
1226 pvt->b1_ambpresent0); in i5000_get_mc_regs()
1227 pci_read_config_word(pvt->branch_1, AMB_PRESENT_1, in i5000_get_mc_regs()
1228 &pvt->b1_ambpresent1); in i5000_get_mc_regs()
1229 edac_dbg(2, "\t\tAMB-Branch 1-present1 0x%x:\n", in i5000_get_mc_regs()
1230 pvt->b1_ambpresent1); in i5000_get_mc_regs()
1258 pvt = mci->pvt_info; in i5000_init_csrows()
1259 max_csrows = pvt->maxdimmperch * 2; in i5000_init_csrows()
1264 * FIXME: The memory layout used to map slot/channel into the in i5000_init_csrows()
1267 * to map the dimms. A good cleanup would be to remove this array, in i5000_init_csrows()
1271 for (channel = 0; channel < pvt->maxch; channel++) { in i5000_init_csrows()
1281 csrow_megs = pvt->dimm_info[slot][channel].megabytes; in i5000_init_csrows()
1282 dimm->grain = 8; in i5000_init_csrows()
1285 dimm->mtype = MEM_FB_DDR2; in i5000_init_csrows()
1289 dimm->dtype = DEV_X8; in i5000_init_csrows()
1291 dimm->dtype = DEV_X4; in i5000_init_csrows()
1293 dimm->edac_mode = EDAC_S8ECD8ED; in i5000_init_csrows()
1294 dimm->nr_pages = csrow_megs << 8; in i5000_init_csrows()
1312 pvt = mci->pvt_info; in i5000_enable_error_reporting()
1315 pci_read_config_dword(pvt->branchmap_werrors, EMASK_FBD, in i5000_enable_error_reporting()
1321 pci_write_config_dword(pvt->branchmap_werrors, EMASK_FBD, in i5000_enable_error_reporting()
1337 /* Need to retrieve just how many channels and dimms per channel are in i5000_get_dimm_and_channel_counts()
1348 * i5000_probe1 Probe for ONE instance of device to see if it is
1363 pdev->bus->number, in i5000_probe1()
1364 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); in i5000_probe1()
1367 if (PCI_FUNC(pdev->devfn) != 0) in i5000_probe1()
1368 return -ENODEV; in i5000_probe1()
1374 * or equal to what the motherboard manufacturer will implement. in i5000_probe1()
1376 * As we don't have a motherboard identification routine to determine in i5000_probe1()
1380 * allows the driver to support up to the chipset max, without in i5000_probe1()
1402 return -ENOMEM; in i5000_probe1()
1406 mci->pdev = &pdev->dev; /* record ptr to the generic device */ in i5000_probe1()
1408 pvt = mci->pvt_info; in i5000_probe1()
1409 pvt->system_address = pdev; /* Record this device in our private */ in i5000_probe1()
1410 pvt->maxch = num_channels; in i5000_probe1()
1411 pvt->maxdimmperch = num_dimms_per_channel; in i5000_probe1()
1413 /* 'get' the pci devices we want to reserve for our use */ in i5000_probe1()
1417 /* Time to get serious */ in i5000_probe1()
1420 mci->mc_idx = 0; in i5000_probe1()
1421 mci->mtype_cap = MEM_FLAG_FB_DDR2; in i5000_probe1()
1422 mci->edac_ctl_cap = EDAC_FLAG_NONE; in i5000_probe1()
1423 mci->edac_cap = EDAC_FLAG_NONE; in i5000_probe1()
1424 mci->mod_name = "i5000_edac.c"; in i5000_probe1()
1425 mci->ctl_name = i5000_devs[dev_idx].ctl_name; in i5000_probe1()
1426 mci->dev_name = pci_name(pdev); in i5000_probe1()
1427 mci->ctl_page_to_phys = NULL; in i5000_probe1()
1429 /* Set the function pointer to an actual operation function */ in i5000_probe1()
1430 mci->edac_check = i5000_check_error; in i5000_probe1()
1435 …edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5000_init_csrows() returned nonz… in i5000_probe1()
1436 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */ in i5000_probe1()
1442 /* add this new MC control structure to EDAC's list of MCs */ in i5000_probe1()
1454 i5000_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i5000_probe1()
1457 "%s(): Unable to create PCI control\n", in i5000_probe1()
1473 return -ENODEV; in i5000_probe1()
1495 return i5000_probe1(pdev, id->driver_data); in i5000_init_one()
1511 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) in i5000_remove_one()
1514 /* retrieve references to resources, and free those resources */ in i5000_remove_one()
1546 * Try to initialize this module for its devices
1577 MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - " I5000_REVISION);