Lines Matching +full:0 +full:x0e00
24 #define FSL_MC_DDR_SDRAM_CFG 0x0110
25 #define FSL_MC_CS_BNDS_0 0x0000
26 #define FSL_MC_CS_BNDS_OFS 0x0008
28 #define FSL_MC_DATA_ERR_INJECT_HI 0x0e00
29 #define FSL_MC_DATA_ERR_INJECT_LO 0x0e04
30 #define FSL_MC_ECC_ERR_INJECT 0x0e08
31 #define FSL_MC_CAPTURE_DATA_HI 0x0e20
32 #define FSL_MC_CAPTURE_DATA_LO 0x0e24
33 #define FSL_MC_CAPTURE_ECC 0x0e28
34 #define FSL_MC_ERR_DETECT 0x0e40
35 #define FSL_MC_ERR_DISABLE 0x0e44
36 #define FSL_MC_ERR_INT_EN 0x0e48
37 #define FSL_MC_CAPTURE_ATRIBUTES 0x0e4c
38 #define FSL_MC_CAPTURE_ADDRESS 0x0e50
39 #define FSL_MC_CAPTURE_EXT_ADDRESS 0x0e54
40 #define FSL_MC_ERR_SBE 0x0e58
42 #define DSC_MEM_EN 0x80000000
43 #define DSC_ECC_EN 0x20000000
44 #define DSC_RD_EN 0x10000000
45 #define DSC_DBW_MASK 0x00180000
46 #define DSC_DBW_32 0x00080000
47 #define DSC_DBW_64 0x00000000
49 #define DSC_SDTYPE_MASK 0x07000000
50 #define DSC_X32_EN 0x00000020
53 #define DDR_EIE_MSEE 0x1 /* memory select */
54 #define DDR_EIE_SBEE 0x4 /* single-bit ECC error */
55 #define DDR_EIE_MBEE 0x8 /* multi-bit ECC error */
58 #define DDR_EDE_MSE 0x1 /* memory select */
59 #define DDR_EDE_SBE 0x4 /* single-bit ECC error */
60 #define DDR_EDE_MBE 0x8 /* multi-bit ECC error */
61 #define DDR_EDE_MME 0x80000000 /* multiple memory errors */
64 #define DDR_EDI_MSED 0x1 /* memory select disable */
65 #define DDR_EDI_SBED 0x4 /* single-bit ECC error disable */
66 #define DDR_EDI_MBED 0x8 /* multi-bit ECC error disable */