Lines Matching refs:irq_mask_all
482 u32 irq_mask_all = 0; in dmc520_edac_probe() local
495 irq_mask_all |= dmc520_irq_configs[idx].mask; in dmc520_edac_probe()
500 if (!irq_mask_all) { in dmc520_edac_probe()
553 dmc520_write_reg(pvt, reg_val & (~irq_mask_all), in dmc520_edac_probe()
555 dmc520_write_reg(pvt, irq_mask_all, REG_OFFSET_INTERRUPT_CLR); in dmc520_edac_probe()
573 if (irq_mask_all & DRAM_ECC_INT_CE_BIT) in dmc520_edac_probe()
576 if (irq_mask_all & DRAM_ECC_INT_UE_BIT) in dmc520_edac_probe()
587 dmc520_write_reg(pvt, reg_val | irq_mask_all, in dmc520_edac_probe()
605 u32 reg_val, idx, irq_mask_all = 0; in dmc520_edac_remove() local
614 dmc520_write_reg(pvt, reg_val & (~irq_mask_all), in dmc520_edac_remove()
620 irq_mask_all |= pvt->masks[idx]; in dmc520_edac_remove()