Lines Matching refs:csmasks
380 csmask = pvt->csels[dct].csmasks[csrow]; in get_cs_base_and_mask()
392 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()
408 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()
1164 u32 dcsm = pvt->csels[chan].csmasks[0]; in debug_dump_dramcfg_low()
1224 pvt->csels[ctrl].csmasks[0] == pvt->csels[ctrl].csmasks[1]) { in umc_get_cs_mode()
1314 addr_mask_orig = pvt->csels[umc].csmasks[cs_mask_nr]; in umc_addr_mask_to_cs_size()
1471 mask = &pvt->csels[umc].csmasks[cs]; in umc_read_base_mask()
1521 u32 *mask0 = &pvt->csels[0].csmasks[cs]; in dct_read_base_mask()
1522 u32 *mask1 = &pvt->csels[1].csmasks[cs]; in dct_read_base_mask()
1608 dcsm = pvt->csels[0].csmasks[0]; in dct_determine_memory_type()
1973 u32 dcsm = pvt->csels[dct].csmasks[cs_mask_nr]; in f15_m60h_dbam_to_chip_select()
3530 u32 addr_mask_orig = pvt->csels[umc].csmasks[csrow_nr]; in gpu_addr_mask_to_cs_size()
3691 mask = &pvt->csels[umc].csmasks[cs]; in gpu_read_base_mask()