Lines Matching full:on
14 depends on HAS_IOMEM && EDAC_SUPPORT && RAS
38 This turns on debugging information for the entire EDAC subsystem.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
45 depends on CPU_SUP_AMD && X86_MCE_AMD
49 occurring on your machine in human-readable form.
57 depends on ACPI_APEI_GHES
80 depends on AMD_NB && EDAC_DECODE_MCE
83 Support for error detection and correction of DRAM ECC errors on
106 depends on (ARCH_ALPINE || COMPILE_TEST)
113 depends on PCI && X86_32
115 Support for error detection and correction on the AMD 76x
120 depends on PCI && X86_32
122 Support for error detection and correction on the Intel
127 depends on PCI && X86
129 Support for error detection and correction on the Intel
134 depends on PCI && X86_32
135 depends on BROKEN
137 Support for error detection and correction on the Intel
142 depends on PCI && X86_32
144 Support for error detection and correction on the Intel
149 depends on PCI && X86
151 Support for error detection and correction on the Intel
156 depends on PCI && X86
158 Support for error detection and correction on the Intel
163 depends on PCI && X86
165 Support for error detection and correction on the Intel
170 depends on PCI && X86
172 Support for error detection and correction on the Intel
177 depends on PCI && X86
179 Support for error detection and correction on the Intel
184 depends on PCI && X86
191 depends on PCI && X86 && X86_MCE_INTEL
194 i7 Core (Nehalem) Integrated Memory Controller that exists on
200 depends on PCI && X86_32
202 Support for error detection and correction on the Intel
207 depends on PCI && X86_32
209 Support for error detection and correction on the Radisys
214 depends on X86 && PCI
215 depends on BROKEN
222 depends on X86 && PCI
229 depends on X86 && PCI
236 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG
243 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
244 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_SKX can't be y
255 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
256 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_I10NM can't be y
267 depends on PCI && X86_64 && X86_MCE_INTEL
270 Support for error detection and correction on the Intel
272 first used on the Apollo Lake platform and Denverton
273 micro-server but may appear on others in the future.
277 depends on PCI && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
278 depends on X86_64 && X86_MCE_INTEL
280 Support for error detection and correction on the Intel
282 This In-Band ECC is first used on the Elkhart Lake SoC but
283 may appear on others in the future.
287 depends on FSL_SOC && EDAC=y
289 Support for error detection and correction on the Freescale
294 depends on ARCH_LAYERSCAPE || SOC_LS1021A
296 Support for error detection and correction on Freescale memory
297 controllers on Layerscape SoCs.
301 depends on PPC_PASEMI && PCI
303 Support for error detection and correction on PA Semi
308 depends on PPC_CELL_COMMON
310 Support for error detection and correction on the
312 on platform without a hypervisor
316 depends on PCI && PPC_MAPLE
318 Support for error detection and correction on the
321 on some machine other than Maple.
325 depends on PCI && PPC_MAPLE
327 Support for error detection and correction on the
330 on some machine other than Maple.
334 depends on PPC64
336 Support for error detection and correction on the
343 depends on ARCH_HIGHBANK
345 Support for error detection and correction on the
350 depends on ARCH_HIGHBANK
352 Support for error detection and correction on the
357 depends on CPU_CAVIUM_OCTEON
359 Support for error detection and correction on the primary caches of
364 depends on CAVIUM_OCTEON_SOC
366 Support for error detection and correction on the
371 depends on CAVIUM_OCTEON_SOC
373 Support for error detection and correction on the
378 depends on PCI && CAVIUM_OCTEON_SOC
380 Support for error detection and correction on the
385 depends on ARM64
386 depends on PCI
388 Support for error detection and correction on the
395 depends on EDAC=y && ARCH_INTEL_SOCFPGA
397 Support for error detection and correction on the
403 depends on EDAC_ALTERA=y
405 Support for error detection and correction on the
412 depends on EDAC_ALTERA=y && CACHE_L2X0
414 Support for error detection and correction on the
419 bool "Altera On-Chip RAM ECC"
420 depends on EDAC_ALTERA=y && SRAM && GENERIC_ALLOCATOR
422 Support for error detection and correction on the
423 Altera On-Chip RAM Memory for Altera SoCs.
427 depends on EDAC_ALTERA=y
429 Support for error detection and correction on the
434 depends on EDAC_ALTERA=y && MTD_NAND_DENALI
436 Support for error detection and correction on the
441 depends on EDAC_ALTERA=y && PL330_DMA=y
443 Support for error detection and correction on the
448 depends on EDAC_ALTERA=y && USB_DWC2
450 Support for error detection and correction on the
455 depends on EDAC_ALTERA=y && SPI_CADENCE_QUADSPI
457 Support for error detection and correction on the
462 depends on EDAC_ALTERA=y && MMC_DW
464 Support for error detection and correction on the
469 depends on EDAC=y && SIFIVE_CCACHE
471 Support for error detection and correction on the SiFive SoCs.
475 depends on MACH_MVEBU_V7
477 Support for error correction and detection on the Marvell Aramada XP
482 depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || ARCH_MXC
484 Support for error detection and correction on the Synopsys DDR
489 depends on (ARM64 || COMPILE_TEST)
491 Support for error detection and correction on the
496 depends on ARCH_KEYSTONE || SOC_DRA7XX
498 Support for error detection and correction on the TI SoCs.
502 depends on ARCH_QCOM && QCOM_LLCC
504 Support for error detection and correction on the
516 depends on ARCH_ASPEED
518 Support for error detection and correction on the Aspeed AST BMC SoC.
525 depends on ARM64 && ((MELLANOX_PLATFORM && ACPI) || COMPILE_TEST)
527 Support for error detection and correction on the
532 depends on ARM64
534 Support for error detection and correction on the
539 depends on ARCH_ZYNQMP || COMPILE_TEST
542 Xilinx ZynqMP OCM (On Chip Memory) controller. It can also be
547 depends on (ARCH_NPCM || COMPILE_TEST)
549 Support for error detection and correction on the Nuvoton NPCM DDR
558 depends on ARCH_ZYNQMP || COMPILE_TEST
560 Support for error detection and correction on the Xilinx Versal DDR