351 static void omap_dma_glbl_write(struct omap_dmadev *od, unsigned reg, unsigned val)  in omap_dma_glbl_write()  function
502 		omap_dma_glbl_write(od, OCP_SYSCONFIG, val);  in omap_dma_stop()
511 		omap_dma_glbl_write(od, OCP_SYSCONFIG, sysconfig);  in omap_dma_stop()
661 		omap_dma_glbl_write(od, IRQSTATUS_L1, mask);  in omap_dma_irq()
731 			omap_dma_glbl_write(od, IRQSTATUS_L1, val);  in omap_dma_alloc_chan_resources()
733 			omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask);  in omap_dma_alloc_chan_resources()
737 			omap_dma_glbl_write(od, IRQENABLE_L0, val);  in omap_dma_alloc_chan_resources()
768 		omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask);  in omap_dma_free_chan_resources()
1587 	omap_dma_glbl_write(od, GCR, od->context.gcr);  in omap_dma_context_restore()
1588 	omap_dma_glbl_write(od, OCP_SYSCONFIG, od->context.ocp_sysconfig);  in omap_dma_context_restore()
1589 	omap_dma_glbl_write(od, IRQENABLE_L0, od->context.irqenable_l0);  in omap_dma_context_restore()
1590 	omap_dma_glbl_write(od, IRQENABLE_L1, od->context.irqenable_l1);  in omap_dma_context_restore()
1594 		omap_dma_glbl_write(od, IRQSTATUS_L0, 0);  in omap_dma_context_restore()
1643 	omap_dma_glbl_write(od, GCR, val);  in omap_dma_init_gcr()
1778 		omap_dma_glbl_write(od, IRQENABLE_L1, 0);  in omap_dma_probe()
1864 		omap_dma_glbl_write(od, IRQENABLE_L0, 0);  in omap_dma_remove()