456 			       u32 ctbr_mask, u32 src_addr)  in stm32_mdma_set_bus()  argument
463 	mask = src_addr & 0xF0000000;  in stm32_mdma_set_bus()
481 	phys_addr_t src_addr, dst_addr;  in stm32_mdma_set_xfer_param()  local
603 		src_addr = chan->dma_config.src_addr;  in stm32_mdma_set_xfer_param()
607 			src_addr_width = stm32_mdma_get_max_width(src_addr, buf_len,  in stm32_mdma_set_xfer_param()
651 				   src_addr);  in stm32_mdma_set_xfer_param()
657 		stm32_mdma_write(dmadev, STM32_MDMA_CSAR(chan->id), src_addr);  in stm32_mdma_set_xfer_param()
690 				    dma_addr_t src_addr, dma_addr_t dst_addr,  in stm32_mdma_setup_hwdesc()  argument
705 	hwdesc->csar = src_addr;  in stm32_mdma_setup_hwdesc()
733 	dma_addr_t src_addr, dst_addr;  in stm32_mdma_setup_xfer()  local
747 			src_addr = sg_dma_address(sg);  in stm32_mdma_setup_xfer()
752 							&ctcr, &ctbr, src_addr,  in stm32_mdma_setup_xfer()
755 					   src_addr);  in stm32_mdma_setup_xfer()
757 			src_addr = dma_config->src_addr;  in stm32_mdma_setup_xfer()
759 				src_addr += m2m_hw_period;  in stm32_mdma_setup_xfer()
771 		stm32_mdma_setup_hwdesc(chan, desc, direction, i, src_addr,  in stm32_mdma_setup_xfer()
851 	dma_addr_t src_addr, dst_addr;  in stm32_mdma_prep_dma_cyclic()  local
884 		src_addr = buf_addr;  in stm32_mdma_prep_dma_cyclic()
886 						&ctbr, src_addr, period_len);  in stm32_mdma_prep_dma_cyclic()
888 				   src_addr);  in stm32_mdma_prep_dma_cyclic()
908 			src_addr = buf_addr + i * period_len;  in stm32_mdma_prep_dma_cyclic()
913 			src_addr = dma_config->src_addr;  in stm32_mdma_prep_dma_cyclic()
915 				src_addr += period_len;  in stm32_mdma_prep_dma_cyclic()
919 		stm32_mdma_setup_hwdesc(chan, desc, direction, i, src_addr,  in stm32_mdma_prep_dma_cyclic()