Lines Matching refs:sg_req
193 struct stm32_dma_sg_req sg_req[] __counted_by(num_sgs);
560 struct stm32_dma_sg_req *sg_req; in stm32_dma_start_transfer() local
583 sg_req = &chan->desc->sg_req[chan->next_sg]; in stm32_dma_start_transfer()
584 reg = &sg_req->chan_reg; in stm32_dma_start_transfer()
622 struct stm32_dma_sg_req *sg_req; in stm32_dma_configure_next_sg() local
628 sg_req = &chan->desc->sg_req[chan->next_sg]; in stm32_dma_configure_next_sg()
631 dma_sm0ar = sg_req->chan_reg.dma_sm0ar; in stm32_dma_configure_next_sg()
636 dma_sm1ar = sg_req->chan_reg.dma_sm1ar; in stm32_dma_configure_next_sg()
685 struct stm32_dma_sg_req *sg_req; in stm32_dma_post_resume_reconfigure() local
697 sg_req = &chan->desc->sg_req[chan->desc->num_sgs - 1]; in stm32_dma_post_resume_reconfigure()
699 sg_req = &chan->desc->sg_req[chan->next_sg - 1]; in stm32_dma_post_resume_reconfigure()
702 stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), sg_req->chan_reg.dma_sndtr); in stm32_dma_post_resume_reconfigure()
705 stm32_dma_write(dmadev, STM32_DMA_SPAR(id), sg_req->chan_reg.dma_spar); in stm32_dma_post_resume_reconfigure()
708 stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), sg_req->chan_reg.dma_sm0ar); in stm32_dma_post_resume_reconfigure()
709 stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), sg_req->chan_reg.dma_sm1ar); in stm32_dma_post_resume_reconfigure()
856 struct stm32_dma_sg_req *sg_req; in stm32_dma_resume() local
870 sg_req = &chan->desc->sg_req[chan->desc->num_sgs - 1]; in stm32_dma_resume()
872 sg_req = &chan->desc->sg_req[chan->next_sg - 1]; in stm32_dma_resume()
874 ndtr = sg_req->chan_reg.dma_sndtr; in stm32_dma_resume()
877 spar = sg_req->chan_reg.dma_spar; in stm32_dma_resume()
878 sm0ar = sg_req->chan_reg.dma_sm0ar; in stm32_dma_resume()
879 sm1ar = sg_req->chan_reg.dma_sm1ar; in stm32_dma_resume()
1104 desc = kzalloc(struct_size(desc, sg_req, sg_len), GFP_NOWAIT); in stm32_dma_prep_slave_sg()
1128 desc->sg_req[i].len = sg_dma_len(sg); in stm32_dma_prep_slave_sg()
1130 nb_data_items = desc->sg_req[i].len / buswidth; in stm32_dma_prep_slave_sg()
1136 stm32_dma_clear_reg(&desc->sg_req[i].chan_reg); in stm32_dma_prep_slave_sg()
1137 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr; in stm32_dma_prep_slave_sg()
1138 desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr; in stm32_dma_prep_slave_sg()
1139 desc->sg_req[i].chan_reg.dma_spar = chan->chan_reg.dma_spar; in stm32_dma_prep_slave_sg()
1140 desc->sg_req[i].chan_reg.dma_sm0ar = sg_dma_address(sg); in stm32_dma_prep_slave_sg()
1141 desc->sg_req[i].chan_reg.dma_sm1ar = sg_dma_address(sg); in stm32_dma_prep_slave_sg()
1143 desc->sg_req[i].chan_reg.dma_sm1ar += sg_dma_len(sg); in stm32_dma_prep_slave_sg()
1144 desc->sg_req[i].chan_reg.dma_sndtr = nb_data_items; in stm32_dma_prep_slave_sg()
1216 desc = kzalloc(struct_size(desc, sg_req, num_periods), GFP_NOWAIT); in stm32_dma_prep_dma_cyclic()
1222 desc->sg_req[i].len = period_len; in stm32_dma_prep_dma_cyclic()
1224 stm32_dma_clear_reg(&desc->sg_req[i].chan_reg); in stm32_dma_prep_dma_cyclic()
1225 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr; in stm32_dma_prep_dma_cyclic()
1226 desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr; in stm32_dma_prep_dma_cyclic()
1227 desc->sg_req[i].chan_reg.dma_spar = chan->chan_reg.dma_spar; in stm32_dma_prep_dma_cyclic()
1228 desc->sg_req[i].chan_reg.dma_sm0ar = buf_addr; in stm32_dma_prep_dma_cyclic()
1229 desc->sg_req[i].chan_reg.dma_sm1ar = buf_addr; in stm32_dma_prep_dma_cyclic()
1231 desc->sg_req[i].chan_reg.dma_sm1ar += period_len; in stm32_dma_prep_dma_cyclic()
1232 desc->sg_req[i].chan_reg.dma_sndtr = nb_data_items; in stm32_dma_prep_dma_cyclic()
1253 desc = kzalloc(struct_size(desc, sg_req, num_sgs), GFP_NOWAIT); in stm32_dma_prep_dma_memcpy()
1274 stm32_dma_clear_reg(&desc->sg_req[i].chan_reg); in stm32_dma_prep_dma_memcpy()
1275 desc->sg_req[i].chan_reg.dma_scr = in stm32_dma_prep_dma_memcpy()
1283 desc->sg_req[i].chan_reg.dma_sfcr |= STM32_DMA_SFCR_MASK; in stm32_dma_prep_dma_memcpy()
1284 desc->sg_req[i].chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, threshold); in stm32_dma_prep_dma_memcpy()
1285 desc->sg_req[i].chan_reg.dma_spar = src + offset; in stm32_dma_prep_dma_memcpy()
1286 desc->sg_req[i].chan_reg.dma_sm0ar = dest + offset; in stm32_dma_prep_dma_memcpy()
1287 desc->sg_req[i].chan_reg.dma_sndtr = xfer_count; in stm32_dma_prep_dma_memcpy()
1288 desc->sg_req[i].len = xfer_count; in stm32_dma_prep_dma_memcpy()
1322 struct stm32_dma_sg_req *sg_req; in stm32_dma_is_current_sg() local
1332 sg_req = &chan->desc->sg_req[chan->next_sg]; in stm32_dma_is_current_sg()
1333 period_len = sg_req->len; in stm32_dma_is_current_sg()
1342 return (dma_smar >= sg_req->chan_reg.dma_sm0ar && in stm32_dma_is_current_sg()
1343 dma_smar < sg_req->chan_reg.dma_sm0ar + period_len); in stm32_dma_is_current_sg()
1351 return (dma_smar >= sg_req->chan_reg.dma_sm1ar && in stm32_dma_is_current_sg()
1352 dma_smar < sg_req->chan_reg.dma_sm1ar + period_len); in stm32_dma_is_current_sg()
1362 struct stm32_dma_sg_req *sg_req = &chan->desc->sg_req[chan->next_sg]; in stm32_dma_desc_residue() local
1397 residue = sg_req->len; in stm32_dma_desc_residue()
1409 residue += desc->sg_req[i].len; in stm32_dma_desc_residue()