499 	struct stedma40_chan_cfg	 dma_cfg;  member
881 			chan->dma_cfg.dir == DMA_DEV_TO_MEM))  in d40_log_lli_to_lcxa()
1264 	u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);  in d40_config_set_event()
1267 	if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||  in d40_config_set_event()
1268 	    (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))  in d40_config_set_event()
1272 	if (d40c->dma_cfg.dir !=  DMA_DEV_TO_MEM)  in d40_config_set_event()
1366 		return phy_map[d40c->dma_cfg.mode_opt];  in d40_get_prmo()
1368 		return log_map[d40c->dma_cfg.mode_opt];  in d40_get_prmo()
1420 	return num_elt * d40c->dma_cfg.dst_info.data_width;  in d40_residue()
1856 	int dev_type = d40c->dma_cfg.dev_type;  in d40_allocate_channel()
1865 	bool is_log = d40c->dma_cfg.mode == STEDMA40_MODE_LOGICAL;  in d40_allocate_channel()
1870 	if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {  in d40_allocate_channel()
1873 	} else if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||  in d40_allocate_channel()
1874 		   d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {  in d40_allocate_channel()
1885 		if (d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {  in d40_allocate_channel()
1887 			if (d40c->dma_cfg.use_fixed_channel) {  in d40_allocate_channel()
1888 				i = d40c->dma_cfg.phy_channel;  in d40_allocate_channel()
1926 		if (d40c->dma_cfg.use_fixed_channel) {  in d40_allocate_channel()
1927 			i = d40c->dma_cfg.phy_channel;  in d40_allocate_channel()
1986 		d40c->dma_cfg = dma40_memcpy_conf_log;  in d40_config_memcpy()
1987 		d40c->dma_cfg.dev_type = dma40_memcpy_channels[d40c->chan.chan_id];  in d40_config_memcpy()
1989 		d40_log_cfg(&d40c->dma_cfg,  in d40_config_memcpy()
1994 		d40c->dma_cfg = dma40_memcpy_conf_phy;  in d40_config_memcpy()
2015 	u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);  in d40_free_dma()
2033 	if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||  in d40_free_dma()
2034 	    d40c->dma_cfg.dir == DMA_MEM_TO_MEM)  in d40_free_dma()
2036 	else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)  in d40_free_dma()
2078 	u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);  in d40_is_paused()
2096 	if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||  in d40_is_paused()
2097 	    d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {  in d40_is_paused()
2099 	} else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {  in d40_is_paused()
2137 	struct stedma40_chan_cfg *cfg = &chan->dma_cfg;  in d40_prep_sg_log()
2165 	struct stedma40_chan_cfg *cfg = &chan->dma_cfg;  in d40_prep_sg_phy()
2204 	cfg = &chan->dma_cfg;  in d40_prep_desc()
2304 			d40c->dma_cfg = *info;  in stedma40_filter()
2316 	bool realtime = d40c->dma_cfg.realtime;  in __d40_set_prio_rt()
2317 	bool highprio = d40c->dma_cfg.high_priority;  in __d40_set_prio_rt()
2352 	if ((d40c->dma_cfg.dir ==  DMA_DEV_TO_MEM) ||  in d40_set_prio_realtime()
2353 	    (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))  in d40_set_prio_realtime()
2354 		__d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, true);  in d40_set_prio_realtime()
2356 	if ((d40c->dma_cfg.dir ==  DMA_MEM_TO_DEV) ||  in d40_set_prio_realtime()
2357 	    (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))  in d40_set_prio_realtime()
2358 		__d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, false);  in d40_set_prio_realtime()
2442 		if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)  in d40_alloc_chan_resources()
2444 				d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE;  in d40_alloc_chan_resources()
2447 				d40c->dma_cfg.dev_type *  in d40_alloc_chan_resources()
2458 		 d40c->dma_cfg.use_fixed_channel ? ", fixed" : "");  in d40_alloc_chan_resources()
2682 	struct stedma40_chan_cfg *cfg = &d40c->dma_cfg;  in d40_set_runtime_config_write()