621 	struct dma_slave_config	*sconfig = &dwc->dma_sconfig;  in dwc_prep_slave_sg()
786 	dwc->dma_sconfig.src_maxburst =  in dwc_verify_maxburst()
787 		clamp(dwc->dma_sconfig.src_maxburst, 1U, dwc->max_burst);  in dwc_verify_maxburst()
788 	dwc->dma_sconfig.dst_maxburst =  in dwc_verify_maxburst()
789 		clamp(dwc->dma_sconfig.dst_maxburst, 1U, dwc->max_burst);  in dwc_verify_maxburst()
791 	dwc->dma_sconfig.src_maxburst =  in dwc_verify_maxburst()
792 		rounddown_pow_of_two(dwc->dma_sconfig.src_maxburst);  in dwc_verify_maxburst()
793 	dwc->dma_sconfig.dst_maxburst =  in dwc_verify_maxburst()
794 		rounddown_pow_of_two(dwc->dma_sconfig.dst_maxburst);  in dwc_verify_maxburst()
805 	if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV)  in dwc_verify_p_buswidth()
806 		reg_width = dwc->dma_sconfig.dst_addr_width;  in dwc_verify_p_buswidth()
807 	else if (dwc->dma_sconfig.direction == DMA_DEV_TO_MEM)  in dwc_verify_p_buswidth()
808 		reg_width = dwc->dma_sconfig.src_addr_width;  in dwc_verify_p_buswidth()
823 	if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV)  in dwc_verify_p_buswidth()
824 		dwc->dma_sconfig.dst_addr_width = reg_width;  in dwc_verify_p_buswidth()
826 		dwc->dma_sconfig.src_addr_width = reg_width;  in dwc_verify_p_buswidth()
850 	if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV) {  in dwc_verify_m_buswidth()
851 		reg_width = dwc->dma_sconfig.dst_addr_width;  in dwc_verify_m_buswidth()
855 		dwc->dma_sconfig.src_addr_width = mem_width;  in dwc_verify_m_buswidth()
856 	} else if (dwc->dma_sconfig.direction == DMA_DEV_TO_MEM) {  in dwc_verify_m_buswidth()
857 		reg_width = dwc->dma_sconfig.src_addr_width;  in dwc_verify_m_buswidth()
858 		reg_burst = dwc->dma_sconfig.src_maxburst;  in dwc_verify_m_buswidth()
860 		dwc->dma_sconfig.dst_addr_width = min(mem_width, reg_width * reg_burst);  in dwc_verify_m_buswidth()
871 	memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));  in dwc_config()