229 	struct axi_dmac *dmac = chan_to_axi_dmac(chan);  in axi_dmac_start_transfer()  local
237 		val = axi_dmac_read(dmac, AXI_DMAC_REG_START_TRANSFER);  in axi_dmac_start_transfer()
272 	sg->hw->id = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_ID);  in axi_dmac_start_transfer()
276 			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, sg->hw->dest_addr);  in axi_dmac_start_transfer()
277 			axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, sg->hw->dst_stride);  in axi_dmac_start_transfer()
281 			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, sg->hw->src_addr);  in axi_dmac_start_transfer()
282 			axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, sg->hw->src_stride);  in axi_dmac_start_transfer()
301 		axi_dmac_write(dmac, AXI_DMAC_REG_SG_ADDRESS, (u32)sg->hw_phys);  in axi_dmac_start_transfer()
302 		axi_dmac_write(dmac, AXI_DMAC_REG_SG_ADDRESS_HIGH,  in axi_dmac_start_transfer()
305 		axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, sg->hw->x_len);  in axi_dmac_start_transfer()
306 		axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, sg->hw->y_len);  in axi_dmac_start_transfer()
308 	axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, flags);  in axi_dmac_start_transfer()
309 	axi_dmac_write(dmac, AXI_DMAC_REG_START_TRANSFER, 1);  in axi_dmac_start_transfer()
329 	struct axi_dmac *dmac = chan_to_axi_dmac(chan);  in axi_dmac_dequeue_partial_xfers()  local
336 		len = axi_dmac_read(dmac, AXI_DMAC_REG_PARTIAL_XFER_LEN);  in axi_dmac_dequeue_partial_xfers()
337 		id  = axi_dmac_read(dmac, AXI_DMAC_REG_PARTIAL_XFER_ID);  in axi_dmac_dequeue_partial_xfers()
357 			dev_dbg(dmac->dma_dev.dev,  in axi_dmac_dequeue_partial_xfers()
361 			dev_warn(dmac->dma_dev.dev,  in axi_dmac_dequeue_partial_xfers()
367 		xfer_done = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE);  in axi_dmac_dequeue_partial_xfers()
460 	struct axi_dmac *dmac = devid;  in axi_dmac_interrupt_handler()  local
464 	pending = axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING);  in axi_dmac_interrupt_handler()
468 	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_PENDING, pending);  in axi_dmac_interrupt_handler()
470 	spin_lock(&dmac->chan.vchan.lock);  in axi_dmac_interrupt_handler()
475 		completed = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE);  in axi_dmac_interrupt_handler()
476 		start_next = axi_dmac_transfer_done(&dmac->chan, completed);  in axi_dmac_interrupt_handler()
480 		axi_dmac_start_transfer(&dmac->chan);  in axi_dmac_interrupt_handler()
481 	spin_unlock(&dmac->chan.vchan.lock);  in axi_dmac_interrupt_handler()
489 	struct axi_dmac *dmac = chan_to_axi_dmac(chan);  in axi_dmac_terminate_all()  local
494 	axi_dmac_write(dmac, AXI_DMAC_REG_CTRL, 0);  in axi_dmac_terminate_all()
515 	struct axi_dmac *dmac = chan_to_axi_dmac(chan);  in axi_dmac_issue_pending()  local
522 	axi_dmac_write(dmac, AXI_DMAC_REG_CTRL, ctrl);  in axi_dmac_issue_pending()
533 	struct axi_dmac *dmac = chan_to_axi_dmac(chan);  in axi_dmac_alloc_desc()  local
534 	struct device *dev = dmac->dma_dev.dev;  in axi_dmac_alloc_desc()
572 	struct axi_dmac *dmac = chan_to_axi_dmac(desc->chan);  in axi_dmac_free_desc()  local
573 	struct device *dev = dmac->dma_dev.dev;  in axi_dmac_free_desc()
926 static int axi_dmac_parse_dt(struct device *dev, struct axi_dmac *dmac)  in axi_dmac_parse_dt()  argument
936 		ret = axi_dmac_parse_chan_dt(of_chan, &dmac->chan);  in axi_dmac_parse_dt()
948 static int axi_dmac_read_chan_config(struct device *dev, struct axi_dmac *dmac)  in axi_dmac_read_chan_config()  argument
950 	struct axi_dmac_chan *chan = &dmac->chan;  in axi_dmac_read_chan_config()
953 	desc = axi_dmac_read(dmac, AXI_DMAC_REG_INTERFACE_DESC);  in axi_dmac_read_chan_config()
993 static int axi_dmac_detect_caps(struct axi_dmac *dmac, unsigned int version)  in axi_dmac_detect_caps()  argument
995 	struct axi_dmac_chan *chan = &dmac->chan;  in axi_dmac_detect_caps()
997 	axi_dmac_write(dmac, AXI_DMAC_REG_FLAGS, AXI_DMAC_FLAG_CYCLIC);  in axi_dmac_detect_caps()
998 	if (axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS) == AXI_DMAC_FLAG_CYCLIC)  in axi_dmac_detect_caps()
1001 	axi_dmac_write(dmac, AXI_DMAC_REG_SG_ADDRESS, 0xffffffff);  in axi_dmac_detect_caps()
1002 	if (axi_dmac_read(dmac, AXI_DMAC_REG_SG_ADDRESS))  in axi_dmac_detect_caps()
1005 	axi_dmac_write(dmac, AXI_DMAC_REG_Y_LENGTH, 1);  in axi_dmac_detect_caps()
1006 	if (axi_dmac_read(dmac, AXI_DMAC_REG_Y_LENGTH) == 1)  in axi_dmac_detect_caps()
1009 	axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, 0xffffffff);  in axi_dmac_detect_caps()
1010 	chan->max_length = axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH);  in axi_dmac_detect_caps()
1014 	axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, 0xffffffff);  in axi_dmac_detect_caps()
1015 	if (axi_dmac_read(dmac, AXI_DMAC_REG_DEST_ADDRESS) == 0 &&  in axi_dmac_detect_caps()
1017 		dev_err(dmac->dma_dev.dev,  in axi_dmac_detect_caps()
1022 	axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, 0xffffffff);  in axi_dmac_detect_caps()
1023 	if (axi_dmac_read(dmac, AXI_DMAC_REG_SRC_ADDRESS) == 0 &&  in axi_dmac_detect_caps()
1025 		dev_err(dmac->dma_dev.dev,  in axi_dmac_detect_caps()
1034 		axi_dmac_write(dmac, AXI_DMAC_REG_X_LENGTH, 0x00);  in axi_dmac_detect_caps()
1036 			axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH);  in axi_dmac_detect_caps()
1057 	struct axi_dmac *dmac;  in axi_dmac_probe()  local
1063 	dmac = devm_kzalloc(&pdev->dev, sizeof(*dmac), GFP_KERNEL);  in axi_dmac_probe()
1064 	if (!dmac)  in axi_dmac_probe()
1067 	dmac->irq = platform_get_irq(pdev, 0);  in axi_dmac_probe()
1068 	if (dmac->irq < 0)  in axi_dmac_probe()
1069 		return dmac->irq;  in axi_dmac_probe()
1070 	if (dmac->irq == 0)  in axi_dmac_probe()
1073 	dmac->base = devm_platform_ioremap_resource(pdev, 0);  in axi_dmac_probe()
1074 	if (IS_ERR(dmac->base))  in axi_dmac_probe()
1075 		return PTR_ERR(dmac->base);  in axi_dmac_probe()
1077 	dmac->clk = devm_clk_get_enabled(&pdev->dev, NULL);  in axi_dmac_probe()
1078 	if (IS_ERR(dmac->clk))  in axi_dmac_probe()
1079 		return PTR_ERR(dmac->clk);  in axi_dmac_probe()
1081 	version = axi_dmac_read(dmac, ADI_AXI_REG_VERSION);  in axi_dmac_probe()
1084 		ret = axi_dmac_read_chan_config(&pdev->dev, dmac);  in axi_dmac_probe()
1086 		ret = axi_dmac_parse_dt(&pdev->dev, dmac);  in axi_dmac_probe()
1091 	INIT_LIST_HEAD(&dmac->chan.active_descs);  in axi_dmac_probe()
1095 	dma_dev = &dmac->dma_dev;  in axi_dmac_probe()
1109 	dma_dev->src_addr_widths = BIT(dmac->chan.src_width);  in axi_dmac_probe()
1110 	dma_dev->dst_addr_widths = BIT(dmac->chan.dest_width);  in axi_dmac_probe()
1111 	dma_dev->directions = BIT(dmac->chan.direction);  in axi_dmac_probe()
1116 	dmac->chan.vchan.desc_free = axi_dmac_desc_free;  in axi_dmac_probe()
1117 	vchan_init(&dmac->chan.vchan, dma_dev);  in axi_dmac_probe()
1119 	ret = axi_dmac_detect_caps(dmac, version);  in axi_dmac_probe()
1123 	dma_dev->copy_align = (dmac->chan.address_align_mask + 1);  in axi_dmac_probe()
1125 	if (dmac->chan.hw_sg)  in axi_dmac_probe()
1128 	axi_dmac_write(dmac, AXI_DMAC_REG_IRQ_MASK, irq_mask);  in axi_dmac_probe()
1131 		ret = axi_dmac_read(dmac, AXI_DMAC_REG_COHERENCY_DESC);  in axi_dmac_probe()
1135 			dev_err(dmac->dma_dev.dev,  in axi_dmac_probe()
1150 				       &dmac->chan.vchan.task);  in axi_dmac_probe()
1164 	ret = devm_request_irq(&pdev->dev, dmac->irq, axi_dmac_interrupt_handler,  in axi_dmac_probe()
1165 			       IRQF_SHARED, dev_name(&pdev->dev), dmac);  in axi_dmac_probe()
1169 	regmap = devm_regmap_init_mmio(&pdev->dev, dmac->base,  in axi_dmac_probe()