Lines Matching +full:zynqmp +full:- +full:dma +full:- +full:1

1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx ZynqMP SHA Driver.
12 #include <linux/dma-mapping.h>
13 #include <linux/firmware/xlnx-zynqmp.h>
24 ZYNQMP_SHA3_INIT = 1,
55 tfm_ctx->dev = drv_ctx->dev; in zynqmp_sha_init_tfm()
63 tfm_ctx->fbk_tfm = fallback_tfm; in zynqmp_sha_init_tfm()
64 hash->descsize += crypto_shash_descsize(tfm_ctx->fbk_tfm); in zynqmp_sha_init_tfm()
73 if (tfm_ctx->fbk_tfm) { in zynqmp_sha_exit_tfm()
74 crypto_free_shash(tfm_ctx->fbk_tfm); in zynqmp_sha_exit_tfm()
75 tfm_ctx->fbk_tfm = NULL; in zynqmp_sha_exit_tfm()
84 struct zynqmp_sha_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm); in zynqmp_sha_init()
86 dctx->fbk_req.tfm = tctx->fbk_tfm; in zynqmp_sha_init()
87 return crypto_shash_init(&dctx->fbk_req); in zynqmp_sha_init()
94 return crypto_shash_update(&dctx->fbk_req, data, length); in zynqmp_sha_update()
101 return crypto_shash_final(&dctx->fbk_req, out); in zynqmp_sha_final()
108 return crypto_shash_finup(&dctx->fbk_req, data, length, out); in zynqmp_sha_finup()
114 struct zynqmp_sha_tfm_ctx *tctx = crypto_shash_ctx(desc->tfm); in zynqmp_sha_import()
116 dctx->fbk_req.tfm = tctx->fbk_tfm; in zynqmp_sha_import()
117 return crypto_shash_import(&dctx->fbk_req, in); in zynqmp_sha_import()
124 return crypto_shash_export(&dctx->fbk_req, out); in zynqmp_sha_export()
141 remaining_len -= ZYNQMP_DMA_ALLOC_FIXED_SIZE; in zynqmp_sha_digest()
177 .cra_name = "sha3-384",
178 .cra_driver_name = "zynqmp-sha3-384",
192 struct device *dev = &pdev->dev; in zynqmp_sha_probe()
204 dev_err(dev, "No usable DMA configuration\n"); in zynqmp_sha_probe()
219 err = -ENOMEM; in zynqmp_sha_probe()
225 err = -ENOMEM; in zynqmp_sha_probe()
253 .name = "zynqmp-sha3-384",
258 MODULE_DESCRIPTION("ZynqMP SHA3 hardware acceleration support.");