1003 	unsigned int ctxarb_ctl, ctx_enables;  in qat_hal_exec_micro_inst()  local
1035 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_exec_micro_inst()
1036 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_exec_micro_inst()
1046 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_exec_micro_inst()
1109 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_exec_micro_inst()
1120 	unsigned int ctxarb_cntl, ustore_addr, ctx_enables;  in qat_hal_rd_rel_reg()  local
1140 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_rd_rel_reg()
1141 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_rd_rel_reg()
1146 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_rd_rel_reg()
1170 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_rd_rel_reg()
1336 	unsigned int ctx_enables;  in qat_hal_put_rel_rd_xfer()  local
1340 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_rd_xfer()
1341 	if (CE_INUSE_CONTEXTS & ctx_enables) {  in qat_hal_put_rel_rd_xfer()
1375 	unsigned int gprval, ctx_enables;  in qat_hal_put_rel_wr_xfer()  local
1390 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_wr_xfer()
1391 	if (CE_INUSE_CONTEXTS & ctx_enables) {  in qat_hal_put_rel_wr_xfer()
1435 	unsigned int ctx_enables;  in qat_hal_put_rel_nn()  local
1438 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_nn()
1439 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_put_rel_nn()
1440 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables | CE_NN_MODE);  in qat_hal_put_rel_nn()
1443 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_put_rel_nn()
1453 	unsigned int ctx_enables;  in qat_hal_convert_abs_to_rel()  local
1455 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_convert_abs_to_rel()
1456 	if (ctx_enables & CE_INUSE_CONTEXTS) {  in qat_hal_convert_abs_to_rel()