Lines Matching full:error
10 /* ERRSOU0 Correctable error mask*/
13 /* HI AE Correctable error log */
16 /* HI AE Correctable error log enable */
31 /* HI AE Uncorrectable error log */
34 /* HI AE Uncorrectable error log enable */
37 /* HI CPP Agent Command parity error log */
40 /* HI CPP Agent Command parity error logging enable */
43 /* RI Memory parity error status register */
46 /* RI Memory parity error reporting enable */
50 * RI Memory parity error mask
51 * BIT(0) - BIT(3) - ri_iosf_pdata_rxq[0:3] parity error
52 * BIT(4) - ri_tlq_phdr parity error
53 * BIT(5) - ri_tlq_pdata parity error
54 * BIT(6) - ri_tlq_nphdr parity error
55 * BIT(7) - ri_tlq_npdata parity error
56 * BIT(8) - BIT(9) - ri_tlq_cplhdr[0:1] parity error
57 * BIT(10) - BIT(17) - ri_tlq_cpldata[0:7] parity error
59 * BIT(19) - ri_cds_cmd_fifo parity error
60 * BIT(20) - ri_obc_ricpl_fifo parity error
61 * BIT(21) - ri_obc_tiricpl_fifo parity error
62 * BIT(22) - ri_obc_cppcpl_fifo parity error
63 * BIT(23) - ri_obc_pendcpl_fifo parity error
64 * BIT(24) - ri_cpp_cmd_fifo parity error
65 * BIT(25) - ri_cds_ticmd_fifo parity error
66 * BIT(26) - riti_cmd_fifo parity error
67 * BIT(27) - ri_int_msixtbl parity error
68 * BIT(28) - ri_int_imstbl parity error
69 * BIT(30) - ri_kpt_fuses parity error
89 * BIT(0) - CdCmdQ_sts patiry error status
90 * BIT(1) - CdDataQ_sts parity error status
91 * BIT(3) - CPP_SkidQ_sts parity error status
92 * BIT(7) - CPP_SkidQ_sc_sts parity error status
100 /* TI PULLFUB parity error reporting mask */
125 /* TI PUSHFUB parity error reporting mask */
145 /* TI CD parity error mask */
170 /* TI TRNSB Parity error reporting mask */
200 /* Status register to log misc error on RI */
203 /* Status control register to log misc RI error */
209 * BIT(1) - CFC on CPP. ORed of CFC Push error and Pull error
231 /* IAINTSTATSSM error bit mask definitions */
256 * UERRSSMSH error bit masks definitions
258 * BIT(0) - Indicates one uncorrectable error
269 * CERRSSMSH error bit
270 * BIT(0) - Indicates one correctable error
276 /* SSM error handling features enable register */
280 * Disable SSM error detection and reporting features
285 * BIT(12) - Disable logging push/pull data error in pperr register.
296 * Error reporting mask in INTMASKSSM
300 * BIT(3) - CPP parity error Interrupt mask
301 * BIT(4) - SSM interrupt generated by SER correctable error mask
302 * BIT(5) - SSM interrupt generated by SER uncorrectable error
308 /* CPP push or pull error */
356 /* Accelerator SPP parity error mask registers */
366 * Uncorrectable error mask in SSMCPPERR
367 * BIT(0) - indicates CPP command parity error
368 * BIT(1) - indicates CPP Main Push PPID parity error
369 * BIT(2) - indicates CPP Main ePPID parity error
370 * BIT(3) - indicates CPP Main push data parity error
371 * BIT(4) - indicates CPP Main Pull PPID parity error
372 * BIT(5) - indicates CPP target pull data parity error
398 /* RF parity error detected in SharedRAM */
404 * Fatal error mask in SER_ERR_SSMSH
405 * BIT(0) - Indicates an uncorrectable error has occurred in the
407 * BIT(2) - Parity error occurred in the bank SPP fifos
408 * BIT(3) - Indicates Parity error occurred in following fifos in
410 * BIT(4) - Parity error occurred in flops in the design
411 * BIT(5) - Uncorrectable error has occurred in the
413 * BIT(7) - Indicates Parity error occurred in the Resource Manager
415 * BIT(8) - Indicates Parity error occurred in the Resource Manager
417 * BIT(9) - Indicates Parity error occurred in the Resource Manager
419 * BIT(10) - Indicates an uncorrectable error has occurred in the
421 * BIT(14) - Parity error occurred in Buffer Manager sigdone FIFO
428 * Uncorrectable error mask in SER_ERR_SSMSH
429 * BIT(12) Parity error occurred in Buffer Manager pool 0
430 * BIT(13) Parity error occurred in Buffer Manager pool 1
436 * Correctable error mask in SER_ERR_SSMSH
437 * BIT(1) - Indicates a correctable Error has occurred
439 * BIT(6) - Indicates a correctable Error has occurred in
441 * BIT(11) - Indicates an correctable Error has occurred in
447 /* SSM shared memory SER error reporting mask */
451 * SSM SER error reporting mask in SER_en_err_ssmsh
452 * BIT(0) - Enables uncorrectable Error detection in :
455 * BIT(1) - Enables correctable Error detection in :
458 * BIT(2) - Enables Parity error detection in
472 * BIT(3) - Enables uncorrectable Error detection in
474 * BIT(4) - Enables correctable error detection in the Resource Manager
476 * BIT(5) - Enables Parity error detection in
480 * BIT(6) - Enables Parity error detection in Buffer Manager pools
490 * BIT(7) - Indicates CPP CFC command parity error type
491 * BIT(8) - Indicated CPP CFC data parity error type
498 * BIT(0) - Enables CFC to detect and log push/pull data error
499 * BIT(1) - Enables CFC to generate interrupt to PCIEP for CPP error
503 * BIT(9) - When 1 RF parity error detection is disabled
514 * when an error is reported on CPP
530 * Uncorrectable error mask in EXPRPSSMCPR
531 * BIT(2) - Hard fatal error
532 * BIT(16) - Parity error detected in CPR Push FIFO
533 * BIT(17) - Parity error detected in CPR Pull FIFO
534 * BIT(18) - Parity error detected in CPR Hash Table
535 * BIT(19) - Parity error detected in CPR History Buffer Copy 0
536 * BIT(20) - Parity error detected in CPR History Buffer Copy 1
537 * BIT(21) - Parity error detected in CPR History Buffer Copy 2
538 * BIT(22) - Parity error detected in CPR History Buffer Copy 3
539 * BIT(23) - Parity error detected in CPR History Buffer Copy 4
540 * BIT(24) - Parity error detected in CPR History Buffer Copy 5
541 * BIT(25) - Parity error detected in CPR History Buffer Copy 6
542 * BIT(26) - Parity error detected in CPR History Buffer Copy 7
552 * Uncorrectable error mask in EXPRPSSMXLT
553 * BIT(2) - If set, an Uncorrectable Error event occurred
554 * BIT(16) - Parity error detected in XLT Push FIFO
555 * BIT(17) - Parity error detected in XLT Pull FIFO
556 * BIT(18) - Parity error detected in XLT HCTB0
557 * BIT(19) - Parity error detected in XLT HCTB1
558 * BIT(20) - Parity error detected in XLT HCTB2
559 * BIT(21) - Parity error detected in XLT HCTB3
560 * BIT(22) - Parity error detected in XLT CBCL
561 * BIT(23) - Parity error detected in XLT LITPTR
568 * Correctable error mask in EXPRPSSMXLT
569 * BIT(3) - Correctable error event occurred.
577 * Uncorrectable error mask in EXPRPSSMDCPR
578 * BIT(2) - Even hard fatal error
579 * BIT(4) - Odd hard fatal error
580 * BIT(6) - decode soft error
581 * BIT(16) - Parity error detected in CPR Push FIFO
582 * BIT(17) - Parity error detected in CPR Pull FIFO
583 * BIT(18) - Parity error detected in the Input Buffer
585 * Parity error detected in CPR Push FIFO
587 * Parity error detected in CPR Push FIFO
594 * Correctable error mask in EXPRPSSMDCPR
595 * BIT(3) - Even ecc correctable error
596 * BIT(5) - Odd ecc correctable error
604 * BIT(0) - indicates error Response Order Overflow and/or BME error
605 * BIT(1) - indicates RI push/pull error
606 * BIT(2) - indicates TI push/pull error
607 * BIT(3) - indicates ARAM correctable error
608 * BIT(4) - indicates ARAM uncorrectable error
609 * BIT(5) - indicates TI pull parity error
610 * BIT(6) - indicates RI push parity error
613 * BIT(9) - indicates error when accessing RLT block
637 /* TI Misc error reporting mask */
641 * TI Misc error reporting control mask
642 * BIT(0) - Enables error detection and logging in TIMISCSTS register
658 * Uncorrectable error mask in RICPPINTSTS register
659 * BIT(0) - RI asserted the CPP error signal during a push
660 * BIT(1) - RI detected the CPP error signal asserted during a pull
661 * BIT(2) - RI detected a push data parity error
662 * BIT(3) - RI detected a push valid parity error
672 * BIT(0) - value of 1 enables error detection and reporting
674 * BIT(1) - value of 1 enables error detection and reporting
676 * BIT(2) - value of 1 enables error detection and reporting
685 /* Push ID of the command which triggered the transaction error on RI */
688 /* Pull ID of the command which triggered the transaction error on RI */
695 * Uncorrectable error mask in TICPPINTSTS register
697 * the CPP error signal during a push
699 * the CPP error signal asserted during a pull
701 * a pull data parity error
711 * BIT(0) - value of 1 enables error detection and reporting on
713 * BIT(1) - value of 1 enables error detection and reporting on
715 * BIT(2) - value of 1 enables parity error detection and logging on
719 * CPP/RF Parity error
724 /* Push ID of the command which triggered the transaction error on TI */
727 /* Pull ID of the command which triggered the transaction error on TI */
730 /* Correctable error in ARAM agent register */
736 * Correctable error enablement in ARAM bit mask
737 * BIT(3) - enable ARAM RAM to fix and log correctable error
738 * BIT(26) - enables ARAM agent to generate interrupt for correctable error
742 /* Correctable error address in ARAM agent register */
745 /* Uncorrectable error in ARAM agent register */
749 * ARAM error bit mask
750 * BIT(0) - indicates error logged in ARAMCERR or ARAMUCERR
757 * Uncorrectable error enablement in ARAM bit mask
758 * BIT(3) - enable ARAM RAM to fix and log uncorrectable error
759 * BIT(19) - enables ARAM agent to generate interrupt for uncorrectable error
763 /* Unorrectable error address in ARAM agent register */
766 /* Uncorrectable error transaction push/pull ID registers*/
770 /* ARAM ECC block error enablement */
774 * ARAM ECC block error control bit masks
775 * BIT(0) - enable ARAM CD ECC block error detecting
776 * BIT(1) - enable ARAM pull request ECC error detecting
777 * BIT(2) - enable ARAM command dispatch ECC error detecting
778 * BIT(3) - enable ARAM read datapath push ECC error detecting
779 * BIT(4) - enable ARAM read datapath pull ECC error detecting
780 * BIT(5) - enable ARAM RMW ECC error detecting
781 * BIT(6) - enable ARAM write datapath RMW ECC error detecting
782 * BIT(7) - enable ARAM write datapath ECC error detecting
788 /* ARAM misc memory target error registers*/
792 * ARAM misc memory target error bit masks
793 * BIT(0) - indicates an error in ARAM target memory
795 * BIT(4) - indicates pull error in ARAM target memory
796 * BIT(5) - indicates parity pull error in ARAM target memory
797 * BIT(6) - indicates push error in ARAM target memory
805 * ARAM misc memory target error enablement mask
806 * BIT(2) - enables CPP memory to detect and log push/pull data error
807 * BIT(7) - enables push/pull error to generate interrupts to RI
809 * BIT(9) - enables ARAM to autopush to AE when push/parity error is detected
820 /* Command Parity error detected on IOSFP Command to QAT */