qat/qat_common/adf_gen4_ras.h

11 #define ADF_GEN4_ERRSOU0_BIT				BIT(0)
18 #define ADF_GEN4_ERRSOU1_HIAEUNCERRLOG_CPP0_BIT		BIT(0)
19 #define ADF_GEN4_ERRSOU1_HICPPAGENTCMDPARERRLOG_BIT	BIT(1)
20 #define ADF_GEN4_ERRSOU1_RIMEM_PARERR_STS_BIT		BIT(2)
21 #define ADF_GEN4_ERRSOU1_TIMEM_PARERR_STS_BIT		BIT(3)
22 #define ADF_GEN4_ERRSOU1_RIMISCSTS_BIT			BIT(4)
51  * BIT(0) - BIT(3) - ri_iosf_pdata_rxq[0:3] parity error
52  * BIT(4) - ri_tlq_phdr parity error
53  * BIT(5) - ri_tlq_pdata parity error
54  * BIT(6) - ri_tlq_nphdr parity error
55  * BIT(7) - ri_tlq_npdata parity error
56  * BIT(8) - BIT(9) - ri_tlq_cplhdr[0:1] parity error
57  * BIT(10) - BIT(17) - ri_tlq_cpldata[0:7] parity error
58  * BIT(18) - set this bit to 1 to enable logging status to ri_mem_par_err_sts0
59  * BIT(19) - ri_cds_cmd_fifo parity error
60  * BIT(20) - ri_obc_ricpl_fifo parity error
61  * BIT(21) - ri_obc_tiricpl_fifo parity error
62  * BIT(22) - ri_obc_cppcpl_fifo parity error
63  * BIT(23) - ri_obc_pendcpl_fifo parity error
64  * BIT(24) - ri_cpp_cmd_fifo parity error
65  * BIT(25) - ri_cds_ticmd_fifo parity error
66  * BIT(26) - riti_cmd_fifo parity error
67  * BIT(27) - ri_int_msixtbl parity error
68  * BIT(28) - ri_int_imstbl parity error
69  * BIT(30) - ri_kpt_fuses parity error
72 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | \
73 	 BIT(7) | BIT(10) | BIT(11) | BIT(12) | BIT(13) | \
74 	 BIT(14) | BIT(15) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | \
75 	 BIT(20) | BIT(21) | BIT(22) | BIT(23) | BIT(24) | BIT(25) | \
76 	 BIT(26) | BIT(27) | BIT(28) | BIT(30))
79 	(BIT(4) | BIT(6) | BIT(8) | BIT(9))
89  * BIT(0) - CdCmdQ_sts patiry error status
90  * BIT(1) - CdDataQ_sts parity error status
91  * BIT(3) - CPP_SkidQ_sts parity error status
92  * BIT(7) - CPP_SkidQ_sc_sts parity error status
95 	(BIT(0) | BIT(1) | BIT(3) | BIT(7))
105  * BIT(0) - TrnPullReqQ_sts parity status
106  * BIT(1) - TrnSharedDataQ_sts parity status
107  * BIT(2) - TrnPullReqDataQ_sts parity status
108  * BIT(4) - CPP_CiPullReqQ_sts parity status
109  * BIT(5) - CPP_TrnPullReqQ_sts parity status
110  * BIT(6) - CPP_PullidQ_sts parity status
111  * BIT(7) - CPP_WaitDataQ_sts parity status
112  * BIT(8) - CPP_CdDataQ_sts parity status
113  * BIT(9) - CPP_TrnDataQP0_sts parity status
114  * BIT(10) - BIT(11) - CPP_TrnDataQRF[00:01]_sts parity status
115  * BIT(12) - CPP_TrnDataQP1_sts parity status
116  * BIT(13) - BIT(14) - CPP_TrnDataQRF[10:11]_sts parity status
119 	(BIT(0) | BIT(1) | BIT(2) | BIT(4) | BIT(5) | BIT(6) | BIT(7) | \
120 	 BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(12) | BIT(13) | BIT(14))
130  * BIT(0) - SbPushReqQ_sts parity status
131  * BIT(1) - BIT(2) - SbPushDataQ[0:1]_sts parity status
132  * BIT(4) - CPP_CdPushReqQ_sts parity status
133  * BIT(5) - BIT(6) - CPP_CdPushDataQ[0:1]_sts parity status
134  * BIT(7) - CPP_SbPushReqQ_sts parity status
135  * BIT(8) - CPP_SbPushDataQP_sts parity status
136  * BIT(9) - BIT(10) - CPP_SbPushDataQRF[0:1]_sts parity status
139 	(BIT(0) | BIT(1) | BIT(2) | BIT(4) | BIT(5) | \
140 	 BIT(6) | BIT(7) | BIT(8) | BIT(9) | BIT(10))
150  * BIT(0) - BIT(15) - CtxMdRam[0:15]_sts parity status
151  * BIT(16) - Leaf2ClusterRam_sts parity status
152  * BIT(17) - BIT(18) - Ring2LeafRam[0:1]_sts parity status
153  * BIT(19) - VirtualQ_sts parity status
154  * BIT(20) - DtRdQ_sts parity status
155  * BIT(21) - DtWrQ_sts parity status
156  * BIT(22) - RiCmdQ_sts parity status
157  * BIT(23) - BypassQ_sts parity status
158  * BIT(24) - DtRdQ_sc_sts parity status
159  * BIT(25) - DtWrQ_sc_sts parity status
162 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | \
163 	 BIT(7) | BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(12) | BIT(13) | \
164 	 BIT(14) | BIT(15) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) | \
165 	 BIT(21) | BIT(22) | BIT(23) | BIT(24) | BIT(25))
175  * BIT(0) - TrnPHdrQP_sts parity status
176  * BIT(1) - TrnPHdrQRF_sts parity status
177  * BIT(2) - TrnPDataQP_sts parity status
178  * BIT(3) - BIT(6) - TrnPDataQRF[0:3]_sts parity status
179  * BIT(7) - TrnNpHdrQP_sts parity status
180  * BIT(8) - BIT(9) - TrnNpHdrQRF[0:1]_sts parity status
181  * BIT(10) - TrnCplHdrQ_sts parity status
182  * BIT(11) - TrnPutObsReqQ_sts parity status
183  * BIT(12) - TrnPushReqQ_sts parity status
184  * BIT(13) - SbSplitIdRam_sts parity status
185  * BIT(14) - SbReqCountQ_sts parity status
186  * BIT(15) - SbCplTrkRam_sts parity status
187  * BIT(16) - SbGetObsReqQ_sts parity status
188  * BIT(17) - SbEpochIdQ_sts parity status
189  * BIT(18) - SbAtCplHdrQ_sts parity status
190  * BIT(19) - SbAtCplDataQ_sts parity status
191  * BIT(20) - SbReqCountRam_sts parity status
192  * BIT(21) - SbAtCplHdrQ_sc_sts parity status
195 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | \
196 	 BIT(7) | BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(12) | \
197 	 BIT(13) | BIT(14) | BIT(15) | BIT(16) | BIT(17) | BIT(18) | \
198 	 BIT(19) | BIT(20) | BIT(21))
207  * ERRSOU2 bit mask
208  * BIT(0) - SSM Interrupt Mask
209  * BIT(1) - CFC on CPP. ORed of CFC Push error and Pull error
210  * BIT(2) - BIT(4) - CPP attention interrupts, deprecated on gen4 devices
211  * BIT(18) - PM interrupt
213 #define ADF_GEN4_ERRSOU2_SSM_ERR_BIT			BIT(0)
214 #define ADF_GEN4_ERRSOU2_CPP_CFC_ERR_STATUS_BIT	BIT(1)
216 	(BIT(2) | BIT(3) | BIT(4))
218 #define ADF_GEN4_ERRSOU2_PM_INT_BIT			BIT(18)
231 /* IAINTSTATSSM error bit mask definitions */
232 #define ADF_GEN4_IAINTSTATSSM_UERRSSMSH_BIT		BIT(0)
233 #define ADF_GEN4_IAINTSTATSSM_CERRSSMSH_BIT		BIT(1)
234 #define ADF_GEN4_IAINTSTATSSM_PPERR_BIT			BIT(2)
235 #define ADF_GEN4_IAINTSTATSSM_SLICEHANG_ERR_BIT		BIT(3)
236 #define ADF_GEN4_IAINTSTATSSM_SPPPARERR_BIT		BIT(4)
237 #define ADF_GEN4_IAINTSTATSSM_SSMCPPERR_BIT		BIT(5)
238 #define ADF_GEN4_IAINTSTATSSM_SSMSOFTERRORPARITY_BIT	BIT(6)
239 #define ADF_GEN4_IAINTSTATSSM_SER_ERR_SSMSH_CERR_BIT	BIT(7)
240 #define ADF_GEN4_IAINTSTATSSM_SER_ERR_SSMSH_UNCERR_BIT	BIT(8)
256  * UERRSSMSH error bit masks definitions
258  * BIT(0) - Indicates one uncorrectable error
259  * BIT(15) - Indicates multiple uncorrectable errors
262 #define ADF_GEN4_UERRSSMSH_BITMASK			(BIT(0) | BIT(15))
269  * CERRSSMSH error bit
270  * BIT(0) - Indicates one correctable error
272 #define ADF_GEN4_CERRSSMSH_ERROR_BIT			BIT(0)
284  * BIT(4)  - Disable parity for CPP parity
285  * BIT(12) - Disable logging push/pull data error in pperr register.
286  * BIT(16) - BIT(23) - Disable parity for SPPs
287  * BIT(24) - BIT(27) - Disable parity for SPPs, if it's supported on the device.
290 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(5) | BIT(6) | BIT(7) | \
291 	 BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(13) | BIT(14) | BIT(15))
297  * BIT(0) - Shared memory uncorrectable interrupt mask
298  * BIT(1) - Shared memory correctable interrupt mask
299  * BIT(2) - PPERR interrupt mask
300  * BIT(3) - CPP parity error Interrupt mask
301  * BIT(4) - SSM interrupt generated by SER correctable error mask
302  * BIT(5) - SSM interrupt generated by SER uncorrectable error
306 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5))
311 #define ADF_GEN4_PPERR_BITMASK				(BIT(0) | BIT(1))
367  * BIT(0) - indicates CPP command parity error
368  * BIT(1) - indicates CPP Main Push PPID parity error
369  * BIT(2) - indicates CPP Main ePPID parity error
370  * BIT(3) - indicates CPP Main push data parity error
371  * BIT(4) - indicates CPP Main Pull PPID parity error
372  * BIT(5) - indicates CPP target pull data parity error
375 	(BIT(0) | BIT(1) | BIT(4))
378 	(BIT(2) | BIT(3) | BIT(5))
399 #define ADF_GEN4_SSMSOFTERRORPARITY_SRC_BIT		BIT(0)
405  * BIT(0) - Indicates an uncorrectable error has occurred in the
407  * BIT(2) - Parity error occurred in the bank SPP fifos
408  * BIT(3) - Indicates Parity error occurred in following fifos in
410  * BIT(4) - Parity error occurred in flops in the design
411  * BIT(5) - Uncorrectable error has occurred in the
413  * BIT(7) - Indicates Parity error occurred in the Resource Manager
415  * BIT(8) - Indicates Parity error occurred in the Resource Manager
417  * BIT(9) - Indicates Parity error occurred in the Resource Manager
419  * BIT(10) - Indicates an uncorrectable error has occurred in the
421  * BIT(14) - Parity error occurred in Buffer Manager sigdone FIFO
424 	 (BIT(0) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(7) | \
425 	  BIT(8) | BIT(9) | BIT(10) | BIT(14))
429  * BIT(12) Parity error occurred in Buffer Manager pool 0
430  * BIT(13) Parity error occurred in Buffer Manager pool 1
433 	(BIT(12) | BIT(13))
437  * BIT(1) - Indicates a correctable Error has occurred
439  * BIT(6) - Indicates a correctable Error has occurred in
441  * BIT(11) - Indicates an correctable Error has occurred in
445 	(BIT(1) | BIT(6) | BIT(11))
452  * BIT(0) - Enables uncorrectable Error detection in :
455  * BIT(1) - Enables correctable Error detection in :
458  * BIT(2) - Enables Parity error detection in
472  * BIT(3) - Enables uncorrectable Error detection in
474  * BIT(4) - Enables correctable error detection in the Resource Manager
476  * BIT(5) - Enables Parity error detection in
480  * BIT(6) - Enables Parity error detection in Buffer Manager pools
484 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6))
489  * BIT(1) - Indicates multiple CPP CFC errors
490  * BIT(7) - Indicates CPP CFC command parity error type
491  * BIT(8) - Indicated CPP CFC data parity error type
493 #define ADF_GEN4_CPP_CFC_ERR_STATUS_MERR_BIT		BIT(1)
494 #define ADF_GEN4_CPP_CFC_ERR_STATUS_CMDPAR_BIT		BIT(7)
495 #define ADF_GEN4_CPP_CFC_ERR_STATUS_DATAPAR_BIT		BIT(8)
498  * BIT(0) - Enables CFC to detect and log push/pull data error
499  * BIT(1) - Enables CFC to generate interrupt to PCIEP for CPP error
500  * BIT(4) - When 1 Parity detection is disabled
501  * BIT(5) - When 1 Parity detection is disabled on CPP command bus
502  * BIT(6) - When 1 Parity detection is disabled on CPP push/pull bus
503  * BIT(9) - When 1 RF parity error detection is disabled
505 #define ADF_GEN4_CPP_CFC_ERR_CTRL_BITMASK		(BIT(0) | BIT(1))
508 	(BIT(4) | BIT(5) | BIT(6) | BIT(9) | BIT(10))
513  * BIT(0) - Clears bit(0) of ADF_GEN4_CPP_CFC_ERR_STATUS
515  * BIT(1) - Clears bit(1) of ADF_GEN4_CPP_CFC_ERR_STATUS
517  * BIT(2) - Clears bit(2) of ADF_GEN4_CPP_CFC_ERR_STATUS
520 #define ADF_GEN4_CPP_CFC_ERR_STATUS_CLR_BITMASK (BIT(0) | BIT(1) | BIT(2))
531  * BIT(2) - Hard fatal error
532  * BIT(16) - Parity error detected in CPR Push FIFO
533  * BIT(17) - Parity error detected in CPR Pull FIFO
534  * BIT(18) - Parity error detected in CPR Hash Table
535  * BIT(19) - Parity error detected in CPR History Buffer Copy 0
536  * BIT(20) - Parity error detected in CPR History Buffer Copy 1
537  * BIT(21) - Parity error detected in CPR History Buffer Copy 2
538  * BIT(22) - Parity error detected in CPR History Buffer Copy 3
539  * BIT(23) - Parity error detected in CPR History Buffer Copy 4
540  * BIT(24) - Parity error detected in CPR History Buffer Copy 5
541  * BIT(25) - Parity error detected in CPR History Buffer Copy 6
542  * BIT(26) - Parity error detected in CPR History Buffer Copy 7
545 	(BIT(2) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) | \
546 	 BIT(21) | BIT(22) | BIT(23) | BIT(24) | BIT(25) | BIT(26))
553  * BIT(2) - If set, an Uncorrectable Error event occurred
554  * BIT(16) - Parity error detected in XLT Push FIFO
555  * BIT(17) - Parity error detected in XLT Pull FIFO
556  * BIT(18) - Parity error detected in XLT HCTB0
557  * BIT(19) - Parity error detected in XLT HCTB1
558  * BIT(20) - Parity error detected in XLT HCTB2
559  * BIT(21) - Parity error detected in XLT HCTB3
560  * BIT(22) - Parity error detected in XLT CBCL
561  * BIT(23) - Parity error detected in XLT LITPTR
564 	(BIT(2) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \
565 	 BIT(22) | BIT(23))
569  * BIT(3) - Correctable error event occurred.
571 #define ADF_GEN4_EXPRPSSMXLT_CERR_BIT			BIT(3)
578  * BIT(2) - Even hard fatal error
579  * BIT(4) - Odd hard fatal error
580  * BIT(6) - decode soft error
581  * BIT(16) - Parity error detected in CPR Push FIFO
582  * BIT(17) - Parity error detected in CPR Pull FIFO
583  * BIT(18) - Parity error detected in the Input Buffer
584  * BIT(19) - symbuf0parerr
586  * BIT(20) - symbuf1parerr
590 	(BIT(2) | BIT(4) | BIT(6) | BIT(16) | BIT(17) | \
591 	 BIT(18) | BIT(19) | BIT(20))
595  * BIT(3) - Even ecc correctable error
596  * BIT(5) - Odd ecc correctable error
598 #define ADF_GEN4_EXPRPSSMDCPR_CERR_BITMASK		(BIT(3) | BIT(5))
603  * ERRSOU3 bit masks
604  * BIT(0) - indicates error Response Order Overflow and/or BME error
605  * BIT(1) - indicates RI push/pull error
606  * BIT(2) - indicates TI push/pull error
607  * BIT(3) - indicates ARAM correctable error
608  * BIT(4) - indicates ARAM uncorrectable error
609  * BIT(5) - indicates TI pull parity error
610  * BIT(6) - indicates RI push parity error
611  * BIT(7) - indicates VFLR interrupt
612  * BIT(8) - indicates ring pair interrupts for ATU detected fault
613  * BIT(9) - indicates error when accessing RLT block
615 #define ADF_GEN4_ERRSOU3_TIMISCSTS_BIT			BIT(0)
616 #define ADF_GEN4_ERRSOU3_RICPPINTSTS_BITMASK		(BIT(1) | BIT(6))
617 #define ADF_GEN4_ERRSOU3_TICPPINTSTS_BITMASK		(BIT(2) | BIT(5))
618 #define ADF_GEN4_ERRSOU3_REG_ARAMCERR_BIT		BIT(3)
619 #define ADF_GEN4_ERRSOU3_REG_ARAMUERR_BIT		BIT(4)
620 #define ADF_GEN4_ERRSOU3_VFLRNOTIFY_BIT			BIT(7)
621 #define ADF_GEN4_ERRSOU3_ATUFAULTSTATUS_BIT		BIT(8)
622 #define ADF_GEN4_ERRSOU3_RLTERROR_BIT			BIT(9)
642  * BIT(0) - Enables error detection and logging in TIMISCSTS register
643  * BIT(1) - It has effect only when SRIOV enabled, this bit is 0 by default
644  * BIT(2) - Enables the D-F-x counter within the dispatch arbiter
646  * BIT(30) - Disables VFLR functionality
647  *	     By setting this bit will revert to CPM1.x functionality
651 #define ADF_GEN4_TIMISCCTL_BIT				BIT(0)
652 #define ADF_GEN4_TIMSCCTL_RELAY_BITMASK (BIT(1) | BIT(2) | BIT(30))
659  * BIT(0) - RI asserted the CPP error signal during a push
660  * BIT(1) - RI detected the CPP error signal asserted during a pull
661  * BIT(2) - RI detected a push data parity error
662  * BIT(3) - RI detected a push valid parity error
665 	(BIT(0) | BIT(1) | BIT(2) | BIT(3))
671  * Control bit mask for RICPPINTCTL register
672  * BIT(0) - value of 1 enables error detection and reporting
674  * BIT(1) - value of 1 enables error detection and reporting
676  * BIT(2) - value of 1 enables error detection and reporting
678  * BIT(3) - value of 1 enable checking parity on CPP
679  * BIT(4) - value of 1 enables the stop feature of the stop and stream
683 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
696  * BIT(0) - value of 1 indicates that the TI asserted
698  * BIT(1) - value of 1 indicates that the TI detected
700  * BIT(2) - value of 1 indicates that the TI detected
704 	(BIT(0) | BIT(1) | BIT(2))
710  * Control bit mask for TICPPINTCTL register
711  * BIT(0) - value of 1 enables error detection and reporting on
713  * BIT(1) - value of 1 enables error detection and reporting on
715  * BIT(2) - value of 1 enables parity error detection and logging on
717  * BIT(3) - value of 1 enables CPP CMD and Pull Data parity checking
718  * BIT(4) - value of 1 enables TI stop part of stop and scream mode on
722 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
733 #define ADF_GEN4_REG_ARAMCERR_BIT			BIT(0)
736  * Correctable error enablement in ARAM bit mask
737  * BIT(3) - enable ARAM RAM to fix and log correctable error
738  * BIT(26) - enables ARAM agent to generate interrupt for correctable error
740 #define ADF_GEN4_REG_ARAMCERR_EN_BITMASK		(BIT(3) | BIT(26))
749  * ARAM error bit mask
750  * BIT(0) - indicates error logged in ARAMCERR or ARAMUCERR
751  * BIT(18) - indicates uncorrectable multiple errors in ARAM agent
753 #define ADF_GEN4_REG_ARAMUERR_ERROR_BIT			BIT(0)
754 #define ADF_GEN4_REG_ARAMUERR_MULTI_ERRORS_BIT		BIT(18)
757  * Uncorrectable error enablement in ARAM bit mask
758  * BIT(3) - enable ARAM RAM to fix and log uncorrectable error
759  * BIT(19) - enables ARAM agent to generate interrupt for uncorrectable error
761 #define ADF_GEN4_REG_ARAMUERR_EN_BITMASK		(BIT(3) | BIT(19))
774  * ARAM ECC block error control bit masks
775  * BIT(0) - enable ARAM CD ECC block error detecting
776  * BIT(1) - enable ARAM pull request ECC error detecting
777  * BIT(2) - enable ARAM command dispatch ECC error detecting
778  * BIT(3) - enable ARAM read datapath push ECC error detecting
779  * BIT(4) - enable ARAM read datapath pull ECC error detecting
780  * BIT(5) - enable ARAM RMW ECC error detecting
781  * BIT(6) - enable ARAM write datapath RMW ECC error detecting
782  * BIT(7) - enable ARAM write datapath ECC error detecting
785 	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | \
786 	 BIT(5) | BIT(6) | BIT(7))
792  * ARAM misc memory target error bit masks
793  * BIT(0) - indicates an error in ARAM target memory
794  * BIT(1) - indicates multiple errors in ARAM target memory
795  * BIT(4) - indicates pull error in ARAM target memory
796  * BIT(5) - indicates parity pull error in ARAM target memory
797  * BIT(6) - indicates push error in ARAM target memory
800 	(BIT(0) | BIT(4) | BIT(5) | BIT(6))
802 #define ADF_GEN4_REG_CPPMEMTGTERR_MULTI_ERRORS_BIT	BIT(1)
806  * BIT(2) - enables CPP memory to detect and log push/pull data error
807  * BIT(7) - enables push/pull error to generate interrupts to RI
808  * BIT(8) - enables ARAM to check parity on pull data and CPP command buses
809  * BIT(9) - enables ARAM to autopush to AE when push/parity error is detected
813 	(BIT(2) | BIT(7) | BIT(8) | BIT(9))
818 #define ADF_GEN4_ATUFAULTSTATUS_BIT			BIT(0)
821 #define ADF_GEN4_RIMISCSTS_BIT				BIT(0)