Lines Matching +full:syscon +full:- +full:efuse
1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI CPUFreq/OPP hw-supported driver
5 * Copyright (C) 2016-2017 Texas Instruments, Inc.
6 * Dave Gerlach <d-gerlach@ti.com>
11 #include <linux/mfd/syscon.h>
87 unsigned long efuse);
94 /* Backward compatibility hack: Might have missing syscon */
102 struct regmap *syscon; member
107 unsigned long efuse) in amx3_efuse_xlate() argument
109 if (!efuse) in amx3_efuse_xlate()
110 efuse = opp_data->soc_data->efuse_fallback; in amx3_efuse_xlate()
112 return ~efuse; in amx3_efuse_xlate()
116 unsigned long efuse) in dra7_efuse_xlate() argument
121 * The efuse on dra7 and am57 parts contains a specific in dra7_efuse_xlate()
125 switch (efuse) { in dra7_efuse_xlate()
142 unsigned long efuse) in omap3_efuse_xlate() argument
145 return BIT(efuse); in omap3_efuse_xlate()
149 unsigned long efuse) in am62p5_efuse_xlate() argument
153 switch (efuse) { in am62p5_efuse_xlate()
166 unsigned long efuse) in am62a7_efuse_xlate() argument
170 switch (efuse) { in am62a7_efuse_xlate()
192 unsigned long efuse) in am625_efuse_xlate() argument
196 switch (efuse) { in am625_efuse_xlate()
246 * some eFuse values e.g. CONTROL_FUSE_OPP1_VDD1
247 * are stored in the SYSCON register range
256 .efuse_offset = OMAP34xx_ProdID_SKUID - OMAP3_SYSCON_BASE,
259 .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
273 * some eFuse values e.g. CONTROL_FUSE_OPP 1G_VDD1
274 * are stored in the SYSCON register range.
284 .efuse_offset = OMAP3_CONTROL_DEVICE_STATUS - OMAP3_SYSCON_BASE,
287 .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
294 * high speed grade eFuse and no abb ldo
299 .efuse_offset = OMAP3_CONTROL_DEVICE_STATUS - OMAP3_SYSCON_BASE,
302 .rev_offset = OMAP3_CONTROL_IDCODE - OMAP3_SYSCON_BASE,
342 * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
344 * @efuse_value: Set to the value parsed from efuse
346 * Returns error code if efuse not read properly.
351 struct device *dev = opp_data->cpu_dev; in ti_cpufreq_get_efuse()
352 u32 efuse; in ti_cpufreq_get_efuse() local
355 ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset, in ti_cpufreq_get_efuse()
356 &efuse); in ti_cpufreq_get_efuse()
357 if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) { in ti_cpufreq_get_efuse()
358 /* not a syscon register! */ in ti_cpufreq_get_efuse()
360 opp_data->soc_data->efuse_offset, 4); in ti_cpufreq_get_efuse()
363 return -ENOMEM; in ti_cpufreq_get_efuse()
364 efuse = readl(regs); in ti_cpufreq_get_efuse()
369 "Failed to read the efuse value from syscon: %d\n", in ti_cpufreq_get_efuse()
374 efuse = (efuse & opp_data->soc_data->efuse_mask); in ti_cpufreq_get_efuse()
375 efuse >>= opp_data->soc_data->efuse_shift; in ti_cpufreq_get_efuse()
377 *efuse_value = opp_data->soc_data->efuse_xlate(opp_data, efuse); in ti_cpufreq_get_efuse()
383 * ti_cpufreq_get_rev() - Parse and return rev value present on SoC
392 struct device *dev = opp_data->cpu_dev; in ti_cpufreq_get_rev()
406 ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset, in ti_cpufreq_get_rev()
408 if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) { in ti_cpufreq_get_rev()
409 /* not a syscon register! */ in ti_cpufreq_get_rev()
411 opp_data->soc_data->rev_offset, 4); in ti_cpufreq_get_rev()
414 return -ENOMEM; in ti_cpufreq_get_rev()
420 "Failed to read the revision number from syscon: %d\n", in ti_cpufreq_get_rev()
433 struct device *dev = opp_data->cpu_dev; in ti_cpufreq_setup_syscon_register()
434 struct device_node *np = opp_data->opp_node; in ti_cpufreq_setup_syscon_register()
436 opp_data->syscon = syscon_regmap_lookup_by_phandle(np, in ti_cpufreq_setup_syscon_register()
437 "syscon"); in ti_cpufreq_setup_syscon_register()
438 if (IS_ERR(opp_data->syscon)) { in ti_cpufreq_setup_syscon_register()
440 "\"syscon\" is missing, cannot use OPPv2 table.\n"); in ti_cpufreq_setup_syscon_register()
441 return PTR_ERR(opp_data->syscon); in ti_cpufreq_setup_syscon_register()
485 match = dev_get_platdata(&pdev->dev); in ti_cpufreq_probe()
487 return -ENODEV; in ti_cpufreq_probe()
489 opp_data = devm_kzalloc(&pdev->dev, sizeof(*opp_data), GFP_KERNEL); in ti_cpufreq_probe()
491 return -ENOMEM; in ti_cpufreq_probe()
493 opp_data->soc_data = match->data; in ti_cpufreq_probe()
495 opp_data->cpu_dev = get_cpu_device(0); in ti_cpufreq_probe()
496 if (!opp_data->cpu_dev) { in ti_cpufreq_probe()
498 return -ENODEV; in ti_cpufreq_probe()
501 opp_data->opp_node = dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_dev); in ti_cpufreq_probe()
502 if (!opp_data->opp_node) { in ti_cpufreq_probe()
503 dev_info(opp_data->cpu_dev, in ti_cpufreq_probe()
504 "OPP-v2 not supported, cpufreq-dt will attempt to use legacy tables.\n"); in ti_cpufreq_probe()
515 * 0 - SoC Revision in ti_cpufreq_probe()
516 * 1 - eFuse value in ti_cpufreq_probe()
526 if (opp_data->soc_data->multi_regulator) { in ti_cpufreq_probe()
527 if (opp_data->soc_data->reg_names) in ti_cpufreq_probe()
528 config.regulator_names = opp_data->soc_data->reg_names; in ti_cpufreq_probe()
533 ret = dev_pm_opp_set_config(opp_data->cpu_dev, &config); in ti_cpufreq_probe()
535 dev_err_probe(opp_data->cpu_dev, ret, "Failed to set OPP config\n"); in ti_cpufreq_probe()
539 of_node_put(opp_data->opp_node); in ti_cpufreq_probe()
542 platform_device_register_simple("cpufreq-dt", -1, NULL, 0); in ti_cpufreq_probe()
547 of_node_put(opp_data->opp_node); in ti_cpufreq_probe()
559 platform_device_register_data(NULL, "ti-cpufreq", -1, match, in ti_cpufreq_init()
569 .name = "ti-cpufreq",
574 MODULE_DESCRIPTION("TI CPUFreq/OPP hw-supported driver");
575 MODULE_AUTHOR("Dave Gerlach <d-gerlach@ti.com>");